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Hardware Abstraction Layer (HAL)
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Hardware Abstraction Layer (HAL)
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| ▼HAL General Types/Macros | This section documents the basic types and macros that are used by multiple HAL drivers |
| Result Type | Defines a type and related utilities for function result handling |
| ▶General Types | This section documents the basic types that are used by multiple HAL drivers |
| Overrideable Macros | These macros can be defined to a custom value globally to modify the behavior of the HAL |
| Implementation Specific Types | The following types are used by the HAL, but are defined by the implementation |
| HAL Driver Availability | This section documents the macros that can be used to check if a specific driver is available for the current device |
| ▼HAL Drivers | This section documents the drivers which form the stable API of the ModusToolbox™ HAL |
| ▶ADC (Analog to Digital Converter) | High level interface for interacting with the analog to digital converter (ADC) |
| ▶Clock | Interface for getting and changing clock configuration |
| ▶COMP (Analog Comparator) | High level interface for interacting with an analog Comparator |
| ▶CRC (Cyclic Redundancy Check) | High level interface for interacting with the CRC, which provides hardware accelerated CRC computations |
| ▶DMA (Direct Memory Access) | High level interface for interacting with the direct memory access (DMA) |
| ▶EZI2C (Inter-Integrated Circuit) | High level interface for interacting with the Cypress EZ Inter-Integrated Circuit (EZI2C) |
| ▶Flash (Flash System Routine) | High level interface to the internal flash memory |
| ▶System Power Management | Interface for changing power states and restricting when they are allowed |
| ▶GPIO (General Purpose Input Output) | High level interface for configuring and interacting with general purpose input/outputs (GPIO) |
| ▶HWMGR (Hardware Manager) | High level interface to the Hardware Manager |
| ▶I2C (Inter-Integrated Circuit) | High level interface for interacting with the I2C resource |
| ▶I2S (Inter-IC Sound) | High level interface for interacting with the Inter-IC Sound (I2S) |
| ▶Interconnect (Internal Digital Routing) | High level interface to the Infineon digital routing |
| ▶LPTimer (Low-Power Timer) | High level interface for interacting with the low-power timer (LPTimer) |
| ▶Opamp (Operational Amplifier) | High level interface for interacting with the Operational Amplifier (Opamp) |
| ▶PWM (Pulse Width Modulator) | High level interface for interacting with the pulse width modulator (PWM) hardware resource |
| ▶Quadrature Decoder | High level interface for interacting with the Quadrature Decoder hardware resource |
| ▶SPI (Serial Peripheral Interface) | High level interface for interacting with the Serial Peripheral Interface (SPI) |
| System | High level interface for interacting with reset and delays |
| ▶TDM (Time Division Multiplexed) | High level interface for interacting with the Time Division Multiplexed controller (TDM) |
| ▶Timer (Timer/Counter) | High level interface for interacting with the Timer/Counter hardware resource |
| ▶TRNG (True Random Number Generator) | High level interface to the True Random Number Generator (TRNG) |
| ▶UART (Universal Asynchronous Receiver-Transmitter) | High level interface for interacting with the Universal Asynchronous Receiver-Transmitter (UART) |
| ▶WDT (Watchdog Timer) | High level interface to the Watchdog Timer (WDT) |
| ▼CAT2 (PMG/PSoC™ 4) Implementation Specific | This section provides details about the PMG/PSoC™ 4 implementation of the Cypress HAL |
| Clocks | Implementation specific interface for using the Clock driver |
| ▶DMA (Direct Memory Access) | DW (DataWire) is one of two DMA hardware implementations for CAT1 (PSoC™ 6) |
| GPIO | |
| PMG/PSoC™ 4 Specific Hardware Types | Aliases for types which are part of the public HAL interface but whose representations need to vary per HAL implementation |
| Interconnect (Internal Digital Routing) | The interconnect system connects the various hardware peripherals using trigger signals |
| ▶Pins | Definitions for the pinout for each supported device |
| Timer (Timer/Counter) | |
| ▶Triggers | Trigger connections for supported device families |
| WDT (Watchdog Timer) | The CAT2 (PMG/PSoC™ 4) WDT is only capable of supporting certain timeout ranges below its maximum timeout |
| ADC (Analog Digital Converter) | |
| COMP (Analog Comparator) | On CAT1 & CAT2, the comparator driver can use either of two underlying hardware blocks: |
| I2S (Inter-IC Sound) | The CAT2 (PSoC™ 4) I2S only supports TX in master mode |
| LPTimer (Low-Power Timer) | The maximum number of ticks that can set to an LPTimer is 0xFFF0FFFF |
| Opamp (Operational Amplifier) | |
| PWM (Pulse Width Modulator) | |
| QuadDec (Quadrature Decoder) | Group_hal_impl_quaddec |
| SPI (Serial Peripheral Interface) | |
| TDM (Time Division Multiplexing) | The CAT2 (PSoC™ 4) TDM only supports TX in master mode |