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Hardware Abstraction Layer (HAL)
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Hardware Abstraction Layer (HAL)
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This section provides details about the PMG/PSoC™ 4 implementation of the Cypress HAL.
All information within this section is platform specific and is provided for reference. Portable application code should depend only on the APIs and types which are documented in the HAL Drivers section.
The following table shows a mapping of each HAL driver to the lower level firmware driver and the corresponding hardware resource. This is intended to help understand how the HAL is implemented for PMG/PSoC™ 4 and what features the underlying hardware supports.
| HAL Resource | PDL Driver(s) | CAT2 Hardware |
|---|---|---|
| ADC | cy_adc | SAR ADC |
| Clock | cy_sysclk | All clocks (system & peripheral) |
| Comparator | cy_ctb or cy_lpcomp | CTBm or LPComp |
| CRC | cy_crypto_crc | Crypto |
| DMA | cy_dmac | DMA Controller |
| EZI2C | cy_scb_ezi2c | SCB |
| Flash | cy_flash | Flash |
| GPIO | cy_gpio | GPIO |
| Hardware Manager | NA | NA |
| I2C | cy_scb_i2c | SCB |
| LPTimer | cy_mcwdt | MCWDT |
| Opamp | cy_ctb | CTBm |
| PWM | cy_pwm | TCPWM |
| Quadrature Decoder | cy_tcpwm_quaddec | TCPWM |
| SPI | cy_scb_spi | SCB |
| SysPM | cy_syspm | System Power Resources |
| System | cy_syslib | System Resources |
| Timer | cy_tcpwm_counter | TCPWM |
| TRNG | cy_crypto_trng | Crypto |
| UART | cy_scb_uart | SCB |
| WDT | cy_wdt | WDT |
Error codes generated by the low level level PDL driver all use module IDs starting with CY_RSLT_MODULE_DRIVERS_PDL_BASE. The exact errors are documented for each driver in the mtb-pdl-cat2 documentation.
API Reference | |
| Clocks | |
| Implementation specific interface for using the Clock driver. | |
| DMA (Direct Memory Access) | |
| DW (DataWire) is one of two DMA hardware implementations for CAT1 (PSoC™ 6). | |
| GPIO | |
| PMG/PSoC™ 4 Specific Hardware Types | |
| Aliases for types which are part of the public HAL interface but whose representations need to vary per HAL implementation. | |
| Interconnect (Internal Digital Routing) | |
| The interconnect system connects the various hardware peripherals using trigger signals. | |
| Pins | |
| Definitions for the pinout for each supported device. | |
| Timer (Timer/Counter) | |
| Triggers | |
| Trigger connections for supported device families. | |
| WDT (Watchdog Timer) | |
| The CAT2 (PMG/PSoC™ 4) WDT is only capable of supporting certain timeout ranges below its maximum timeout. | |
| ADC (Analog Digital Converter) | |
| COMP (Analog Comparator) | |
| On CAT1 & CAT2, the comparator driver can use either of two underlying hardware blocks: | |
| I2S (Inter-IC Sound) | |
| The CAT2 (PSoC™ 4) I2S only supports TX in master mode. | |
| LPTimer (Low-Power Timer) | |
| The maximum number of ticks that can set to an LPTimer is 0xFFF0FFFF. | |
| Opamp (Operational Amplifier) | |
| PWM (Pulse Width Modulator) | |
| QuadDec (Quadrature Decoder) | |
| group_hal_impl_quaddec | |
| SPI (Serial Peripheral Interface) | |
| TDM (Time Division Multiplexing) | |
| The CAT2 (PSoC™ 4) TDM only supports TX in master mode. | |