Driver API for Shift Register.
The functions and other declarations used in this part of the driver are in cy_tcpwm_shiftreg.h. You can also include cy_pdl.h to get access to all functions and declarations in the PDL.
Shift Register functionality shifts the counter value to the right. A shift register is used to apply a signal delay function which can be used eg: in detecting frequency shift keying (FSK) signals. A shift register is also used in parallel-in to serial-out data conversion and serial-in to parallel-out data conversion.
Features:
The Shift Register configuration can be divided to number of sequential steps listed below:
To configure Shift Register, provide the configuration parameters in the cy_stc_tcpwm_shiftreg_config_t structure. The configuration structure can be modified through software, but if the configurator in ModusToolbox is used then the configuration structure will be updated with the users inputs. To initialize the driver, call Cy_TCPWM_ShiftReg_Init function providing a pointer to the populated cy_stc_tcpwm_shiftreg_config_t structure.
The dedicated TCPWM pins can be used. The HSIOM register must be configured to connect the block to the pins. Use the GPIO (General Purpose Input Output) driver API to do that.
The clock source must be connected for proper operation. Any of the peripheral clock dividers could be used. Use the SysClk (System Clock) driver API to do that.
Shift Register has to be enabled before starting
To start Shift Register operation Cy_TCPWM_TriggerStart_Single API can be used.
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Data Structures | |