Initialization Functions

General Description

Functions
cy_en_gpio_status_t	Cy_GPIO_Pin_Init (GPIO_PRT_Type *base, uint32_t pinNum, const cy_stc_gpio_pin_config_t *config)
	Initializes all pin configuration settings for the specified pin. More...
cy_en_gpio_status_t	Cy_GPIO_Port_Init (GPIO_PRT_Type *base, const cy_stc_gpio_prt_config_t *config)
	Initialize a complete port of pins from a single init structure. More...
void	Cy_GPIO_Pin_FastInit (GPIO_PRT_Type *base, uint32_t pinNum, uint32_t driveMode, uint32_t outVal, en_hsiom_sel_t hsiom)
	Initialize the most common configuration settings for all pin types. More...
void	Cy_GPIO_Port_Deinit (GPIO_PRT_Type *base)
	Reset a complete port of pins back to power on reset defaults. More...
void	Cy_GPIO_SetHSIOM (GPIO_PRT_Type *base, uint32_t pinNum, en_hsiom_sel_t value)
	Configures the HSIOM connection to the pin. More...
en_hsiom_sel_t	Cy_GPIO_GetHSIOM (GPIO_PRT_Type *base, uint32_t pinNum)
	Returns the current HSIOM multiplexer connection to the pin. More...
__STATIC_INLINE GPIO_PRT_Type *	Cy_GPIO_PortToAddr (uint32_t portNum)
	Retrieves the port address based on the given port number. More...

Function Documentation

Cy_GPIO_Pin_Init()

cy_en_gpio_status_t Cy_GPIO_Pin_Init	(	GPIO_PRT_Type *	base,
		uint32_t	pinNum,
		const cy_stc_gpio_pin_config_t *	config
	)

Initializes all pin configuration settings for the specified pin.

Parameters

base	Pointer to the pin's port register base address
pinNum	Position of the pin bit-field within the port register
config	Pointer to the pin config structure base address

Returns

Initialization status

Note

This function modifies port registers in read-modify-write operations. It is not thread safe as the resource is shared among multiple pins on a port.

When EXT_CLK is source to HF0 and this API is called from application then make sure that the drivemode argument is CY_GPIO_DM_HIGHZ.

Function Usage

    cy_stc_gpio_pin_config_t pinConfig = {
        /*.outVal =*/       1UL,                    /* Output = High */
        /*.driveMode =*/    CY_GPIO_DM_PULLUP,      /* Resistive pull-up, input buffer on */
        /*.hsiom =*/        P0_3_GPIO,              /* Software controlled pin */
        /*.intEdge =*/      CY_GPIO_INTR_RISING,    /* Rising edge interrupt */
        /*.intMask =*/      1UL,                    /* Enable port interrupt for this pin */
        /*.vtrip =*/        CY_GPIO_VTRIP_CMOS,     /* CMOS voltage trip */
        /*.slewRate =*/     CY_GPIO_SLEW_FAST,      /* Fast slew rate */
        /*.driveSel =*/     CY_GPIO_DRIVE_FULL,     /* Full drive strength */
        /*.vregEn =*/       0UL,                    /* SIO-specific setting - ignored */
        /*.ibufMode =*/     0UL,                    /* SIO-specific setting - ignored */
        /*.vtripSel =*/     0UL,                    /* SIO-specific setting - ignored */
        /*.vrefSel =*/      0UL,                    /* SIO-specific setting - ignored */
        /*.vohSel =*/       0UL                     /* SIO-specific setting - ignored */
    };
    
    /* Initialize pin P0.3 */
    if(CY_GPIO_SUCCESS != Cy_GPIO_Pin_Init(P0_3_PORT, P0_3_NUM, &pinConfig))
    {
        /* Insert error handling */
    }

Cy_GPIO_Port_Init()

cy_en_gpio_status_t Cy_GPIO_Port_Init	(	GPIO_PRT_Type *	base,
		const cy_stc_gpio_prt_config_t *	config
	)

Initialize a complete port of pins from a single init structure.

The configuration structure used in this function has a 1:1 mapping to the GPIO and HSIOM registers. Refer to the device Technical Reference Manual (TRM) for the register details on how to populate them.

Parameters

base	Pointer to the pin's port register base address
config	Pointer to the pin config structure base address

Returns

Initialization status

Note

If using the PSoC Creator IDE, there is no need to initialize the pins when using the GPIO component on the schematic. Ports are configured in Cy_SystemInit() before main() entry.

Function Usage

    /* Scenario: Initialize GPIO port 0:
     * - 3 pin as input with resistive pull-up and rising edge interrupt;
     * - 5 pin as output in a strong drive mode with initial state high. */
    #define PIN_INPUT_NUM   3u
    #define PIN_OUTPUT_NUM  5u
    
    #define PIN_HIGH        1u
    #define INTR_ENABLE     1u
    #define INTR_CFG_LEN    2u
    #define PIN_DM_CFG_LEN  4u
    
    cy_stc_gpio_prt_config_t portConfig = {
        /*.out        =*/ (PIN_HIGH << PIN_OUTPUT_NUM),                                 /* PX.5 output value = 1 */
        /*.intrMask   =*/ (INTR_ENABLE << PIN_INPUT_NUM),                               /* PX.3 interrupt enabled */
        /*.intrCfg    =*/ (CY_GPIO_INTR_RISING << (PIN_INPUT_NUM * INTR_CFG_LEN)),      /* PX.3 rising edge interrupt */
        /*.cfg        =*/ ((CY_GPIO_DM_PULLUP << (PIN_INPUT_NUM  * PIN_DM_CFG_LEN)) |   /* PX.3 resistive pull-up */
                          (CY_GPIO_DM_STRONG << (PIN_OUTPUT_NUM  * PIN_DM_CFG_LEN))),   /* PX.5 strong drive */
        /*.cfgIn      =*/ 0x00000000u,                                                  /* PX[7:0] CMOS trip (default value)*/
        /*.cfgOut     =*/ 0x00000000u,                                                  /* PX[7:0] Fast slew rate, full drive strength (default value) */
        /*.cfgSIO     =*/ 0x00000000u,                                                  /* PX[7:0] ignored (default value) */
        /*.sel0Active =*/ 0x00000000u,                                                  /* PX[3:0] Use GPIO HSIOM (default value) */
        /*.sel1Active =*/ 0x00000000u,                                                  /* PX[7:4] Use GPIO HSIOM (default value) */
    };

    /* Initialize GPIO port 0 */
    if(CY_GPIO_SUCCESS != Cy_GPIO_Port_Init(GPIO_PRT0, &portConfig))
    {
        /* Insert error handling */
    }
    

Cy_GPIO_Pin_FastInit()

void Cy_GPIO_Pin_FastInit	(	GPIO_PRT_Type *	base,
		uint32_t	pinNum,
		uint32_t	driveMode,
		uint32_t	outVal,
		en_hsiom_sel_t	hsiom
	)

Initialize the most common configuration settings for all pin types.

These include, drive mode, initial output value, and HSIOM connection.

Parameters

base	Pointer to the pin's port register base address
pinNum	Position of the pin bit-field within the port register
driveMode	Pin drive mode. Options are detailed in Pin drive mode macros
outVal	Logic state of the output buffer driven to the pin (1 or 0)
hsiom	HSIOM input selection

Note

This function modifies port registers in read-modify-write operations. It is not thread safe as the resource is shared among multiple pins on a port. You can use the Cy_SysLib_EnterCriticalSection() and Cy_SysLib_ExitCriticalSection() functions to ensure that Cy_GPIO_Pin_FastInit() function execution is not interrupted.

When EXT_CLK is source to HF0 and this API is called from application then make sure that the drivemode argument is CY_GPIO_DM_HIGHZ.

This doesn't set pull-up resistance value. By default. the pull-up resistance is disabled. To select it, use Cy_GPIO_SetPullupResistance.

Function Usage

    /* Quickly initialize pin P0.3 (e.g. quickly set up a test LED) */
    Cy_GPIO_Pin_FastInit(P0_3_PORT, P0_3_NUM, CY_GPIO_DM_PULLUP, 1UL, P0_3_GPIO);

Cy_GPIO_Port_Deinit()

void Cy_GPIO_Port_Deinit

(

GPIO_PRT_Type *

base

)

Reset a complete port of pins back to power on reset defaults.

Parameters

base	Pointer to the pin's port register base address

Function Usage

    /* Initialize GPIO port 0 */
    (void)Cy_GPIO_Port_Init(GPIO_PRT0, &portConfig);
    
    /* Scenario: The port is no longer used or needs to be disabled */
    
    /* Reset the GPIO port 0 to Power-On-Reset values */
    Cy_GPIO_Port_Deinit(GPIO_PRT0);

Cy_GPIO_SetHSIOM()

void Cy_GPIO_SetHSIOM	(	GPIO_PRT_Type *	base,
		uint32_t	pinNum,
		en_hsiom_sel_t	value
	)

Configures the HSIOM connection to the pin.

Connects the specified High-Speed Input Output Multiplexer (HSIOM) selection to the pin.

Parameters

base	Pointer to the pin's port register base address
pinNum	Position of the pin bit-field within the port register
value	HSIOM input selection

Note

This function modifies a port register in a read-modify-write operation. It is not thread safe as the resource is shared among multiple pins on a port.

Function Usage

    /* Retrieve the HSIOM connection to P0.3 */
    if(P0_3_GPIO == Cy_GPIO_GetHSIOM(P0_3_PORT, P0_3_NUM))
    {
        /* Connect P0.3 to AMUXA */
        Cy_GPIO_SetHSIOM(P0_3_PORT, P0_3_NUM, P0_3_AMUXA);
    }

Cy_GPIO_GetHSIOM()

en_hsiom_sel_t Cy_GPIO_GetHSIOM	(	GPIO_PRT_Type *	base,
		uint32_t	pinNum
	)

Returns the current HSIOM multiplexer connection to the pin.

Parameters

base	Pointer to the pin's port register base address
pinNum	Position of the pin bit-field within the port register

Returns

HSIOM input selection

Function Usage

    /* Retrieve the HSIOM connection to P0.3 */
    if(P0_3_GPIO == Cy_GPIO_GetHSIOM(P0_3_PORT, P0_3_NUM))
    {
        /* Connect P0.3 to AMUXA */
        Cy_GPIO_SetHSIOM(P0_3_PORT, P0_3_NUM, P0_3_AMUXA);
    }

Cy_GPIO_PortToAddr()

__STATIC_INLINE GPIO_PRT_Type * Cy_GPIO_PortToAddr

(

uint32_t

portNum

)

Retrieves the port address based on the given port number.

This is a helper function to calculate the port base address when given a port number. It is to be used when pin access needs to be calculated at runtime.

Parameters

portNum

Port number

Returns

Base address of the port register structure

Function Usage

    uint32_t portCnt  = 0UL;
    uint32_t pinCnt   = 3UL;
    uint32_t pinState = 1UL;
    
    /* Scenario: Calculate the location and state of a pin to control */
    
    /* Control which pin to set/clear using parameters */
    Cy_GPIO_Write(Cy_GPIO_PortToAddr(portCnt), pinCnt, pinState);