MTB CAT1 Peripheral driver library

General Description

API Reference

 Shift Register CLK Prescaler values
 Clock prescaler values.
 
 Shift Register Output Lines
 Specifies the Shift Register output line.
 
 Shift Register output invert
 Output invert modes.
 
 Shift Register Disabled Output
 Specifies the behavior of the Shift Register outputs while Shift Register is disabled.
 
 Shift Register Status
 The Shift Register status.