PSoC 6 Peripheral Driver Library
cy_stc_dma_descriptor_config_t Struct Reference

Description

This structure is a configuration structure pre-initialized by the user and passed as a parameter to the Cy_DMA_Descriptor_Init().

It can be allocated in RAM/flash (the user's choice). In case of flash allocation, there is a possibility to reinitialize the descriptor in runtime. This structure has all the parameters of the descriptor as separate parameters. Most of these parameters are represented in the cy_stc_dma_descriptor_t structure as bitfields.

Data Fields

cy_en_dma_retrigger_t retrigger
 Specifies whether the DW controller should wait for the input trigger to be deactivated. More...
 
cy_en_dma_trigger_type_t interruptType
 Sets the event that triggers an interrupt. More...
 
cy_en_dma_trigger_type_t triggerOutType
 Sets the event that triggers an output. More...
 
cy_en_dma_channel_state_t channelState
 Specifies whether the channel is enabled or disabled on completion of descriptor. More...
 
cy_en_dma_trigger_type_t triggerInType
 Sets what type of transfer is triggered. More...
 
cy_en_dma_data_size_t dataSize
 The size of the data bus for transfer. More...
 
cy_en_dma_transfer_size_t srcTransferSize
 The source transfer size. More...
 
cy_en_dma_transfer_size_t dstTransferSize
 The destination transfer size. More...
 
cy_en_dma_descriptor_type_t descriptorType
 The type of the descriptor. More...
 
void * srcAddress
 The source address of the transfer. More...
 
void * dstAddress
 The destination address of the transfer. More...
 
int32_t srcXincrement
 The address increment of the source after each X-loop transfer. More...
 
int32_t dstXincrement
 The address increment of the destination after each X-loop transfer. More...
 
uint32_t xCount
 The number of transfers in an X-loop. More...
 
int32_t srcYincrement
 The address increment of the source after each Y-loop transfer. More...
 
int32_t dstYincrement
 The address increment of the destination after each Y-loop transfer. More...
 
uint32_t yCount
 The number of X-loops in the Y-loop. More...
 
cy_stc_dma_descriptor_tnextDescriptor
 The next descriptor to chain after completion. More...
 

Field Documentation

◆ retrigger

cy_en_dma_retrigger_t cy_stc_dma_descriptor_config_t::retrigger

Specifies whether the DW controller should wait for the input trigger to be deactivated.

◆ interruptType

cy_en_dma_trigger_type_t cy_stc_dma_descriptor_config_t::interruptType

Sets the event that triggers an interrupt.

See cy_en_dma_trigger_type_t.

◆ triggerOutType

cy_en_dma_trigger_type_t cy_stc_dma_descriptor_config_t::triggerOutType

Sets the event that triggers an output.

See cy_en_dma_trigger_type_t.

◆ channelState

cy_en_dma_channel_state_t cy_stc_dma_descriptor_config_t::channelState

Specifies whether the channel is enabled or disabled on completion of descriptor.

See cy_en_dma_channel_state_t.

◆ triggerInType

cy_en_dma_trigger_type_t cy_stc_dma_descriptor_config_t::triggerInType

Sets what type of transfer is triggered.

See cy_en_dma_trigger_type_t.

◆ dataSize

cy_en_dma_data_size_t cy_stc_dma_descriptor_config_t::dataSize

The size of the data bus for transfer.

See cy_en_dma_data_size_t.

◆ srcTransferSize

cy_en_dma_transfer_size_t cy_stc_dma_descriptor_config_t::srcTransferSize

The source transfer size.

◆ dstTransferSize

cy_en_dma_transfer_size_t cy_stc_dma_descriptor_config_t::dstTransferSize

The destination transfer size.

◆ descriptorType

cy_en_dma_descriptor_type_t cy_stc_dma_descriptor_config_t::descriptorType

The type of the descriptor.

See cy_en_dma_descriptor_type_t.

◆ srcAddress

void* cy_stc_dma_descriptor_config_t::srcAddress

The source address of the transfer.

◆ dstAddress

void* cy_stc_dma_descriptor_config_t::dstAddress

The destination address of the transfer.

For CPUSS_ver2 only: for CRC transfer, the CRC result without post-processing (reversing and/or XORing, if used) is placed into the dstAddress.

◆ srcXincrement

int32_t cy_stc_dma_descriptor_config_t::srcXincrement

The address increment of the source after each X-loop transfer.

Valid range is -2048 ... 2047.

◆ dstXincrement

int32_t cy_stc_dma_descriptor_config_t::dstXincrement

The address increment of the destination after each X-loop transfer.

Valid range is -2048 ... 2047.

◆ xCount

uint32_t cy_stc_dma_descriptor_config_t::xCount

The number of transfers in an X-loop.

Valid range is 1 ... 256.

◆ srcYincrement

int32_t cy_stc_dma_descriptor_config_t::srcYincrement

The address increment of the source after each Y-loop transfer.

Valid range is -2048 ... 2047.

◆ dstYincrement

int32_t cy_stc_dma_descriptor_config_t::dstYincrement

The address increment of the destination after each Y-loop transfer.

Valid range is -2048 ... 2047.

◆ yCount

uint32_t cy_stc_dma_descriptor_config_t::yCount

The number of X-loops in the Y-loop.

Valid range is 1 ... 256.

◆ nextDescriptor

cy_stc_dma_descriptor_t* cy_stc_dma_descriptor_config_t::nextDescriptor

The next descriptor to chain after completion.

A NULL value will signify no chaining.