|
| enum | cy_en_dma_intr_cause_t {
CY_DMA_INTR_CAUSE_NO_INTR = 0U,
CY_DMA_INTR_CAUSE_COMPLETION = 1U,
CY_DMA_INTR_CAUSE_SRC_BUS_ERROR = 2U,
CY_DMA_INTR_CAUSE_DST_BUS_ERROR = 3U,
CY_DMA_INTR_CAUSE_SRC_MISAL = 4U,
CY_DMA_INTR_CAUSE_DST_MISAL = 5U,
CY_DMA_INTR_CAUSE_CURR_PTR_NULL = 6U,
CY_DMA_INTR_CAUSE_ACTIVE_CH_DISABLED = 7U,
CY_DMA_INTR_CAUSE_DESCR_BUS_ERROR = 8U
} |
| | Contains the possible interrupt cause values. More...
|
| |
| enum | cy_en_dma_descriptor_type_t {
CY_DMA_SINGLE_TRANSFER = 0UL,
CY_DMA_1D_TRANSFER = 1UL,
CY_DMA_2D_TRANSFER = 2UL,
CY_DMA_CRC_TRANSFER = 3UL
} |
| | Contains the options for the descriptor type. More...
|
| |
| enum | cy_en_dma_trigger_type_t {
CY_DMA_1ELEMENT = 0UL,
CY_DMA_X_LOOP = 1UL,
CY_DMA_DESCR = 2UL,
CY_DMA_DESCR_CHAIN = 3UL
} |
| | Contains the options for the interrupt, trig-in and trig-out type parameters of the descriptor. More...
|
| |
| enum | cy_en_dma_data_size_t {
CY_DMA_BYTE = 0UL,
CY_DMA_HALFWORD = 1UL,
CY_DMA_WORD = 2UL
} |
| | Contains the options for the data size. More...
|
| |
| enum | cy_en_dma_retrigger_t {
CY_DMA_RETRIG_IM = 0UL,
CY_DMA_RETRIG_4CYC = 1UL,
CY_DMA_RETRIG_16CYC = 2UL,
CY_DMA_WAIT_FOR_REACT = 3UL
} |
| | Contains the options for descriptor retriggering. More...
|
| |
| enum | cy_en_dma_transfer_size_t {
CY_DMA_TRANSFER_SIZE_DATA = 0UL,
CY_DMA_TRANSFER_SIZE_WORD = 1UL
} |
| | Contains the options for the transfer size. More...
|
| |
| enum | cy_en_dma_channel_state_t {
CY_DMA_CHANNEL_ENABLED = 0UL,
CY_DMA_CHANNEL_DISABLED = 1UL
} |
| | Contains the options for the state of the channel when the descriptor is completed. More...
|
| |
| enum | cy_en_dma_status_t {
CY_DMA_SUCCESS = 0x00UL,
CY_DMA_BAD_PARAM = CY_DMA_ID | CY_PDL_STATUS_ERROR | 0x01UL
} |
| | Contains the return values of the DMA driver. More...
|
| |
