Configuration structure for one row of the State Transition Table, array of these structures defines whole State Transition Table.
The State Transition Table may have maximum 16 rows.
Data Fields | |
cy_en_hppass_condition_t | condition |
Condition field. More... | |
cy_en_hppass_action_t | action |
Action field. More... | |
uint8_t | branchStateIdx |
Index of the next state, used if cy_stc_hppass_ac_stt_t::action is CY_HPPASS_ACTION_BRANCH_IF_TRUE or CY_HPPASS_ACTION_BRANCH_IF_FALSE. More... | |
bool | interrupt |
Send Output Pulse Trigger or generate CPU Interrupt if configured. More... | |
uint16_t | count |
Field to set the timer/counter value for an interval or loop counts. More... | |
bool | gpioOutUnlock |
GPIO Out Unlock: false, Lock: GPIO Out does NOT get updated true, Unlock: GPIO Out does get updated. | |
uint8_t | gpioOutMsk |
GPIO out generation, use GPIO Out Masks masks. | |
bool | csgUnlock [CY_HPPASS_CSG_NUM] |
CSG Unlock: false, Lock: cy_stc_hppass_ac_stt_t::csgEnable is ignored true, Unlock: CSG state is set per cy_stc_hppass_ac_stt_t::csgEnable. | |
bool | csgEnable [CY_HPPASS_CSG_NUM] |
CSG Slice Enable. More... | |
bool | csgDacTrig [CY_HPPASS_CSG_NUM] |
CSG Slice Trigger. More... | |
bool | sarUnlock |
SAR Unlock: false, Lock: cy_stc_hppass_ac_stt_t::sarEnable is ignored, true, Unlock: SAR state is set per cy_stc_hppass_ac_stt_t::sarEnable. | |
bool | sarEnable |
SAR Enable. More... | |
uint8_t | sarGrpMsk |
The Sequencer Groups mask, use SAR Sequencer Groups mask.. More... | |
cy_stc_hppass_stt_mux_t | sarMux [CY_HPPASS_SAR_MUX_NUM] |
Array of the Muxed Sampler control settings. More... | |
cy_en_hppass_condition_t cy_stc_hppass_ac_stt_t::condition |
Condition field.
cy_en_hppass_action_t cy_stc_hppass_ac_stt_t::action |
Action field.
uint8_t cy_stc_hppass_ac_stt_t::branchStateIdx |
Index of the next state, used if cy_stc_hppass_ac_stt_t::action is CY_HPPASS_ACTION_BRANCH_IF_TRUE or CY_HPPASS_ACTION_BRANCH_IF_FALSE.
The range is 0 to 15.
bool cy_stc_hppass_ac_stt_t::interrupt |
Send Output Pulse Trigger or generate CPU Interrupt if configured.
If cy_stc_hppass_ac_stt_t::action is CY_HPPASS_ACTION_WAIT_FOR, the trigger or interrupt is generated after the condition occurs.
uint16_t cy_stc_hppass_ac_stt_t::count |
Field to set the timer/counter value for an interval or loop counts.
If cy_stc_hppass_ac_stt_t::action is CY_HPPASS_ACTION_WAIT_FOR, the field is an interval timer, if CY_HPPASS_ACTION_BRANCH_IF_TRUE or CY_HPPASS_ACTION_BRANCH_IF_FALSE - the field is a loop counter. The range is 1 to 4096.
bool cy_stc_hppass_ac_stt_t::csgEnable[CY_HPPASS_CSG_NUM] |
CSG Slice Enable.
Must be used with the cy_stc_hppass_ac_stt_t::csgUnlock to enable or disable selected CSG Slice. Normally used in conjunction with cy_stc_hppass_ac_stt_t::action == CY_HPPASS_ACTION_WAIT_FOR and cy_stc_hppass_ac_stt_t::condition == CY_HPPASS_CONDITION_BLOCK_READY
bool cy_stc_hppass_ac_stt_t::csgDacTrig[CY_HPPASS_CSG_NUM] |
CSG Slice Trigger.
When the CSG Slice is enabled, this field can be used as CSG DAC Start or Update trigger when cy_stc_hppass_dac_t::start or cy_stc_hppass_dac_t::update is set to CY_HPPASS_DAC_START_AC and CY_HPPASS_DAC_UPDATE_AC correspondingly.
bool cy_stc_hppass_ac_stt_t::sarEnable |
SAR Enable.
Must be used with the cy_stc_hppass_ac_stt_t::sarUnlock to enable or disable selected CSG Slice. Normally used in conjunction with cy_stc_hppass_ac_stt_t::action == CY_HPPASS_ACTION_WAIT_FOR and cy_stc_hppass_ac_stt_t::condition == CY_HPPASS_CONDITION_BLOCK_READY
uint8_t cy_stc_hppass_ac_stt_t::sarGrpMsk |
The Sequencer Groups mask, use SAR Sequencer Groups mask..
When the SAR is enabled, this field can be used to trigger one ore more SAR Group entries when cy_stc_hppass_sar_grp_t::trig is set to CY_HPPASS_SAR_TRIG_AC.
cy_stc_hppass_stt_mux_t cy_stc_hppass_ac_stt_t::sarMux[CY_HPPASS_SAR_MUX_NUM] |
Array of the Muxed Sampler control settings.
Effective only if the correspondent cy_stc_hppass_sar_t::muxMode == CY_HPPASS_SAR_MUX_AC, otherwise ignored.