MTB CAT1 Peripheral driver library

General Description

Functions

void Cy_SysClk_ExtClkSetFrequency (uint32_t freq)
 Sets the signal frequency of the External Clock Source (EXTCLK) into the internal storage to be used in Cy_SysClk_ClkHfGetFrequency. More...
 
uint32_t Cy_SysClk_ExtClkGetFrequency (void)
 Returns the frequency of the External Clock Source (EXTCLK) from the internal storage. More...
 

Function Documentation

◆ Cy_SysClk_ExtClkSetFrequency()

void Cy_SysClk_ExtClkSetFrequency ( uint32_t  freq)

Sets the signal frequency of the External Clock Source (EXTCLK) into the internal storage to be used in Cy_SysClk_ClkHfGetFrequency.

Parameters
freqThe frequency of the External Clock Source.
Function Usage
/* Scenario: External precision 5MHz clock is needed to source clock path 1. */
/* Configure the external clock input pin */
#if defined(CYT2BL5CAS) || defined(CYT2B75CAS) || defined(CY_DEVICE_SERIES_XMC7100) || defined(CY_DEVICE_SERIES_XMC7200)
(void)Cy_GPIO_Pin_FastInit(GPIO_PRT21, 2, CY_GPIO_DM_HIGHZ, 0x00u, P21_2_SRSS_EXT_CLK);
#elif defined(CY_DEVICE_TVIIC2D6M)
(void)Cy_GPIO_Pin_FastInit(GPIO_PRT15, 4, CY_GPIO_DM_HIGHZ, 0x00u, P15_4_SRSS_EXT_CLK);
#else
(void)Cy_GPIO_Pin_FastInit(GPIO_PRT0, 5, CY_GPIO_DM_HIGHZ, 0x00u, P0_5_SRSS_EXT_CLK);
#endif
/* Set the EXTCLK frequency to 5MHz */
/* Set the EXTCLK as the source for clock path 1 */
/* In case if there is a need to get the EXT CLK frequency */
uint32_t extClkFreq = Cy_SysClk_ExtClkGetFrequency();

◆ Cy_SysClk_ExtClkGetFrequency()

uint32_t Cy_SysClk_ExtClkGetFrequency ( void  )

Returns the frequency of the External Clock Source (EXTCLK) from the internal storage.

Returns
The frequency of the External Clock Source.
Function Usage
/* Scenario: External precision 5MHz clock is needed to source clock path 1. */
/* Configure the external clock input pin */
#if defined(CYT2BL5CAS) || defined(CYT2B75CAS) || defined(CY_DEVICE_SERIES_XMC7100) || defined(CY_DEVICE_SERIES_XMC7200)
(void)Cy_GPIO_Pin_FastInit(GPIO_PRT21, 2, CY_GPIO_DM_HIGHZ, 0x00u, P21_2_SRSS_EXT_CLK);
#elif defined(CY_DEVICE_TVIIC2D6M)
(void)Cy_GPIO_Pin_FastInit(GPIO_PRT15, 4, CY_GPIO_DM_HIGHZ, 0x00u, P15_4_SRSS_EXT_CLK);
#else
(void)Cy_GPIO_Pin_FastInit(GPIO_PRT0, 5, CY_GPIO_DM_HIGHZ, 0x00u, P0_5_SRSS_EXT_CLK);
#endif
/* Set the EXTCLK frequency to 5MHz */
/* Set the EXTCLK as the source for clock path 1 */
/* In case if there is a need to get the EXT CLK frequency */
uint32_t extClkFreq = Cy_SysClk_ExtClkGetFrequency();