The ADC HS mode: can be ORed together and applied to the cy_stc_autanalog_sar_seq_tab_hs_t::chanEn.
Macros | |
| #define | CY_AUTANALOG_SAR_CHAN_MASK_GPIO_DISABLED (0x00000000UL) |
| The GPIO channels masks. More... | |
| #define | CY_AUTANALOG_SAR_CHAN_MASK_GPIO0 (0x00000001UL) |
| The GPIO channel 0. | |
| #define | CY_AUTANALOG_SAR_CHAN_MASK_GPIO1 (0x00000002UL) |
| The GPIO channel 1. | |
| #define | CY_AUTANALOG_SAR_CHAN_MASK_GPIO2 (0x00000004UL) |
| The GPIO channel 2. | |
| #define | CY_AUTANALOG_SAR_CHAN_MASK_GPIO3 (0x00000008UL) |
| The GPIO channel 3. | |
| #define | CY_AUTANALOG_SAR_CHAN_MASK_GPIO4 (0x00000010UL) |
| The GPIO channel 4. | |
| #define | CY_AUTANALOG_SAR_CHAN_MASK_GPIO5 (0x00000020UL) |
| The GPIO channel 5. | |
| #define | CY_AUTANALOG_SAR_CHAN_MASK_GPIO6 (0x00000040UL) |
| The GPIO channel 6. | |
| #define | CY_AUTANALOG_SAR_CHAN_MASK_GPIO7 (0x00000080UL) |
| The GPIO channel 7. | |
| #define | CY_AUTANALOG_SAR_CHAN_CFG_MUX_DISABLED (0x00000000UL) |
| The MUX channels configurations. More... | |
| #define | CY_AUTANALOG_SAR_CHAN_CFG_MUX0_SINGLE_ENDED (0x00000001UL) |
| The MUX channel 0 single ended. | |
| #define | CY_AUTANALOG_SAR_CHAN_CFG_MUX1_SINGLE_ENDED (0x00000002UL) |
| The MUX channel 1 single ended. | |
| #define | CY_AUTANALOG_SAR_CHAN_CFG_MUX0_MUX1_SINGLE_ENDED (0x00000003UL) |
| The MUX channel 0, 1 single ended. | |
| #define | CY_AUTANALOG_SAR_CHAN_CFG_MUX0_PSEUDO_DIFF (0x00000004UL) |
| The MUX channel pseudo differential. | |
| #define CY_AUTANALOG_SAR_CHAN_MASK_GPIO_DISABLED (0x00000000UL) |
The GPIO channels masks.
The GPIO channels disabled
| #define CY_AUTANALOG_SAR_CHAN_CFG_MUX_DISABLED (0x00000000UL) |
The MUX channels configurations.
The MUX channels disabled