Enumerated Types

General Description

Enumerations
enum	cy_en_autanalog_ac_status_t {   CY_AUTANALOG_AC_STATUS_STOPPED = 0UL ,   CY_AUTANALOG_AC_STATUS_RUNNING = 1UL ,   CY_AUTANALOG_AC_STATUS_PAUSED = 2UL }
	The AC operation status, see cy_stc_autanalog_state_ac_t::status, for more details, refer to the device Architecture Technical Reference Manual. More...
enum	cy_en_autanalog_stt_ac_gpio_out_t {   CY_AUTANALOG_STT_AC_GPIO_OUT_DISABLED = 0x0UL ,   CY_AUTANALOG_STT_AC_GPIO_OUT0 = 0x1UL ,   CY_AUTANALOG_STT_AC_GPIO_OUT1 = 0x2UL ,   CY_AUTANALOG_STT_AC_GPIO_OUT2 = 0x4UL ,   CY_AUTANALOG_STT_AC_GPIO_OUT3 = 0x8UL }
	The set of masks to control the four GPIO outputs with the AC, see cy_stc_autanalog_ac_t::gpioOutEn, for more details, refer to the device Architecture Technical Reference Manual. More...
enum	cy_en_autanalog_stt_ac_action_t {   CY_AUTANALOG_STT_AC_ACTION_STOP = 0UL ,   CY_AUTANALOG_STT_AC_ACTION_NEXT = 1UL ,   CY_AUTANALOG_STT_AC_ACTION_WAIT_FOR = 2UL ,   CY_AUTANALOG_STT_AC_ACTION_BRANCH_IF_TRUE = 3UL ,   CY_AUTANALOG_STT_AC_ACTION_BRANCH_IF_FALSE = 4UL ,   CY_AUTANALOG_STT_AC_ACTION_BRANCH_IF_TRUE_CLR = 5UL ,   CY_AUTANALOG_STT_AC_ACTION_BRANCH_IF_FALSE_CLR = 6UL }
	The set of ACTIONS for the AC to change the STT state, for more details, refer to the device Architecture Technical Reference Manual, State Transition Table chapter and cy_stc_autanalog_stt_ac_t::condition field in the AC STT. More...
enum	cy_en_autanalog_stt_ac_condition_t {   CY_AUTANALOG_STT_AC_CONDITION_FALSE = 0UL ,   CY_AUTANALOG_STT_AC_CONDITION_TRUE = 1UL ,   CY_AUTANALOG_STT_AC_CONDITION_BLOCK_READY = 2UL ,   CY_AUTANALOG_STT_AC_CONDITION_CNT_DONE = 3UL ,   CY_AUTANALOG_STT_AC_CONDITION_SAR_DONE = 4UL ,   CY_AUTANALOG_STT_AC_CONDITION_SAR_EOS = 5UL ,   CY_AUTANALOG_STT_AC_CONDITION_SAR_RANGE0 = 6UL ,   CY_AUTANALOG_STT_AC_CONDITION_SAR_RANGE1 = 7UL ,   CY_AUTANALOG_STT_AC_CONDITION_SAR_RANGE2 = 8UL ,   CY_AUTANALOG_STT_AC_CONDITION_SAR_RANGE3 = 9UL ,   CY_AUTANALOG_STT_AC_CONDITION_SAR_BUSY = 10UL ,   CY_AUTANALOG_STT_AC_CONDITION_SAR_FIR0_DONE = 11UL ,   CY_AUTANALOG_STT_AC_CONDITION_SAR_FIR1_DONE = 12UL ,   CY_AUTANALOG_STT_AC_CONDITION_SAR_FIFO_DONE = 13UL ,   CY_AUTANALOG_STT_AC_CONDITION_SAR_FIR0_FIFO_DONE = 14UL ,   CY_AUTANALOG_STT_AC_CONDITION_SAR_FIR1_FIFO_DONE = 15UL ,   CY_AUTANALOG_STT_AC_CONDITION_PTCOMP_STROBE0 = 16UL ,   CY_AUTANALOG_STT_AC_CONDITION_PTCOMP_STROBE1 = 17UL ,   CY_AUTANALOG_STT_AC_CONDITION_PTCOMP_CMP0 = 18UL ,   CY_AUTANALOG_STT_AC_CONDITION_PTCOMP_CMP1 = 19UL ,   CY_AUTANALOG_STT_AC_CONDITION_PTCOMP_RANGE0 = 20UL ,   CY_AUTANALOG_STT_AC_CONDITION_PTCOMP_RANGE1 = 21UL ,   CY_AUTANALOG_STT_AC_CONDITION_CTB0_CMP0 = 22UL ,   CY_AUTANALOG_STT_AC_CONDITION_CTB0_CMP1 = 23UL ,   CY_AUTANALOG_STT_AC_CONDITION_CTB1_CMP0 = 24UL ,   CY_AUTANALOG_STT_AC_CONDITION_CTB1_CMP1 = 25UL ,   CY_AUTANALOG_STT_AC_CONDITION_CHIP_ACTIVE = 32UL ,   CY_AUTANALOG_STT_AC_CONDITION_CHIP_DEEPSLEEP = 33UL ,   CY_AUTANALOG_STT_AC_CONDITION_TR_AUTANALOG_IN0 = 34UL ,   CY_AUTANALOG_STT_AC_CONDITION_TR_AUTANALOG_IN1 = 35UL ,   CY_AUTANALOG_STT_AC_CONDITION_TR_AUTANALOG_IN2 = 36UL ,   CY_AUTANALOG_STT_AC_CONDITION_TR_AUTANALOG_IN3 = 37UL ,   CY_AUTANALOG_STT_AC_CONDITION_TR_AUTANALOG_IN_WAKE = 38UL ,   CY_AUTANALOG_STT_AC_CONDITION_TIMER_DONE_WAKE = 39UL ,   CY_AUTANALOG_STT_AC_CONDITION_CTB0_CMP0_WAKE = 40UL ,   CY_AUTANALOG_STT_AC_CONDITION_CTB0_CMP1_WAKE = 41UL ,   CY_AUTANALOG_STT_AC_CONDITION_CTB1_CMP0_WAKE = 42UL ,   CY_AUTANALOG_STT_AC_CONDITION_CTB1_CMP1_WAKE = 43UL ,   CY_AUTANALOG_STT_AC_CONDITION_PTCOMP_CMP0_WAKE = 44UL ,   CY_AUTANALOG_STT_AC_CONDITION_PTCOMP_CMP1_WAKE = 45UL ,   CY_AUTANALOG_STT_AC_CONDITION_FIFO_LEVEL0 = 46UL ,   CY_AUTANALOG_STT_AC_CONDITION_FIFO_LEVEL1 = 47UL ,   CY_AUTANALOG_STT_AC_CONDITION_FIFO_LEVEL2 = 48UL ,   CY_AUTANALOG_STT_AC_CONDITION_FIFO_LEVEL3 = 49UL ,   CY_AUTANALOG_STT_AC_CONDITION_FIFO_LEVEL4 = 50UL ,   CY_AUTANALOG_STT_AC_CONDITION_FIFO_LEVEL5 = 51UL ,   CY_AUTANALOG_STT_AC_CONDITION_FIFO_LEVEL6 = 52UL ,   CY_AUTANALOG_STT_AC_CONDITION_FIFO_LEVEL7 = 53UL ,   CY_AUTANALOG_STT_AC_CONDITION_DAC0_RANGE0 = 54UL ,   CY_AUTANALOG_STT_AC_CONDITION_DAC0_RANGE1 = 55UL ,   CY_AUTANALOG_STT_AC_CONDITION_DAC0_RANGE2 = 56UL ,   CY_AUTANALOG_STT_AC_CONDITION_DAC0_EPOCH = 57UL ,   CY_AUTANALOG_STT_AC_CONDITION_DAC0_STROBE = 58UL ,   CY_AUTANALOG_STT_AC_CONDITION_DAC1_RANGE0 = 59UL ,   CY_AUTANALOG_STT_AC_CONDITION_DAC1_RANGE1 = 60UL ,   CY_AUTANALOG_STT_AC_CONDITION_DAC1_RANGE2 = 61UL ,   CY_AUTANALOG_STT_AC_CONDITION_DAC1_EPOCH = 62UL ,   CY_AUTANALOG_STT_AC_CONDITION_DAC1_STROBE = 63UL }
	The set of CONDITIONS (events) for the AC to change the STT state, for more details, refer to the device Architecture Technical Reference Manual, State Transition Table chapter and cy_stc_autanalog_stt_ac_t::condition field in the AC STT. More...
enum	cy_en_autanalog_fw_trigger_t {   CY_AUTANALOG_FW_TRIGGER0 = 0UL ,   CY_AUTANALOG_FW_TRIGGER1 = 1UL ,   CY_AUTANALOG_FW_TRIGGER2 = 2UL ,   CY_AUTANALOG_FW_TRIGGER3 = 3UL }
	The AC FW input triggers, Cy_AutAnalog_FwTrigger, for more details, refer to the device Architecture Technical Reference Manual. More...
enum	cy_en_autanalog_ac_out_trigger_idx_t {   CY_AUTANALOG_AC_OUT_TRIGGER0 = 0UL ,   CY_AUTANALOG_AC_OUT_TRIGGER1 = 1UL ,   CY_AUTANALOG_AC_OUT_TRIGGER2 = 2UL ,   CY_AUTANALOG_AC_OUT_TRIGGER3 = 3UL ,   CY_AUTANALOG_AC_OUT_TRIGGER4 = 4UL ,   CY_AUTANALOG_AC_OUT_TRIGGER5 = 5UL ,   CY_AUTANALOG_AC_OUT_TRIGGER6 = 6UL ,   CY_AUTANALOG_AC_OUT_TRIGGER7 = 7UL }
	The AC output triggers, Cy_AutAnalog_GetOutputTriggerMask and Cy_AutAnalog_SetOutputTriggerMask, for more details, refer to the device Architecture Technical Reference Manual. More...
enum	cy_en_autanalog_ac_out_trigger_mask_t {   CY_AUTANALOG_AC_OUT_TRIG_MASK_EMPTY = 0UL ,   CY_AUTANALOG_AC_OUT_TRIG_MASK_CTB0_COMP0 = 1UL << 0U ,   CY_AUTANALOG_AC_OUT_TRIG_MASK_CTB0_COMP1 = 1UL << 1U ,   CY_AUTANALOG_AC_OUT_TRIG_MASK_CTB1_COMP0 = 1UL << 2U ,   CY_AUTANALOG_AC_OUT_TRIG_MASK_CTB1_COMP1 = 1UL << 3U ,   CY_AUTANALOG_AC_OUT_TRIG_MASK_PTCOMP_CMP0 = 1UL << 4U ,   CY_AUTANALOG_AC_OUT_TRIG_MASK_PTCOMP_CMP1 = 1UL << 5U ,   CY_AUTANALOG_AC_OUT_TRIG_MASK_PTCOMP_RANGE0 = 1UL << 6U ,   CY_AUTANALOG_AC_OUT_TRIG_MASK_PTCOMP_RANGE1 = 1UL << 7U ,   CY_AUTANALOG_AC_OUT_TRIG_MASK_DAC0_RANGE0 = 1UL << 8U ,   CY_AUTANALOG_AC_OUT_TRIG_MASK_DAC0_RANGE1 = 1UL << 9U ,   CY_AUTANALOG_AC_OUT_TRIG_MASK_DAC0_RANGE2 = 1UL << 10U ,   CY_AUTANALOG_AC_OUT_TRIG_MASK_DAC0_EPOCH = 1UL << 11U ,   CY_AUTANALOG_AC_OUT_TRIG_MASK_DAC1_RANGE0 = 1UL << 13U ,   CY_AUTANALOG_AC_OUT_TRIG_MASK_DAC1_RANGE1 = 1UL << 14U ,   CY_AUTANALOG_AC_OUT_TRIG_MASK_DAC1_RANGE2 = 1UL << 15U ,   CY_AUTANALOG_AC_OUT_TRIG_MASK_DAC1_EPOCH = 1UL << 16U ,   CY_AUTANALOG_AC_OUT_TRIG_MASK_FIFO_LEVEL0 = 1UL << 17U ,   CY_AUTANALOG_AC_OUT_TRIG_MASK_SAR_DONE = 1UL << 18U ,   CY_AUTANALOG_AC_OUT_TRIG_MASK_SAR_EOS = 1UL << 19U ,   CY_AUTANALOG_AC_OUT_TRIG_MASK_FIFO_LEVEL1 = 1UL << 20U ,   CY_AUTANALOG_AC_OUT_TRIG_MASK_SAR_RANGE0 = 1UL << 21U ,   CY_AUTANALOG_AC_OUT_TRIG_MASK_SAR_RANGE1 = 1UL << 22U ,   CY_AUTANALOG_AC_OUT_TRIG_MASK_SAR_RANGE2 = 1UL << 23U ,   CY_AUTANALOG_AC_OUT_TRIG_MASK_SAR_RANGE3 = 1UL << 24U ,   CY_AUTANALOG_AC_OUT_TRIG_MASK_FIFO_LEVEL2 = 1UL << 25U ,   CY_AUTANALOG_AC_OUT_TRIG_MASK_FIFO_LEVEL3 = 1UL << 26U ,   CY_AUTANALOG_AC_OUT_TRIG_MASK_FIFO_LEVEL4 = 1UL << 27U ,   CY_AUTANALOG_AC_OUT_TRIG_MASK_FIFO_LEVEL5 = 1UL << 28U ,   CY_AUTANALOG_AC_OUT_TRIG_MASK_FIFO_LEVEL6 = 1UL << 29U ,   CY_AUTANALOG_AC_OUT_TRIG_MASK_FIFO_LEVEL7 = 1UL << 30U ,   CY_AUTANALOG_AC_OUT_TRIG_MASK_AC = ((int32_t)(1UL << 31U)) }
	The set of masks to control the AC output trigger, see cy_stc_autanalog_ac_t::mask and Cy_AutAnalog_GetOutputTriggerMask, Cy_AutAnalog_SetOutputTriggerMask. More...
enum	cy_en_autanalog_timer_clk_src_t {   CY_AUTANALOG_TIMER_CLK_LP = 0UL ,   CY_AUTANALOG_TIMER_CLK_LF = 1UL }
	The AC clock source for wake-up Timer, see cy_stc_autanalog_timer_t::clkSrc, for more details, refer to the device Architecture Technical Reference Manual. More...

Enumeration Type Documentation

cy_en_autanalog_ac_status_t

enum cy_en_autanalog_ac_status_t

The AC operation status, see cy_stc_autanalog_state_ac_t::status, for more details, refer to the device Architecture Technical Reference Manual.

Enumerator
CY_AUTANALOG_AC_STATUS_STOPPED	The AC is idle.
CY_AUTANALOG_AC_STATUS_RUNNING	The AC is running.
CY_AUTANALOG_AC_STATUS_PAUSED	The AC is paused.

cy_en_autanalog_stt_ac_gpio_out_t

enum cy_en_autanalog_stt_ac_gpio_out_t

The set of masks to control the four GPIO outputs with the AC, see cy_stc_autanalog_ac_t::gpioOutEn, for more details, refer to the device Architecture Technical Reference Manual.

Enumerator
CY_AUTANALOG_STT_AC_GPIO_OUT_DISABLED	Control of the GPIO outs is disabled.
CY_AUTANALOG_STT_AC_GPIO_OUT0	The GPIO out0.
CY_AUTANALOG_STT_AC_GPIO_OUT1	The GPIO out1.
CY_AUTANALOG_STT_AC_GPIO_OUT2	The GPIO out2.
CY_AUTANALOG_STT_AC_GPIO_OUT3	The GPIO out3.

cy_en_autanalog_stt_ac_action_t

enum cy_en_autanalog_stt_ac_action_t

The set of ACTIONS for the AC to change the STT state, for more details, refer to the device Architecture Technical Reference Manual, State Transition Table chapter and cy_stc_autanalog_stt_ac_t::condition field in the AC STT.

Enumerator
CY_AUTANALOG_STT_AC_ACTION_STOP	Stop the AC.
CY_AUTANALOG_STT_AC_ACTION_NEXT	Proceed to the next state in the STT.
CY_AUTANALOG_STT_AC_ACTION_WAIT_FOR	Wait (indefinitely) for the associated CONDITION to be TRUE before moving to the next state, see cy_stc_autanalog_stt_ac_t::condition.
CY_AUTANALOG_STT_AC_ACTION_BRANCH_IF_TRUE	Check if CONDITION has occurred If it occurred, take the indicated branch cy_stc_autanalog_stt_ac_t::branchState, if not, proceed to the next state.
CY_AUTANALOG_STT_AC_ACTION_BRANCH_IF_FALSE	Check if CONDITION has occurred If it occurred, proceed to the next state, if not, take the indicated branch cy_stc_autanalog_stt_ac_t::branchState. Note When programming the AC to jump back to a particular state, it is recommended to use ACTION = BRANCH_IF_TRUE, CONDITION = TRUE. Avoid using ACTION = BRANCH_IF_FALSE, CONDITION = FALSE, as it could may cause unexpected issues.
CY_AUTANALOG_STT_AC_ACTION_BRANCH_IF_TRUE_CLR	Check if CONDITION has occurred If it occurred, take the indicated branch cy_stc_autanalog_stt_ac_t::branchState, if not, proceed to the next state. Note If the indicated branch is taken, all loop counters are cleared (reset). If the CONDITION is set to CNT_DONE, (cy_en_autanalog_stt_ac_condition_t) then the loop counters are not cleared (reset).
CY_AUTANALOG_STT_AC_ACTION_BRANCH_IF_FALSE_CLR	Check if CONDITION has occurred If it occurred proceed to the next state, if not, take the indicated branch. Note If the indicated branch is taken, all loop counters are cleared (reset). If the CONDITION is set to CNT_DONE, (cy_en_autanalog_stt_ac_condition_t) then the loop counters are not cleared (reset). When programming the AC to jump back to a particular state, it is recommended to use ACTION = BRANCH_IF_TRUE_CLR, CONDITION = TRUE. Avoid using ACTION = BRANCH_IF_FALSE_CLR, CONDITION = FALSE, as it could may cause unexpected issues.

cy_en_autanalog_stt_ac_condition_t

enum cy_en_autanalog_stt_ac_condition_t

The set of CONDITIONS (events) for the AC to change the STT state, for more details, refer to the device Architecture Technical Reference Manual, State Transition Table chapter and cy_stc_autanalog_stt_ac_t::condition field in the AC STT.

Enumerator
CY_AUTANALOG_STT_AC_CONDITION_FALSE	Unconditionally FALSE.
CY_AUTANALOG_STT_AC_CONDITION_TRUE	Unconditionally TRUE.
CY_AUTANALOG_STT_AC_CONDITION_BLOCK_READY	Enabled subsystems of the Autonomous Analog are initialized and ready for use.
CY_AUTANALOG_STT_AC_CONDITION_CNT_DONE	Run-out for an interval timer if the ACTION is WAIT_FOR, or run-out for a loop counter, if the ACTION is BRANCH IF (cy_en_autanalog_stt_ac_action_t)
CY_AUTANALOG_STT_AC_CONDITION_SAR_DONE	SAR Sequencer DONE. This status is sticky. It is set by the SAR when finishing a state in the SAR sequencer table (HS/LP) where NEXT_STATE cy_stc_autanalog_sar_seq_tab_hs_t::nextAction or cy_stc_autanalog_sar_seq_tab_lp_t::nextAction is set to STOP. Do not use this field if the SAR is configured for CONTINUOUS operation (i.e. NEXT_STATE is set to GO_TO_ENTRY_ADDRESS, see cy_en_autanalog_sar_next_act_t). The status is cleared by the AC when any of the following occur: Executing an AC state where ACTION is set to WAIT_FOR or BRANCH_IF_* and CONDITION is set to SAR_DONE. Executing an AC state where ACTION is set to WAIT_FOR and CONDITION is set to any of the *_WAKE. Pausing the AC, see Cy_AutAnalog_PauseAutonomousControl or Cy_AutAnalog_SingleStepAutonomousControl Disabling the AC, see Cy_AutAnalog_Disable Disabling the SAR, see cy_stc_autanalog_stt_sar_t::enable Note No overflow indication is provided for this bit. Therefore, it is up to the user to program the AC to read this status before an overflow occurs (multiple SAR_DONEs). This status does NOT indicate that the SAR data has been written to the FIFO (indicated by SAR_FIFO_DONE).
CY_AUTANALOG_STT_AC_CONDITION_SAR_EOS	SAR End of Scan (EOS). This status is sticky. It is set by the SAR when finishing the state in the SAR sequencer table (HS/LP) NEXT_STATE cy_stc_autanalog_sar_seq_tab_hs_t::nextAction or cy_stc_autanalog_sar_seq_tab_lp_t::nextAction is set to GO_TO_ENTRY_ADDRESS or STOP, see cy_en_autanalog_sar_next_act_t. The status is cleared by the AC when executing an AC state with the CONDITION programmed to SAR_EOS. The status is cleared by the AC when any of the following occur: Executing an AC state where ACT is set to WAIT_FOR or BRANCH_IF_* and COND is set to SAR_EOS. Executing an AC state where ACT is set to WAIT_FOR and CONDITION is set to any of the *_WAKE. Pausing the AC, see Cy_AutAnalog_PauseAutonomousControl or Cy_AutAnalog_SingleStepAutonomousControl Disabling the AC, see Cy_AutAnalog_Disable Disabling the SAR, see cy_stc_autanalog_stt_sar_t::enable Note No overflow indication is provided for this bit. Therefore, it is up to the user to program the AC to read this status before an overflow occurs (multiple SAR_EOSs).
CY_AUTANALOG_STT_AC_CONDITION_SAR_RANGE0	SAR Range 0 detection. This status is sticky. It is set by the SAR if the RANGE0 condition is met for a given channel with range 0 status enabled: cy_stc_autanalog_sar_mux_chan_t::muxLimit is equal to CY_AUTANALOG_SAR_LIMIT_STATUS_STC0 for LP/HS modes OR cy_stc_autanalog_sar_hs_chan_t::hsLimit is equal to CY_AUTANALOG_SAR_LIMIT_STATUS_STC0 for HS mode. The status is cleared by the AC when any of the following occur: Executing an AC state where ACTION is set to WAIT_FOR or BRANCH_IF_* and CONDITION is set to SAR_RANGE0. Executing an AC state where ACTION is set to WAIT_FOR and CONDITION is set to any of the *_WAKE. Pausing the AC, see Cy_AutAnalog_PauseAutonomousControl or Cy_AutAnalog_SingleStepAutonomousControl Disabling the AC, see Cy_AutAnalog_Disable Disabling the SAR, see cy_stc_autanalog_stt_sar_t::enable Note No overflow indication is provided for this bit. Therefore, it is up to the user to program the AC to read this status before an overflow occurs (multiple SAR_RANGE0s).
CY_AUTANALOG_STT_AC_CONDITION_SAR_RANGE1	SAR Range 1 detection. It is similar to range 0 detection.
CY_AUTANALOG_STT_AC_CONDITION_SAR_RANGE2	SAR Range 2 detection. It is similar to range 0 detection.
CY_AUTANALOG_STT_AC_CONDITION_SAR_RANGE3	SAR Range 3 detection. It is similar to range 0 detection.
CY_AUTANALOG_STT_AC_CONDITION_SAR_BUSY	SAR BUSY detection. This status is set whenever the SAR is running a scan. This status is transparent from the SAR sequencer (i.e. the status is not sticky).
CY_AUTANALOG_STT_AC_CONDITION_SAR_FIR0_DONE	SAR FIR0 done detection. This status is sticky. It is set by the SAR FIR0 block whenever FIR0 produces a valid output. The status is cleared by the AC when any of the following occur: Executing an AC state where ACTION is set to WAIT_FOR or BRANCH_IF_* and CONDITION is set to SAR_FIR0_DONE. Executing an AC state where ACTION is set to WAIT_FOR and CONDITION is set to any of the *_WAKE. Pausing the AC, see Cy_AutAnalog_PauseAutonomousControl or Cy_AutAnalog_SingleStepAutonomousControl Disabling the AC, see Cy_AutAnalog_Disable Disabling the SAR, see cy_stc_autanalog_stt_sar_t::enable Note No overflow indication is provided for this bit. Therefore, it is up to the user to program the AC to read this status before an overflow occurs (multiple SAR_FIR0_DONEs). This status does NOT indicate that the FIR0 data has been written to the FIFO (indicated by SAR_FIR0_FIFO_DONE).
CY_AUTANALOG_STT_AC_CONDITION_SAR_FIR1_DONE	SAR FIR1 done detection. It is similar to FIR0 done detection.
CY_AUTANALOG_STT_AC_CONDITION_SAR_FIFO_DONE	SAR FIFO done. This status is SAR_DONE ANDED with FIFO writing complete. Do not use this field if the SAR is configured for for CONTINUOUS operation (i.e. NEXT_STATE is set to GO_TO_ENTRY_ADDRESS, see cy_en_autanalog_sar_next_act_t) since SAR_DONE is never asserted. In that case, use the appropriate FIFO_LEVEL triggers. The status is cleared by the AC when any of the following occur: Executing an AC state where ACTION is set to WAIT_FOR or BRANCH_IF_* and CONDITION is set to SAR_FIFO_DONE. Executing an AC state where ACTION is set to WAIT_FOR and CONDITION is set to any of the *_WAKE. Pausing the AC, see Cy_AutAnalog_PauseAutonomousControl or Cy_AutAnalog_SingleStepAutonomousControl Disabling the AC, see Cy_AutAnalog_Disable Disabling the SAR, see cy_stc_autanalog_stt_sar_t::enable Note No overflow indication is provided for this bit. Therefore, it is up to the user to program the AC to read this status before an overflow occurs (multiple SAR_FIFO_DONEs). This status does NOT indicate that the SAR data has been written to the FIFO (indicated by SAR_FIFO_DONE).
CY_AUTANALOG_STT_AC_CONDITION_SAR_FIR0_FIFO_DONE	SAR FIR0 FIFO done detection. This status is sticky. It is set by the SAR FIR0 block whenever FIR0 data has been written into the FIFO. When using this bit, it is expected that FIR0 writes to the FIFO only once in a given SAR scan. The status is cleared by the AC when any of the following occur: Executing an AC state where ACTION is set to WAIT_FOR or BRANCH_IF_* and CONDITION is set to SAR_FIR0_FIFO_DONE. Executing an AC state where ACTION is set to WAIT_FOR and CONDITION is set to any of the *_WAKE. Pausing the AC, see Cy_AutAnalog_PauseAutonomousControl or Cy_AutAnalog_SingleStepAutonomousControl Disabling the AC, see Cy_AutAnalog_Disable Disabling the SAR, see cy_stc_autanalog_stt_sar_t::enable Note No overflow indication is provided for this bit. Therefore, it is up to the user to program the AC to read this status before an overflow occurs (multiple SAR_FIR0_FIFO_DONEs).
CY_AUTANALOG_STT_AC_CONDITION_SAR_FIR1_FIFO_DONE	SAR FIR1 FIFO done detection. It is similar to SAR FIR0 FIFO done detection.
CY_AUTANALOG_STT_AC_CONDITION_PTCOMP_STROBE0	PTComp Post Processor 0 Strobe. This status is set whenever the PTComp Post Processor 0 has valid data. This status is transparent from the PTComp post processor (i.e. the status is not sticky). The AC needs to poll this status (i.e. ACTION is WAIT_FOR and CONDITION is PTCOMP_STROBE0) prior to checking PTC_RANGE0.
CY_AUTANALOG_STT_AC_CONDITION_PTCOMP_STROBE1	PTComp Post Processor 1 Strobe. It is similar to PTComp Post Processor 0 Strobe.
CY_AUTANALOG_STT_AC_CONDITION_PTCOMP_CMP0	PTComp COMP0 output. This status is sticky. It is set by the PTComp Comparator 0 if the condition is met. (Cy_AutAnalog_PTComp_Read). The status is cleared by the AC when any of the following occur: Executing an AC state where ACTION is set to WAIT_FOR or BRANCH_IF_* and CONDITION is set to PTCOMP_CMP0. Executing an AC state where ACT is set to WAIT_FOR and CONDITION is set to any of the *_WAKE. Pausing the AC, see Cy_AutAnalog_PauseAutonomousControl or Cy_AutAnalog_SingleStepAutonomousControl Disabling the AC, see Cy_AutAnalog_Disable Disabling PTComp comparator 0 (by clearing cy_stc_autanalog_stt_ptcomp_t::enableComp0) Note No overflow indication is provided for this bit. Therefore, it is up to the user to program the AC to read this status before an overflow occurs (multiple PTC_CMP0s).
CY_AUTANALOG_STT_AC_CONDITION_PTCOMP_CMP1	PTComp COMP1 output. It is similar to PTComp COMP1 output.
CY_AUTANALOG_STT_AC_CONDITION_PTCOMP_RANGE0	PTComp Post Processor 0 Range output. This status is sticky. It is set by the PTComp Post Processor if the RANGE0 condition is met (cy_stc_autanalog_ptcomp_comp_pp_t::limitCondition). The status is cleared by the AC when any of the following occur: Executing an AC state where ACTION is set to WAIT_FOR or BRANCH_IF_* and CONDITION is set to PTCOMP_RANGE0. Executing an AC state where ACTION is set to WAIT_FOR and CONDITION is set to any of the *_WAKE. Pausing the AC, see Cy_AutAnalog_PauseAutonomousControl or Cy_AutAnalog_SingleStepAutonomousControl Disabling the AC, see Cy_AutAnalog_Disable Disabling both PTComp comparators (by clearing cy_stc_autanalog_stt_ptcomp_t::enableComp0 and cy_stc_autanalog_stt_ptcomp_t::enableComp1) Note No overflow indication is provided for this bit. Therefore, it is up to the user to program the AC to read this status before an overflow occurs (multiple PTCOMP_RANGE0s).
CY_AUTANALOG_STT_AC_CONDITION_PTCOMP_RANGE1	PTComp Post Processor 1 Range output. It is similar to PTComp Post Processor 0 Range output.
CY_AUTANALOG_STT_AC_CONDITION_CTB0_CMP0	CTB0 COMP0 output. This status is sticky. It is set by the CTB0 Opamp0 Comparator if the condition is met (cy_stc_autanalog_ctb_sta_t::intComp0). The status is cleared by the AC when any of the following occur: Executing an AC state where ACTION is set to WAIT_FOR or BRANCH_IF_* and CONDITION is set to CTB0_CMP0. Executing an AC state where ACTION is set to WAIT_FOR and CONDITION is set to any of the *_WAKE. Pausing the AC, see Cy_AutAnalog_PauseAutonomousControl or Cy_AutAnalog_SingleStepAutonomousControl Disabling the AC, see Cy_AutAnalog_Disable Disabling CTB0 opamp0 (by clearing cy_stc_autanalog_stt_ctb_t::enableOpamp0) Note No overflow indication is provided for this bit. Therefore, it is up to the user to program the AC to read this status before an overflow occurs (multiple CTB0_CMP0s).
CY_AUTANALOG_STT_AC_CONDITION_CTB0_CMP1	CTB0 COMP1 output. It is similar to CTB0 COMP0 output.
CY_AUTANALOG_STT_AC_CONDITION_CTB1_CMP0	CTB1 COMP0 output. It is similar to CTB0 COMP0 output.
CY_AUTANALOG_STT_AC_CONDITION_CTB1_CMP1	CTB1 COMP1 output. It is similar to CTB0 COMP0 output.
CY_AUTANALOG_STT_AC_CONDITION_CHIP_ACTIVE	Chip Active Mode Status. This status is set whenever the system is operating in Active Mode (this includes all Low Power active modes)
CY_AUTANALOG_STT_AC_CONDITION_CHIP_DEEPSLEEP	Chip DeepSleep Mode Status. This status is set whenever the system is operating in DeepsSeep Mode (this includes all RAM power modes in DeepSleep)
CY_AUTANALOG_STT_AC_CONDITION_TR_AUTANALOG_IN0	External trigger 0 (or the FW trigger 0). This status is sticky. It is set by the either the external hardware trigger 0 or FW trigger 0 asserting. The status is cleared by the AC when any of the following occur: Executing an AC state where ACTION is set to WAIT_FOR or BRANCH_IF_* and CONDITION is set to TR_AUTANALOG_IN0. Executing an AC state where ACTION is set to WAIT_FOR and CONDITION is set to any of the *_WAKE. Pausing the AC, see Cy_AutAnalog_PauseAutonomousControl or Cy_AutAnalog_SingleStepAutonomousControl Disabling the AC, see Cy_AutAnalog_Disable Note No overflow indication is provided for this bit. Therefore, it is up to the user to program the AC to read this status before an overflow occurs (multiple TR_LPPASS_IN0s).
CY_AUTANALOG_STT_AC_CONDITION_TR_AUTANALOG_IN1	External trigger 1 (or the FW trigger 1). It is similar to External trigger 0.
CY_AUTANALOG_STT_AC_CONDITION_TR_AUTANALOG_IN2	External trigger 2 (or the FW trigger 2). It is similar to External trigger 0.
CY_AUTANALOG_STT_AC_CONDITION_TR_AUTANALOG_IN3	External trigger 3 (or the FW trigger 3). It is similar to External trigger 0.
CY_AUTANALOG_STT_AC_CONDITION_TR_AUTANALOG_IN_WAKE	External Trigger Wake-up Source. This condition is used to put the AC to sleep. Note When using this condition, the ACTION must be set to WAIT_FOR. The AC will wake up when any external trigger [0-3] is asserted. When the AC is sleeping, all registered AC conditions are cleared.
CY_AUTANALOG_STT_AC_CONDITION_TIMER_DONE_WAKE	Timer Wakeup Source. This condition is used to put the AC to sleep. The AC will wake from sleep when the Wake-up Timer reaches terminal count (cy_stc_autanalog_state_t::tc). Note When using this condition, the ACTION must be set to WAIT_FOR. The Wake-up Timer must also be configured (cy_stc_autanalog_ac_t::timer). When the AC is sleeping, all registered AC conditions are cleared.
CY_AUTANALOG_STT_AC_CONDITION_CTB0_CMP0_WAKE	CTB0 comparator 0 wake-up. This condition is used to put the AC to sleep. The AC will wake up when CTB0 Comparator 0 meets the configured wake-up condition. Note When using this condition, the ACTION must be set to WAIT_FOR. The comparator wake-up condition is configured per cy_stc_autanalog_ctb_sta_t::intComp0. The CTB0 comparator 0 must be enabled during sleep (cy_stc_autanalog_stt_ctb_t::enableOpamp0). When the AC is sleeping, all registered AC conditions are cleared.
CY_AUTANALOG_STT_AC_CONDITION_CTB0_CMP1_WAKE	CTB0 comparator 1 wake-up. It is similar to CTB0 comparator 0 wake-up.
CY_AUTANALOG_STT_AC_CONDITION_CTB1_CMP0_WAKE	CTB1 comparator 0 wake-up. It is similar to CTB0 comparator 0 wake-up.
CY_AUTANALOG_STT_AC_CONDITION_CTB1_CMP1_WAKE	CTB1 comparator 1 wake-up. It is similar to CTB0 comparator 0 wake-up.
CY_AUTANALOG_STT_AC_CONDITION_PTCOMP_CMP0_WAKE	PTComp comparator 0 wake-up. This condition is used to put the AC to sleep. The AC will wake up when PTComp Comparator 0 meets the configured wake-up condition. Note When using this condition, the ACTION must be set to WAIT_FOR. The comparator wake-up condition is configured per cy_stc_autanalog_ptcomp_comp_sta_t::compEdgeComp0. The PTC comparator 0 be enabled during aa sleep (cy_stc_autanalog_stt_ptcomp_t::enableComp0). When the AC is sleeping, all registered AC conditions are cleared.
CY_AUTANALOG_STT_AC_CONDITION_PTCOMP_CMP1_WAKE	PTComp comparator 1 wake-up. It is similar to PTComp comparator 0 wake-up.
CY_AUTANALOG_STT_AC_CONDITION_FIFO_LEVEL0	FIFO Level 0 trigger. This status is transparent from the FIFO (i.e. the status is not sticky). This status is set whenever FIFO0 level condition has been met (cy_stc_autanalog_fifo_cfg_t::level).
CY_AUTANALOG_STT_AC_CONDITION_FIFO_LEVEL1	FIFO Level 1 trigger. It is similar to FIFO Level 0 trigger. Note This status requires that corresponding buffers be enabled and configured.
CY_AUTANALOG_STT_AC_CONDITION_FIFO_LEVEL2	FIFO Level 2 trigger. It is similar to FIFO Level 0 trigger. Note This status requires that corresponding buffers be enabled and configured.
CY_AUTANALOG_STT_AC_CONDITION_FIFO_LEVEL3	FIFO Level 3 trigger. It is similar to FIFO Level 0 trigger. Note This status requires that corresponding buffers be enabled and configured.
CY_AUTANALOG_STT_AC_CONDITION_FIFO_LEVEL4	FIFO Level 4 trigger. It is similar to FIFO Level 0 trigger. Note This status requires that corresponding buffers be enabled and configured.
CY_AUTANALOG_STT_AC_CONDITION_FIFO_LEVEL5	FIFO Level 5 trigger. It is similar to FIFO Level 0 trigger. Note This status requires that corresponding buffers be enabled and configured.
CY_AUTANALOG_STT_AC_CONDITION_FIFO_LEVEL6	FIFO Level 6 trigger. It is similar to FIFO Level 0 trigger. Note This status requires that corresponding buffers be enabled and configured.
CY_AUTANALOG_STT_AC_CONDITION_FIFO_LEVEL7	FIFO Level 7 trigger. It is similar to FIFO Level 0 trigger. Note This status requires that corresponding buffers be enabled and configured.
CY_AUTANALOG_STT_AC_CONDITION_DAC0_RANGE0	DAC0 Range 0 detection. This status is sticky. It is set by the DAC0 if the RANGE0 condition is met for a given channel with range 0 status enabled (i.e. cy_stc_autanalog_dac_ch_t::statSel). This status is not used when DAC0 is configured for FW mode. The status is cleared by the AC when any of the following occur: Executing an AC state where ACTION is set to WAIT_FOR or BRANCH_IF_* and CONDITION is set to DAC0_RANGE0. Executing an AC state where ACTION is set to WAIT_FOR and CONDITION is set to any of the *_WAKE. Pausing the AC, see Cy_AutAnalog_PauseAutonomousControl or Cy_AutAnalog_SingleStepAutonomousControl Disabling the AC, see Cy_AutAnalog_Disable Disabling the DAC0 (by clearing cy_stc_autanalog_stt_dac_t::enable). Note No overflow indication is provided for this bit. Therefore, it is up to the user to program the AC to read this status before an overflow occurs (multiple DAC0_RANGE0s).
CY_AUTANALOG_STT_AC_CONDITION_DAC0_RANGE1	DAC0 Range 1 detection. It is similar to DAC0 Range 0 detection
CY_AUTANALOG_STT_AC_CONDITION_DAC0_RANGE2	DAC0 Range 2 detection. It is similar to DAC0 Range 0 detection
CY_AUTANALOG_STT_AC_CONDITION_DAC0_EPOCH	DAC0 End of Waveform event. This status is sticky. It is set by the DAC when finishing a waveform. This condition is only used if the DAC channel (pointed to by the AC when triggered) is configured for LUT mode. The status is cleared by the AC when any of the following occur: Executing an AC state where ACTION is set to WAIT_FOR or BRANCH_IF_* and CONDITION is set to DAC0_EPOCH. 2 Executing an AC state where ACTION is set to WAIT_FOR and CONDITION is set to any of the *_WAKE. Pausing the AC, see Cy_AutAnalog_PauseAutonomousControl or Cy_AutAnalog_SingleStepAutonomousControl Disabling the AC, see Cy_AutAnalog_Disable Disabling the DAC (by clearing cy_stc_autanalog_stt_dac_t::enable) Note No overflow indication is provided for this bit. Therefore, it is up to the user to program the AC to read this status before an overflow occurs (multiple DAC0_EPOCHs).
CY_AUTANALOG_STT_AC_CONDITION_DAC0_STROBE	DAC0 Strobe. This status is transparent from the DAC (i.e. the status is not sticky). This status is set whenever the DAC output has been updated. This status is typically used by the AC to poll when the DAC has responded to the DAC_INC/DAC_DEC fields. Note The AC needs to poll this status (i.e. ACTION is WAIT_FOR and CONDITION is DAC0_STROBE) prior to checking DAC_RANGE0 - DAC_RANGE2 or setting DAC_INC/DAC_DEC fields.
CY_AUTANALOG_STT_AC_CONDITION_DAC1_RANGE0	DAC1 Range 0 detection. It is similar to DAC0 Range 0 detection.
CY_AUTANALOG_STT_AC_CONDITION_DAC1_RANGE1	DAC1 Range 1 detection. It is similar to DAC0 Range 1 detection.
CY_AUTANALOG_STT_AC_CONDITION_DAC1_RANGE2	DAC1 Range 2 detection. It is similar to DAC0 Range 2 detection.
CY_AUTANALOG_STT_AC_CONDITION_DAC1_EPOCH	DAC1 End of Waveform event. It is similar to DAC0 End of Waveform event.
CY_AUTANALOG_STT_AC_CONDITION_DAC1_STROBE	DAC1 Strobe. It is similar to DAC0 Strobe.

cy_en_autanalog_fw_trigger_t

enum cy_en_autanalog_fw_trigger_t

The AC FW input triggers, Cy_AutAnalog_FwTrigger, for more details, refer to the device Architecture Technical Reference Manual.

Enumerator
CY_AUTANALOG_FW_TRIGGER0	FW trigger 0.
CY_AUTANALOG_FW_TRIGGER1	FW trigger 1.
CY_AUTANALOG_FW_TRIGGER2	FW trigger 2.
CY_AUTANALOG_FW_TRIGGER3	FW trigger 3.

cy_en_autanalog_ac_out_trigger_idx_t

enum cy_en_autanalog_ac_out_trigger_idx_t

The AC output triggers, Cy_AutAnalog_GetOutputTriggerMask and Cy_AutAnalog_SetOutputTriggerMask, for more details, refer to the device Architecture Technical Reference Manual.

Enumerator
CY_AUTANALOG_AC_OUT_TRIGGER0	Output trigger 0.
CY_AUTANALOG_AC_OUT_TRIGGER1	Output trigger 1.
CY_AUTANALOG_AC_OUT_TRIGGER2	Output trigger 2.
CY_AUTANALOG_AC_OUT_TRIGGER3	Output trigger 3.
CY_AUTANALOG_AC_OUT_TRIGGER4	Output trigger 4.
CY_AUTANALOG_AC_OUT_TRIGGER5	Output trigger 5.
CY_AUTANALOG_AC_OUT_TRIGGER6	Output trigger 6.
CY_AUTANALOG_AC_OUT_TRIGGER7	Output trigger 7.

cy_en_autanalog_ac_out_trigger_mask_t

enum cy_en_autanalog_ac_out_trigger_mask_t

The set of masks to control the AC output trigger, see cy_stc_autanalog_ac_t::mask and Cy_AutAnalog_GetOutputTriggerMask, Cy_AutAnalog_SetOutputTriggerMask.

For more details, refer to the device Architecture Technical Reference Manual.

Enumerator
CY_AUTANALOG_AC_OUT_TRIG_MASK_EMPTY	The output trigger is disabled.
CY_AUTANALOG_AC_OUT_TRIG_MASK_CTB0_COMP0	The CTB0, Comp0 trigger. It is generated by the CTB0 Opamp0 Comparator if the condition is met (i.e. cy_stc_autanalog_ctb_sta_t::intComp0)
CY_AUTANALOG_AC_OUT_TRIG_MASK_CTB0_COMP1	The CTB0, Comp1 trigger. It is generated by the CTB0 Opamp1 Comparator if the condition is met (i.e. cy_stc_autanalog_ctb_sta_t::intComp1)
CY_AUTANALOG_AC_OUT_TRIG_MASK_CTB1_COMP0	The CTB1, Comp0 trigger. It is similar to CTB0, Comp0 trigger.
CY_AUTANALOG_AC_OUT_TRIG_MASK_CTB1_COMP1	The CTB1, Comp1 trigger. It is similar to CTB1, Comp1 trigger.
CY_AUTANALOG_AC_OUT_TRIG_MASK_PTCOMP_CMP0	The PTComp Comp0 trigger. It is set by the PTComp Comparator 0 if the condition is met (cy_stc_autanalog_ptcomp_comp_sta_t::compEdgeComp0).
CY_AUTANALOG_AC_OUT_TRIG_MASK_PTCOMP_CMP1	The PTComp Comp1 trigger. It is similar to PTComp Comp0 trigger.
CY_AUTANALOG_AC_OUT_TRIG_MASK_PTCOMP_RANGE0	The PTComp Post Processor 0 Range trigger It is generated by the PTComp Post Processor if the RANGE0 condition is met (cy_stc_autanalog_ptcomp_comp_pp_t::limitCondition)
CY_AUTANALOG_AC_OUT_TRIG_MASK_PTCOMP_RANGE1	The PTComp Post Processor 1 Range trigger. It is similar to PTComp Post Processor 0 Range trigger.
CY_AUTANALOG_AC_OUT_TRIG_MASK_DAC0_RANGE0	The DAC0 Range 0 trigger. It is generated by the DAC0 if the RANGE0 condition is met for a given channel with range 0 status enabled (cy_stc_autanalog_dac_ch_t::statSel). Note The interrupt is disabled when DAC0 is configured for FW mode.
CY_AUTANALOG_AC_OUT_TRIG_MASK_DAC0_RANGE1	The DAC0 Range 1 trigger. It is similar to DAC0 Range 0 trigger.
CY_AUTANALOG_AC_OUT_TRIG_MASK_DAC0_RANGE2	The DAC0 Range 2 trigger. It is similar to DAC0 Range 0 trigger.
CY_AUTANALOG_AC_OUT_TRIG_MASK_DAC0_EPOCH	The DAC0 End of Waveform trigger. It is generated by DAC0 when finishing a waveform. This condition is only used if the DAC0 channel (pointed to by the AC when triggered) is configured for LUT mode.
CY_AUTANALOG_AC_OUT_TRIG_MASK_DAC1_RANGE0	The DAC1 Range 0 trigger. It is similar to DAC0 Range 0 trigger.
CY_AUTANALOG_AC_OUT_TRIG_MASK_DAC1_RANGE1	The DAC1 Range 1 trigger. It is similar to DAC0 Range 1 trigger.
CY_AUTANALOG_AC_OUT_TRIG_MASK_DAC1_RANGE2	The DAC1 Range 2 trigger. It is similar to DAC0 Range 2 trigger.
CY_AUTANALOG_AC_OUT_TRIG_MASK_DAC1_EPOCH	The DAC1 End of Waveform trigger. It is similar to DAC0 End of Waveform trigger.
CY_AUTANALOG_AC_OUT_TRIG_MASK_FIFO_LEVEL0	The FIFO Level 0 trigger. This is a level-sensitive trigger that is generated by the FIFO whenever FIFO 0 meets the condition cy_stc_autanalog_fifo_cfg_t::level
CY_AUTANALOG_AC_OUT_TRIG_MASK_SAR_DONE	The SAR Sequencer Done trigger. This trigger is set by the SAR when finishing a state in the SAR sequencer table (HS or LP) where cy_stc_autanalog_sar_seq_tab_hs_t::nextAction or cy_stc_autanalog_sar_seq_tab_lp_t::nextAction is set to STOP. Note The interrupt is not generated if the SAR is configured for CONTINUOUS operation (i.e. cy_stc_autanalog_sar_seq_tab_hs_t::nextAction or cy_stc_autanalog_sar_seq_tab_lp_t::nextAction is set to GO_TO_ENTRY_ADDRESS). This trigger does NOT indicate that the SAR data has been written to the FIFO (use the FIFO level triggers instead).
CY_AUTANALOG_AC_OUT_TRIG_MASK_SAR_EOS	The SAR Sequencer EOS trigger. This trigger is set by the SAR when finishing the state in the SAR sequencer table (HS or LP) where cy_stc_autanalog_sar_seq_tab_hs_t::nextAction or cy_stc_autanalog_sar_seq_tab_lp_t::nextAction is set to GO_TO_ENTRY_ADDRESS or STOP. Note This trigger does NOT indicate that the SAR data has been written to the FIFO (use the FIFO level triggers instead).
CY_AUTANALOG_AC_OUT_TRIG_MASK_FIFO_LEVEL1	The FIFO Level 1 trigger. It is similar to FIFO Level 0 trigger. Note This trigger is only generated if the FIFO is configured for multiple FIFOs (cy_stc_autanalog_fifo_cfg_t::split is not equal to CY_AUTANALOG_FIFO_SPLIT1).
CY_AUTANALOG_AC_OUT_TRIG_MASK_SAR_RANGE0	The SAR, range 0.
CY_AUTANALOG_AC_OUT_TRIG_MASK_SAR_RANGE1	The SAR, range 1.
CY_AUTANALOG_AC_OUT_TRIG_MASK_SAR_RANGE2	The SAR, range 2.
CY_AUTANALOG_AC_OUT_TRIG_MASK_SAR_RANGE3	The SAR, range 3.
CY_AUTANALOG_AC_OUT_TRIG_MASK_FIFO_LEVEL2	The FIFO Level 2 trigger. It is similar to FIFO Level 0 trigger. Note This trigger is only generated if the FIFO is configured for multiple FIFOs.
CY_AUTANALOG_AC_OUT_TRIG_MASK_FIFO_LEVEL3	The FIFO Level 3 trigger. It is similar to FIFO Level 0 trigger. Note This trigger is only generated if the FIFO is configured for multiple FIFOs.
CY_AUTANALOG_AC_OUT_TRIG_MASK_FIFO_LEVEL4	The FIFO Level 4 trigger. It is similar to FIFO Level 0 trigger. Note This trigger is only generated if the FIFO is configured for multiple FIFOs.
CY_AUTANALOG_AC_OUT_TRIG_MASK_FIFO_LEVEL5	The FIFO Level 5 trigger. It is similar to FIFO Level 0 trigger. Note This trigger is only generated if the FIFO is configured for multiple FIFOs.
CY_AUTANALOG_AC_OUT_TRIG_MASK_FIFO_LEVEL6	The FIFO Level 6 trigger. It is similar to FIFO Level 0 trigger. Note This trigger is only generated if the FIFO is configured for multiple FIFOs.
CY_AUTANALOG_AC_OUT_TRIG_MASK_FIFO_LEVEL7	The FIFO Level 7 trigger. It is similar to FIFO Level 0 trigger. Note This trigger is only generated if the FIFO is configured for multiple FIFOs.
CY_AUTANALOG_AC_OUT_TRIG_MASK_AC	The AC trigger. This trigger is set by the AC whenever executing a state with cy_stc_autanalog_stt_ac_t::trigInt = true.

cy_en_autanalog_timer_clk_src_t

enum cy_en_autanalog_timer_clk_src_t

The AC clock source for wake-up Timer, see cy_stc_autanalog_timer_t::clkSrc, for more details, refer to the device Architecture Technical Reference Manual.

Enumerator
CY_AUTANALOG_TIMER_CLK_LP	The Timer clocked from CLK_LPOSC (nominally 4.096MHz)
CY_AUTANALOG_TIMER_CLK_LF	The Timer clocked from CLK_LF (nominally 32kHz)