Data Structures

General Description

Data Structures
struct	cy_stc_autanalog_ptcomp_comp_pp_t
	Defines the post-processing configuration structure, see Post-processing Configuration. More...
struct	cy_stc_autanalog_ptcomp_comp_sta_t
	Defines the static configuration structure, see Static Configuration. More...
struct	cy_stc_autanalog_ptcomp_comp_dyn_t
	Defines the dynamic configuration structure, see Dynamic Configuration. More...
struct	cy_stc_autanalog_ptcomp_t
	The configuration structure to set up the entire PTComp based on static and dynamic configurations. More...
struct	cy_stc_autanalog_stt_ptcomp_t
	The PTComp section in the State Transition Table state. More...

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Data Structure Documentation

cy_stc_autanalog_ptcomp_comp_pp_t

struct cy_stc_autanalog_ptcomp_comp_pp_t

Data Fields
cy_en_autanalog_ptcomp_pp_input_src_t	inpSrc	The post-processor input source.
cy_en_autanalog_ptcomp_pp_input_type_t	inputType	The post-processor edge-detect mode.
cy_en_autanalog_ptcomp_pp_cnt_mode_t	cntMode	The post-processor operation mode.
cy_en_autanalog_ptcomp_pp_data_func_t	dataFunction	The post-processor LUT function.
cy_en_autanalog_ptcomp_pp_window_size_t	windowSize	The window size for post-processing mode WINDOW.
uint16_t	period	The frame period in number of clock cycles for PTComp.
cy_en_autanalog_ptcomp_pp_cond_t	limitCondition	The post-processor counter limit condition.
uint16_t	thresholdLow	Low threshold for post-processing counter.
uint16_t	thresholdHigh	High threshold for post-processing counter.

cy_stc_autanalog_ptcomp_comp_sta_t

struct cy_stc_autanalog_ptcomp_comp_sta_t

Data Fields
uint16_t	lpDivPtcomp	The Low Power clock divider, actual divide value is DIV_VAL + 1, valid range is 1...1024. For more details, refer to Clocking chapter Static part of configuration for Comp0
cy_en_autanalog_ptcomp_comp_pwr_t	powerModeComp0	The Power mode for the Comp0.
cy_en_autanalog_ptcomp_comp_hyst_t	compHystComp0	The Comp0 30mV hysteresis.
cy_en_autanalog_ptcomp_comp_int_t	compEdgeComp0	The edge-detect comparator mode for Comp0. Static part of configuration for Comp1
cy_en_autanalog_ptcomp_comp_pwr_t	powerModeComp1	The Power mode for the Comp1.
cy_en_autanalog_ptcomp_comp_hyst_t	compHystComp1	The Comp1 30mV hysteresis.
cy_en_autanalog_ptcomp_comp_int_t	compEdgeComp1	The edge-detect comparator mode for Comp1. Post-processing part of configuration for PTComp
uint8_t	compPpCfgNum	The number of post-processing configurations.
cy_stc_autanalog_ptcomp_comp_pp_t *	compPpCfgArr	The array of pointers to post-processing configurations.

cy_stc_autanalog_ptcomp_comp_dyn_t

struct cy_stc_autanalog_ptcomp_comp_dyn_t

Data Fields
cy_en_autanalog_ptcomp_comp_mux_t	ninvInpMux	Connection of the non-inverting input of the Comp.
cy_en_autanalog_ptcomp_comp_mux_t	invInpMux	Connection of the inverting input of the Comp.

cy_stc_autanalog_ptcomp_t

struct cy_stc_autanalog_ptcomp_t

Data Fields
cy_stc_autanalog_ptcomp_comp_sta_t *	ptcompStaCfg	The pointer to a static part of the PTComp configuration.
uint8_t	ptcompDynCfgNum	The number of dynamic configurations used for the PTComp.
cy_stc_autanalog_ptcomp_comp_dyn_t *	ptcompDynCfgArr	The array of pointers to dynamic configurations used for the PTComp.

cy_stc_autanalog_stt_ptcomp_t

struct cy_stc_autanalog_stt_ptcomp_t

Data Fields
bool	unlock	PTComp Unlock FALSE - Locked: Data from fields enableComp0, dynCfgIdxComp0 and enableComp1, dynCfgIdxComp1 will NOT be taken into account in the corresponding state of STT TRUE - Unlocked: Data from fields enableComp0, dynCfgIdxComp0 and enableComp1, dynCfgIdxComp1 will used in the corresponding state of STT.
bool	enableComp0	Enable Comp0.
uint8_t	dynCfgIdxComp0	The dynamic configuration selector for Comp0, see cy_stc_autanalog_ptcomp_comp_dyn_t, the range is 0 to 7.
bool	enableComp1	Enable Comp1.
uint8_t	dynCfgIdxComp1	The dynamic configuration selector for Comp1, see cy_stc_autanalog_ptcomp_comp_dyn_t, the range is 0 to 7.