PSoC 6 Peripheral Driver Library
Interrupt Mask Register Enums

General Description

This set of enumerations aids in configuring the SAR INTR_MASK register.

Enumerations

enum  cy_en_sar_intr_mask_t {
  CY_SAR_INTR_MASK_NONE = 0uL,
  CY_SAR_INTR_EOS_MASK = SAR_INTR_MASK_EOS_MASK_Msk,
  CY_SAR_INTR_OVERFLOW_MASK = SAR_INTR_MASK_OVERFLOW_MASK_Msk,
  CY_SAR_INTR_FW_COLLISION_MASK = SAR_INTR_MASK_FW_COLLISION_MASK_Msk
}
 Configure which signal will cause an interrupt event. More...
 

Enumeration Type Documentation

◆ cy_en_sar_intr_mask_t

Configure which signal will cause an interrupt event.

  • End of scan (EOS): occurs after completing a scan of all enabled channels
  • Overflow: occurs when hardware sets a new EOS interrupt while the previous interrupt has not be cleared by the firmware
  • Firmware collision: occurs when firmware attempts to start one-shot conversion while the SAR is busy.

Enable all, one, or none of the interrupt events.

Enumerator
CY_SAR_INTR_MASK_NONE 

Disable all interrupt sources.

CY_SAR_INTR_EOS_MASK 

Enable end of scan (EOS) interrupt.

CY_SAR_INTR_OVERFLOW_MASK 

Enable overflow interrupt.

CY_SAR_INTR_FW_COLLISION_MASK 

Enable firmware collision interrupt.