Data Structures

General Description

Data Structures
struct	cy_stc_tcpwm_pwm_config_t
	PWM configuration structure. More...

Enumerations
enum	cy_en_tcpwm_dithering_t {   CY_TCPWM_DITHERING_DISABLE = 0UL,   CY_TCPWM_DITHERING_PERIOD = 1UL,   CY_TCPWM_DITHERING_DUTY = 2UL,   CY_TCPWM_DITHERING_PERIOD_DUTY = 3UL }
	TCPWM Dithering. More...
enum	cy_en_dithering_limiter_t {   CY_TCPWM_DITHERING_LIMITER_1 = 1UL,   CY_TCPWM_DITHERING_LIMITER_2 = 2UL,   CY_TCPWM_DITHERING_LIMITER_3 = 3UL,   CY_TCPWM_DITHERING_LIMITER_4 = 4UL,   CY_TCPWM_DITHERING_LIMITER_5 = 5UL,   CY_TCPWM_DITHERING_LIMITER_6 = 6UL,   CY_TCPWM_DITHERING_LIMITER_7 = 7UL }
	TCPWM dithering limiter values. More...
enum	cy_en_hrpwm_operating_frequency_t {   CY_TCPWM_HRPWM_FREQ_80MHZ_OR_100MHZ = 0UL,   CY_TCPWM_HRPWM_FREQ_150MHZ_OR_160MHZ_OR_180MHZ = 1UL,   CY_TCPWM_HRPWM_FREQ_200MHZ = 2UL,   CY_TCPWM_HRPWM_FREQ_240MHZ = 3UL }
	HRPWM Operation Frequency Selects the frequency of operation of HRPWM feature. More...
enum	cy_en_kill_line_polarity_t {   CY_TCPWM_LINEOUT_AND_LINECMPOUT_IS_LOW = 0UL,   CY_TCPWM_LINEOUT_IS_HIGH_AND_LINECMPOUT_IS_LOW = 1UL,   CY_TCPWM_LINECMPOUT_IS_HIGH_LINEOUT_IS_LOW = 2UL,   CY_TCPWM_LINEOUT_AND_LINECMPOUT_IS_HIGH = 3UL }
	Specifies the behavior of the PWM outputs line_out and line_out_compl_out while the TCPWM counter is disabled or stopped. More...
enum	cy_en_line_select_config_t {   CY_TCPWM_OUTPUT_CONSTANT_0 = 0UL,   CY_TCPWM_OUTPUT_CONSTANT_1 = 1UL,   CY_TCPWM_OUTPUT_PWM_SIGNAL = 2UL,   CY_TCPWM_OUTPUT_INVERTED_PWM_SIGNAL = 3UL,   CY_TCPWM_OUTPUT_PORT_DEFAULT = 4UL,   CY_TCPWM_OUTPUT_SOURCE_MOTIF = 5UL }
	Source for the output signal "line_out" and "line_compl_out". More...

Enumeration Type Documentation

cy_en_tcpwm_dithering_t

enum cy_en_tcpwm_dithering_t

TCPWM Dithering.

Enumerator
CY_TCPWM_DITHERING_DISABLE	TCPWM dithering is disabled.
CY_TCPWM_DITHERING_PERIOD	TCPWM dithering is set to period.
CY_TCPWM_DITHERING_DUTY	TCPWM dithering is set to duty.
CY_TCPWM_DITHERING_PERIOD_DUTY	TCPWM dithering is set to period and duty.

cy_en_dithering_limiter_t

enum cy_en_dithering_limiter_t

TCPWM dithering limiter values.

Enumerator
CY_TCPWM_DITHERING_LIMITER_1	TCPWM dithering limiter value 1.
CY_TCPWM_DITHERING_LIMITER_2	TCPWM dithering limiter value 2.
CY_TCPWM_DITHERING_LIMITER_3	TCPWM dithering limiter value 3.
CY_TCPWM_DITHERING_LIMITER_4	TCPWM dithering limiter value 4.
CY_TCPWM_DITHERING_LIMITER_5	TCPWM dithering limiter value 5.
CY_TCPWM_DITHERING_LIMITER_6	TCPWM dithering limiter value 6.
CY_TCPWM_DITHERING_LIMITER_7	TCPWM dithering limiter value 7.

cy_en_hrpwm_operating_frequency_t

enum cy_en_hrpwm_operating_frequency_t

HRPWM Operation Frequency Selects the frequency of operation of HRPWM feature.

Micro tick is adjusted based on this information. These bits specifies the frequency of CLK_OUT from TCPWM counter. CLK_OUT = CLK_PERI = CLK_HF

Enumerator
CY_TCPWM_HRPWM_FREQ_80MHZ_OR_100MHZ	HRPWM Iput Frequency is 80MHz or 100 MHz.
CY_TCPWM_HRPWM_FREQ_150MHZ_OR_160MHZ_OR_180MHZ	HRPWM Iput Frequency is 150MHz or 160 MHz or 180 MHz.
CY_TCPWM_HRPWM_FREQ_200MHZ	HRPWM Iput Frequency is 200 MHz.
CY_TCPWM_HRPWM_FREQ_240MHZ	HRPWM Iput Frequency is 240 MHz.

cy_en_kill_line_polarity_t

enum cy_en_kill_line_polarity_t

Specifies the behavior of the PWM outputs line_out and line_out_compl_out while the TCPWM counter is disabled or stopped.

Enumerator
CY_TCPWM_LINEOUT_AND_LINECMPOUT_IS_LOW	Line Out and Line Compl Out is Low during the kill and counter is disabled.
CY_TCPWM_LINEOUT_IS_HIGH_AND_LINECMPOUT_IS_LOW	Line Out is High during the kill and counter is disabled.
CY_TCPWM_LINECMPOUT_IS_HIGH_LINEOUT_IS_LOW	Line Compl Out is High during the kill and counter is disabled.
CY_TCPWM_LINEOUT_AND_LINECMPOUT_IS_HIGH	Line Out and Line Compl Out is Hig during the kill and counter is disabled.

cy_en_line_select_config_t

enum cy_en_line_select_config_t

Source for the output signal "line_out" and "line_compl_out".

Enumerator
CY_TCPWM_OUTPUT_CONSTANT_0	Output signal is 0.
CY_TCPWM_OUTPUT_CONSTANT_1	Output signal is 1.
CY_TCPWM_OUTPUT_PWM_SIGNAL	Output signal is PWM Signal.
CY_TCPWM_OUTPUT_INVERTED_PWM_SIGNAL	Output signal is inverted PWM Signal.
CY_TCPWM_OUTPUT_PORT_DEFAULT	Output is not driven by the TCPWM. Instead the port default level configuration applies, e.g. "Z" (high impedance).
CY_TCPWM_OUTPUT_SOURCE_MOTIF	Source for PWM signal conditioning comes from MOTIF modulation output control signals. It can be set to '0' , '1' or PWM.