Timer/Counter (TCPWM)

General Description

Driver API for Timer/Counter.

The functions and other declarations used in this part of the driver are in cy_tcpwm_counter.h. You can also include cy_pdl.h to get access to all functions and declarations in the PDL.

Use Timer/Counter mode whenever a specific timing interval or measurement is needed. Examples include:

• Creating a periodic interrupt for running other system tasks
• Measuring frequency of an input signal
• Measuring pulse width of an input signal
• Measuring time between two external events
• Counting events
• Triggering other system resources after x number events
• Capturing time stamps when events occur

The Timer/Counter has the following features:

• 16- or 32-bit Timer/Counter.
• Programmable Period Register.
• Programmable Compare Register. Compare value can be swapped with a buffered compare value on comparison event.
• Capture with buffer register.
• Count Up, Count Down, or Count Up and Down Counting modes.
• Continuous or One Shot Run modes.
• Interrupt on Terminal Count and Compare or Capture 0. Interrupt on Compare or Capture 1 is only available in TCPWM Version 2.
• Start, Reload, Stop, Capture, and Count Inputs.
• 2 compare (CC0/CC1) registers with double buffer, Capture 1 event. Second compare register and Capture 1 event are available only in TCPWM Version 2.
• Two programmable trigger outputs, trig_out0 and trig_out1 that generate a trigger on one of the following events Overflow, Underflow, Terminal Count, and Compare Match 0/1. The available triggers are dependent on the Timer/Counter mode. All these features are only available in TCPWM Version 2.
• Overflow, Underflow, and Compare(cc_match) trigger outputs are only available in TCPWM Version 1.
• Second Compare Match (CC_MATCH1) event is only available in TCPWM Version 2.

Configuration Considerations

The Counter configuration can be divided to number of sequential steps listed below:

• Configure Counter
• Assign Clock Divider
• Enable Counter
• Start Counter

Configure Counter

To configure Counter, provide the configuration parameters in the cy_stc_tcpwm_counter_config_t structure. The Configuration structure can be modified through software, but if the configurator in ModusToolbox is used then the configuration structure will be updated with the users input. To initialize the driver, call Cy_TCPWM_Counter_Init function providing a pointer to the populated cy_stc_tcpwm_counter_config_t structure.

For TCPWM V1 Configuration

    /* Scenario: there is need to initialize
     * the first (index = 0) counter of the TCPWM0 block
     * with the below configuration settings
     */
    cy_stc_tcpwm_counter_config_t tcpwm_v1_counter_config =
    {
        /* .period            = */ 99UL, /* Period of 100 (0-99). Terminal count event when rolls over back to 0. */
        /* .clockPrescaler    = */ CY_TCPWM_COUNTER_PRESCALER_DIVBY_4, /* Clk_counter = Clk_input / 4 */
        /* .runMode           = */ CY_TCPWM_COUNTER_CONTINUOUS, /* Wrap around at terminal count. */
        /* .countDirection    = */ CY_TCPWM_COUNTER_COUNT_UP, /* Up counter, counting from 0 to period value. */
        /* .compareOrCapture  = */ CY_TCPWM_COUNTER_MODE_COMPARE, /* Trigger interrupt/event signal when Counter value is equal to Compare 0 */
        /* .compare0          = */ 33UL,
        /* .compare1          = */ 66UL,
        /* .enableCompareSwap = */ true, /* Upon a compare event, swap the Compare 0 and Compare 1 values. */
        /* .interruptSources  = */ CY_TCPWM_INT_NONE,
        /* .captureInputMode  = */ CY_TCPWM_INPUT_RISINGEDGE, /* This input is NOT used, leave it in default state (CY_TCPWM_INPUT_RISINGEDGE = 0UL) */
        /* .captureInput      = */ CY_TCPWM_INPUT_0,
        /* .reloadInputMode   = */ CY_TCPWM_INPUT_RISINGEDGE, /* This input is NOT used, leave it in default state (CY_TCPWM_INPUT_RISINGEDGE = 0UL) */
        /* .reloadInput       = */ CY_TCPWM_INPUT_0,
        /* .startInputMode    = */ CY_TCPWM_INPUT_RISINGEDGE, /* This input is NOT used, leave it in default state (CY_TCPWM_INPUT_RISINGEDGE = 0UL) */
        /* .startInput        = */ CY_TCPWM_INPUT_0,
        /* .stopInputMode     = */ CY_TCPWM_INPUT_RISINGEDGE, /* This input is NOT used, leave it in default state (CY_TCPWM_INPUT_RISINGEDGE = 0UL) */
        /* .stopInput         = */ CY_TCPWM_INPUT_0,
        /* .countInputMode    = */ CY_TCPWM_INPUT_LEVEL, /* Set this input to LEVEL and 1 (high logic level) */
        /* .countInput        = */ CY_TCPWM_INPUT_1, /* So the counter will count input clock periods (Clk_counter, taking into account the clock prescaler) */
    };

    #define MY_TCPWM_CNT_NUM   (0UL)

    if (CY_TCPWM_SUCCESS != Cy_TCPWM_Counter_Init(TCPWM0, MY_TCPWM_CNT_NUM, &tcpwm_v1_counter_config))
    {
        /* Handle possible errors */
    }
    /* Enable the initialized counter */
    Cy_TCPWM_Counter_Enable(TCPWM0, MY_TCPWM_CNT_NUM);

    /* Then start the counter */
    Cy_TCPWM_TriggerStart_Single(TCPWM0, MY_TCPWM_CNT_NUM);

TCPWM V2 Configuration

    /* Scenario: there is need to initialize
     * the first (index = 0) counter of the TCPWM0 block
     * with the below configuration settings
     */
    cy_stc_tcpwm_counter_config_t tcpwm_v2_counter_config =
    {
        /* .period            = */ 99UL, /* Period of 100 (0-99). Terminal count event when rolls over back to 0. */
        /* .clockPrescaler    = */ CY_TCPWM_COUNTER_PRESCALER_DIVBY_4, /* Clk_counter = Clk_input / 4 */
        /* .runMode           = */ CY_TCPWM_COUNTER_CONTINUOUS, /* Wrap around at terminal count. */
        /* .countDirection    = */ CY_TCPWM_COUNTER_COUNT_UP, /* Up counter, counting from 0 to period value. */
        /* .compareOrCapture  = */ CY_TCPWM_COUNTER_MODE_COMPARE, /* Trigger interrupt/event signal when Counter value is equal to Compare 0 */
        /* .compare0          = */ 33UL,
        /* .compare1          = */ 66UL,
        /* .enableCompareSwap = */ true, /* Upon a compare event, swap the Compare 0 and Compare 1 values. */
        /* .interruptSources  = */ CY_TCPWM_INT_NONE,
        /* .captureInputMode  = */ CY_TCPWM_INPUT_RISINGEDGE, /* This input is NOT used, leave it in default state (CY_TCPWM_INPUT_RISINGEDGE = 0UL) */
        /* .captureInput      = */ CY_TCPWM_INPUT_0,
        /* .reloadInputMode   = */ CY_TCPWM_INPUT_RISINGEDGE, /* This input is NOT used, leave it in default state (CY_TCPWM_INPUT_RISINGEDGE = 0UL) */
        /* .reloadInput       = */ CY_TCPWM_INPUT_0,
        /* .startInputMode    = */ CY_TCPWM_INPUT_RISINGEDGE, /* This input is NOT used, leave it in default state (CY_TCPWM_INPUT_RISINGEDGE = 0UL) */
        /* .startInput        = */ CY_TCPWM_INPUT_0,
        /* .stopInputMode     = */ CY_TCPWM_INPUT_RISINGEDGE, /* This input is NOT used, leave it in default state (CY_TCPWM_INPUT_RISINGEDGE = 0UL) */
        /* .stopInput         = */ CY_TCPWM_INPUT_0,
        /* .countInputMode    = */ CY_TCPWM_INPUT_LEVEL, /* Set this input to LEVEL and 1 (high logic level) */
        /* .countInput        = */ CY_TCPWM_INPUT_1, /* So the counter will count input clock periods (Clk_counter, taking into account the clock prescaler) */
        /* .capture1InputMode = */ CY_TCPWM_INPUT_RISINGEDGE, /* This input is NOT used, leave it in default state (CY_TCPWM_INPUT_RISINGEDGE = 0UL) */
        /* .capture1Input     = */ CY_TCPWM_INPUT_0,
        /* .enableCompare1Swap= */ false, /* Disable CC1 */
        /* .compare2          = */ 0,
        /* .compare3          = */ 0,
        /* .trigger0Event     = */ CY_TCPWM_CNT_TRIGGER_ON_DISABLED, /* Disable output trigger0 event generation*/
        /* .trigger1Event     = */ CY_TCPWM_CNT_TRIGGER_ON_DISABLED, /* Disable output trigger1 event generation*/
    };

    #define MY_TCPWM_CNT_NUM   (0UL)
    
    if (CY_TCPWM_SUCCESS != Cy_TCPWM_Counter_Init(TCPWM0, MY_TCPWM_CNT_NUM, &tcpwm_v2_counter_config))
    {
        /* Handle possible errors */
    }
    /* Enable the initialized counter */
    Cy_TCPWM_Counter_Enable(TCPWM0, MY_TCPWM_CNT_NUM);
    
    /* Then start the counter */
    Cy_TCPWM_TriggerStart_Single(TCPWM0, MY_TCPWM_CNT_NUM);

Assign Clock Divider

The clock source must be connected to proper working. Any of the peripheral clock dividers could be used. Use the SysClk (System Clock) driver API to do that.

Enable Counter

Counter has to be enabled before starting

    /* Scenario: Enable Counter */
    #define MY_TCPWM_COUNTER_NUM   (0UL)

    Cy_TCPWM_PWM_Enable(TCPWM0, MY_TCPWM_COUNTER_NUM);

Start Counter

Counter has to be started

    /* Scenario: Use software trigger to start counter operation */
    #define MY_TCPWM_COUNTER_NUM   (0UL)

    Cy_TCPWM_TriggerStart_Single(TCPWM0, MY_TCPWM_COUNTER_NUM);

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