DAC functions

General Description

Functions
__STATIC_INLINE void	Cy_HPPASS_DAC_SetPeriod (uint8_t sliceIdx, cy_stc_hppass_dac_period_t period)
	Sets DAC period buffer for the specified CSG slice. More...
__STATIC_INLINE void	Cy_HPPASS_DAC_SetParamSyncReady (uint8_t sliceIdx)
	Sets the ready status of DAC parameter synchronized update for the specified CSG slice. More...
__STATIC_INLINE bool	Cy_HPPASS_DAC_IsBusy (uint8_t sliceIdx)
	Gets the DAC busy status of the specified CSG slice. More...
__STATIC_INLINE void	Cy_HPPASS_DAC_Start (uint8_t sliceIdx, cy_en_hppass_dac_cmd_t command)
	Set hardware start or FW start the DAC selected mode for the specified CSG slice. More...
__STATIC_INLINE void	Cy_HPPASS_DAC_Stop (uint8_t sliceIdx)
	Stop the DAC selected mode for the specified CSG slice. More...
__STATIC_INLINE void	Cy_HPPASS_DAC_SetValue (uint8_t sliceIdx, uint16_t value)
	Sets value for DAC buffered mode for the specified CSG slice. More...
__STATIC_INLINE void	Cy_HPPASS_DAC_SetHystereticValues (uint8_t sliceIdx, uint16_t high, uint16_t low)
	Set high and low values for DAC hysteretic mode for the specified CSG slice. More...
__STATIC_INLINE void	Cy_HPPASS_DAC_SetSlopeValues (uint8_t sliceIdx, uint16_t start, uint16_t stop, uint8_t step)
	Set the start, stop, and step values for DAC slope mode for the specified CSG slice. More...
__STATIC_INLINE void	Cy_HPPASS_DAC_SetLutAddress (uint8_t sliceIdx, uint8_t start, uint8_t stop, uint8_t step)
	Sets the start and stop addresses, and step value for DAC LUT mode for the specified CSG slice. More...

Function Documentation

Cy_HPPASS_DAC_SetPeriod()

__STATIC_INLINE void Cy_HPPASS_DAC_SetPeriod	(	uint8_t	sliceIdx,
		cy_stc_hppass_dac_period_t	period
	)

Sets DAC period buffer for the specified CSG slice.

Parameters

sliceIdx	The CSG slice. Valid range: 0..4.
period	The DAC period. See cy_stc_hppass_dac_period_t.

Cy_HPPASS_DAC_SetParamSyncReady()

__STATIC_INLINE void Cy_HPPASS_DAC_SetParamSyncReady

(

uint8_t

sliceIdx

)

Sets the ready status of DAC parameter synchronized update for the specified CSG slice.

Registers DAC_VAL_A, DAC_VAL_B, DAC_PERIOD and DAC_CFG.DAC_STEP will be updated simultaneously on a subsequent DAC trigger.

Note

This function requires the cy_stc_hppass_dac_t::paramSync setting to be enabled.

Parameters

sliceIdx

The CSG slice. Valid range: 0..4.

Cy_HPPASS_DAC_IsBusy()

__STATIC_INLINE bool Cy_HPPASS_DAC_IsBusy

(

uint8_t

sliceIdx

)

Gets the DAC busy status of the specified CSG slice.

Parameters

sliceIdx

The CSG slice. Valid range: 0..4.

Returns

The DAC busy status.

Cy_HPPASS_DAC_Start()

__STATIC_INLINE void Cy_HPPASS_DAC_Start	(	uint8_t	sliceIdx,
		cy_en_hppass_dac_cmd_t	command
	)

Set hardware start or FW start the DAC selected mode for the specified CSG slice.

Parameters

sliceIdx	The CSG slice. Valid range: 0..4.
command	DAC start command mode. See cy_en_hppass_dac_cmd_t.

Cy_HPPASS_DAC_Stop()

__STATIC_INLINE void Cy_HPPASS_DAC_Stop

(

uint8_t

sliceIdx

)

Stop the DAC selected mode for the specified CSG slice.

Parameters

sliceIdx

The CSG slice. Valid range: 0..4.

Cy_HPPASS_DAC_SetValue()

__STATIC_INLINE void Cy_HPPASS_DAC_SetValue	(	uint8_t	sliceIdx,
		uint16_t	value
	)

Sets value for DAC buffered mode for the specified CSG slice.

Parameters

sliceIdx	The CSG slice. Valid range: 0..4.
value	DAC value. Valid range: 0..1023.

Note

It could be used to update the only VAL_A register value in other DAC modes.

Cy_HPPASS_DAC_SetHystereticValues()

__STATIC_INLINE void Cy_HPPASS_DAC_SetHystereticValues	(	uint8_t	sliceIdx,
		uint16_t	high,
		uint16_t	low
	)

Set high and low values for DAC hysteretic mode for the specified CSG slice.

Parameters

sliceIdx	The CSG slice. Valid range: 0..4.
high	High value. Valid range: 0..1023.
low	Low value. Valid range: 0..1023.

Note

This function is only for the DAC Hysteretic mode

Cy_HPPASS_DAC_SetSlopeValues()

__STATIC_INLINE void Cy_HPPASS_DAC_SetSlopeValues	(	uint8_t	sliceIdx,
		uint16_t	start,
		uint16_t	stop,
		uint8_t	step
	)

Set the start, stop, and step values for DAC slope mode for the specified CSG slice.

Parameters

sliceIdx	The CSG slice. Valid range: 0..4.
start	Start value. Valid range: 0..1023.
stop	Stop value. Valid range: 0..1023.
step	Step value. Valid range: 1..64.

Note

This function is only for the DAC Slope mode

Cy_HPPASS_DAC_SetLutAddress()

__STATIC_INLINE void Cy_HPPASS_DAC_SetLutAddress	(	uint8_t	sliceIdx,
		uint8_t	start,
		uint8_t	stop,
		uint8_t	step
	)

Sets the start and stop addresses, and step value for DAC LUT mode for the specified CSG slice.

Parameters

sliceIdx	The CSG slice. Valid range: 0..4.
start	The start address (in LUT data words). Valid range: 0..127.
stop	The stop address (in LUT data words). Valid range: 0..127.

Note

start and stop parameter values are internally converted into the LUT physical register address values.

Parameters

step	Step value (in LUT data words). Valid range: 1..64.

Note

This function is only for the DAC LUT mode