Description

Common configuration structure.

Data Fields
uint32_t	cpuClkHz
	CPU clock in Hz.

uint32_t	periClkHz
	Peripheral clock in Hz.

cy_stc_capsense_idac_gain_table_t	idacGainTable [CY_CAPSENSE_IDAC_GAIN_TABLE_SIZE]
	Table with the supported IDAC gains and corresponding register values. More...

CSD_Type *	ptrCsdBase
	Pointer to the CSD HW block register. More...

cy_stc_csd_context_t *	ptrCsdContext
	Pointer to the CSD driver context. More...

GPIO_PRT_Type *	portCmod
	Pointer to the base port register of the Cmod pin. More...

GPIO_PRT_Type *	portCsh
	Pointer to the base port register of the Csh pin. More...

GPIO_PRT_Type *	portCintA
	Pointer to the base port register of the CintA pin. More...

GPIO_PRT_Type *	portCintB
	Pointer to the base port register of the CintB pin. More...

cy_stc_capsense_channel_config_t *	ptrChConfig
	The pointer to the CAPSENSE™ enabled channel (HW block) configuration. More...

DMAC_Type *	ptrDmacBase
	Pointer to the DMAC HW block base register. More...

const uint32_t const	ptrDmaWrChSnsCfgAddr
	Pointer to the array containing the addresses of sensor configurations used as a source for the DMA Chain Write channel. More...

const uint16_t const	ptrDmaRdChSnsCfgAddr
	Pointer to the array containing the addresses of sensor configurations used as a source for the DMA Chain Read channel. More...

const uint32_t **	ptrDmaWrChSnsCfgAddrLocal
	Pointer to the array containing the addresses of sensor configurations used as a source for the DMA Chain Write channel. More...

const uint16_t **	ptrDmaRdChSnsCfgAddrLocal
	Pointer to the array containing the addresses of sensor configurations used as a source for the DMA Chain Read channel. More...

uint16_t *	ptrEmptyRawCount
	Pointer to the empty storage for raw count in case widget is disabled. More...

uint16_t	numPin
	Total number of IOs. More...

uint16_t	numSns
	The total number of sensors. More...

uint16_t	proxTouchCoeff
	Proximity touch coefficient in percentage used in smart sensing algorithm.

uint16_t	csdRConst
	Sensor resistance in series used by smart sensing algorithm.

uint16_t	vdda
	VDDA in mV.

uint16_t	csdVref
	Vref for CSD method. More...

uint16_t	numEpiCycles
	Number of clk_mod cycles to be run during EPILOGUE. More...

uint16_t	numCoarseInitChargeCycles
	Configure duration of Cmod initialization, phase 1. More...

uint16_t	numCoarseInitSettleCycles
	Configure duration of Cmod initialization, phase 2. More...

uint16_t	numSlots
	Total number of slots. More...

uint16_t	numProWaitKrefDelayPrs
	Number of Kref/4 ProDummy Wait Cycles if PRS is enabled. More...

uint16_t	numProWaitKrefDelay
	Number of Kref/4 ProDummy Wait Cycles if PRS is disabled. More...

uint16_t	numEpiKrefDelayPrs
	Number of Kref/4 cycles to be run during EPILOGUE if PRS is enabled. More...

uint16_t	numEpiKrefDelay
	Number of Kref/4 cycles to be run during EPILOGUE if PRS is disabled. More...

uint8_t	numWd
	Total number of widgets.

uint8_t	periDividerType
	Peripheral clock type (8- or 16-bit type)

uint8_t	periDividerIndex
	Peripheral divider index.

uint8_t	analogWakeupDelay
	Time needed to establish correct operation of CAPSENSE™ HW block block after power up or System Deep Sleep. More...

uint8_t	swSensorAutoResetEn
	Sensor auto reset enabled.

uint8_t	csdInactiveSnsConnection
	Inactive sensor connection for CSD scan: More...

uint8_t	csxInactiveSnsConnection
	Inactive sensor connection for CSX scan: More...

uint8_t	isxInactiveSnsConnection
	Inactive sensor connection for ISX scan: More...

uint8_t	csdShieldNumPin
	Number of shield IOs.

uint8_t	csxRawTarget
	Raw count target in percentage for CSX calibration.

uint8_t	csxCalibrationError
	Acceptable calibration error.

uint8_t	csdRawTarget
	Raw count target in percentage for CSD calibration.

uint8_t	csdCalibrationError
	Acceptable calibration error.

uint8_t	ssIrefSource
	Iref source. More...

uint8_t	ssVrefSource
	Vref source. More...

uint8_t	portCmodPadNum
	Number of port of dedicated Cmod pad. More...

uint8_t	pinCmodPad
	Position of the dedicated Cmod pad in the port. More...

uint8_t	portCshPadNum
	Number of port of dedicated Csh pad. More...

uint8_t	pinCshPad
	Position of the dedicated Csh pad in the port. More...

uint8_t	portShieldPadNum
	Number of port of dedicated Shield pad. More...

uint8_t	pinShieldPad
	Position of the dedicated Shield pad in the port. More...

uint8_t	portVrefExtPadNum
	Number of port of dedicated VrefExt pad. More...

uint8_t	pinVrefExtPad
	Position of the dedicated VrefExt pad in the port. More...

uint8_t	portCmodNum
	Number of port of Cmod pin. More...

uint8_t	pinCmod
	Position of the Cmod pin in the port. More...

uint8_t	portCshNum
	Number of port of Csh pin. More...

uint8_t	pinCsh
	Position of the Csh pin in the port. More...

uint8_t	pinCintA
	Position of the CintA pin in the port. More...

uint8_t	pinCintB
	Position of the CintB pin in the port. More...

uint8_t	csdShieldDelay
	Shield signal delay. More...

uint8_t	csdShieldSwRes
	Shield switch resistance. More...

uint8_t	csdInitSwRes
	Switch resistance at coarse initialization. More...

uint8_t	csdChargeTransfer
	IDAC sensing configuration. More...

uint8_t	csdIdacGainInitIndex
	IDAC gain index per idacGainTable. More...

uint8_t	csdIdacMin
	Min acceptable IDAC value in CSD calibration. More...

uint8_t	csdFineInitTime
	Number of dummy SnsClk periods at fine initialization. More...

uint8_t	csdMfsDividerOffsetF1
	Frequency divider offset for channel 1. More...

uint8_t	csdMfsDividerOffsetF2
	Frequency divider offset for channel 2. More...

uint8_t	csxFineInitTime
	Number of dummy TX periods at fine initialization. More...

uint8_t	csxInitSwRes
	Switch resistance at fine initialization. More...

uint8_t	csxScanSwRes
	Switch resistance at scanning. More...

uint8_t	csxInitShieldSwRes
	Switch resistance at fine initialization. More...

uint8_t	csxScanShieldSwRes
	Switch resistance at scanning. More...

uint8_t	csxMfsDividerOffsetF1
	Frequency divider offset for channel 1. More...

uint8_t	csxMfsDividerOffsetF2
	Frequency divider offset for channel 2. More...

uint8_t	isxRawTarget
	Raw count target in percentage for ISX calibration. More...

uint8_t	isxCalibrationError
	Acceptable calibration error. More...

uint8_t	csdShieldMode
	Shield mode. More...

uint8_t	numProOffsetCycles
	Maximum number of clk_mod cycles for the PRO_OFFSET state. More...

uint8_t	proOffsetCdacComp
	Compensation CAPDAC size during PRO_OFFSET. More...

uint8_t	chopPolarity
	Select polarity for system level chopping. More...

uint8_t	numBadScans
	1 to 7, repeat scan upon "bad" scan. More...

uint8_t	counterMode
	Select overflow or saturate mode for raw count: More...

uint8_t	sensorConnection
	Sensor Connection. More...

uint8_t	syncClockEn
	Enable external synchronization signals. More...

uint8_t	syncMode
	Synchronization mode: More...

uint8_t	masterChannelId
	The ID of the Master channel MULTI-CHIP solution. More...

uint8_t	numChannels
	The number of CAPSENSE™ enabled MSCv3 blocks in the current chip. More...

uint8_t	channelOffset
	The ID of the first channel that belongs to the current chip. More...

uint8_t	syncFrameStartEn
	Enable external synchronization signals. More...

Field Documentation

◆ idacGainTable

cy_stc_capsense_idac_gain_table_t cy_stc_capsense_common_config_t::idacGainTable[CY_CAPSENSE_IDAC_GAIN_TABLE_SIZE]

Table with the supported IDAC gains and corresponding register values.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ ptrCsdBase

CSD_Type* cy_stc_capsense_common_config_t::ptrCsdBase

Pointer to the CSD HW block register.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ ptrCsdContext

cy_stc_csd_context_t* cy_stc_capsense_common_config_t::ptrCsdContext

Pointer to the CSD driver context.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ portCmod

GPIO_PRT_Type* cy_stc_capsense_common_config_t::portCmod

Pointer to the base port register of the Cmod pin.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ portCsh

GPIO_PRT_Type* cy_stc_capsense_common_config_t::portCsh

Pointer to the base port register of the Csh pin.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ portCintA

GPIO_PRT_Type* cy_stc_capsense_common_config_t::portCintA

Pointer to the base port register of the CintA pin.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ portCintB

GPIO_PRT_Type* cy_stc_capsense_common_config_t::portCintB

Pointer to the base port register of the CintB pin.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ ptrChConfig

cy_stc_capsense_channel_config_t* cy_stc_capsense_common_config_t::ptrChConfig

The pointer to the CAPSENSE™ enabled channel (HW block) configuration.

Note: This field is available for the fifth-generation CAPSENSE™ and fifth-generation low power CAPSENSE™.

◆ ptrDmacBase

DMAC_Type* cy_stc_capsense_common_config_t::ptrDmacBase

Pointer to the DMAC HW block base register.

Note: This field is available only for the fifth-generation CAPSENSE™.

◆ ptrDmaWrChSnsCfgAddr

const uint32_t* const* cy_stc_capsense_common_config_t::ptrDmaWrChSnsCfgAddr

Pointer to the array containing the addresses of sensor configurations used as a source for the DMA Chain Write channel.

Note: This field is available only for the fifth-generation CAPSENSE™.

◆ ptrDmaRdChSnsCfgAddr

const uint16_t* const* cy_stc_capsense_common_config_t::ptrDmaRdChSnsCfgAddr

Pointer to the array containing the addresses of sensor configurations used as a source for the DMA Chain Read channel.

Note: This field is available only for the fifth-generation CAPSENSE™.

◆ ptrDmaWrChSnsCfgAddrLocal

const uint32_t** cy_stc_capsense_common_config_t::ptrDmaWrChSnsCfgAddrLocal

Pointer to the array containing the addresses of sensor configurations used as a source for the DMA Chain Write channel.

Note: This field is available only for the fifth-generation CAPSENSE™.

◆ ptrDmaRdChSnsCfgAddrLocal

const uint16_t** cy_stc_capsense_common_config_t::ptrDmaRdChSnsCfgAddrLocal

Pointer to the array containing the addresses of sensor configurations used as a source for the DMA Chain Read channel.

Note: This field is available only for the fifth-generation CAPSENSE™.

◆ ptrEmptyRawCount

uint16_t* cy_stc_capsense_common_config_t::ptrEmptyRawCount

Pointer to the empty storage for raw count in case widget is disabled.

Note: This field is available only for the fifth-generation CAPSENSE™.

◆ numPin

uint16_t cy_stc_capsense_common_config_t::numPin

Total number of IOs.

◆ numSns

uint16_t cy_stc_capsense_common_config_t::numSns

The total number of sensors.

It is equal to the number of objects with raw count.

For CSD widgets: WD_NUM_ROWS + WD_NUM_COLS
For CSX widgets: WD_NUM_ROWS * WD_NUM_COLS

◆ csdVref

uint16_t cy_stc_capsense_common_config_t::csdVref

Vref for CSD method.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ numEpiCycles

uint16_t cy_stc_capsense_common_config_t::numEpiCycles

Number of clk_mod cycles to be run during EPILOGUE.

Note: This field is available for the fifth-generation CAPSENSE™ and fifth-generation low power CAPSENSE™.

◆ numCoarseInitChargeCycles

uint16_t cy_stc_capsense_common_config_t::numCoarseInitChargeCycles

Configure duration of Cmod initialization, phase 1.

Note: This field is available for the fifth-generation CAPSENSE™ and fifth-generation low power CAPSENSE™.

◆ numCoarseInitSettleCycles

uint16_t cy_stc_capsense_common_config_t::numCoarseInitSettleCycles

Configure duration of Cmod initialization, phase 2.

Note: This field is available for the fifth-generation CAPSENSE™ and fifth-generation low power CAPSENSE™.

◆ numSlots

uint16_t cy_stc_capsense_common_config_t::numSlots

Total number of slots.

Note: This field is available for the fifth-generation CAPSENSE™ and fifth-generation low power CAPSENSE™.

◆ numProWaitKrefDelayPrs

uint16_t cy_stc_capsense_common_config_t::numProWaitKrefDelayPrs

Number of Kref/4 ProDummy Wait Cycles if PRS is enabled.

Note: This field is available only for the fifth-generation low power CAPSENSE™.

◆ numProWaitKrefDelay

uint16_t cy_stc_capsense_common_config_t::numProWaitKrefDelay

Number of Kref/4 ProDummy Wait Cycles if PRS is disabled.

Note: This field is available only for the fifth-generation low power CAPSENSE™.

◆ numEpiKrefDelayPrs

uint16_t cy_stc_capsense_common_config_t::numEpiKrefDelayPrs

Number of Kref/4 cycles to be run during EPILOGUE if PRS is enabled.

Note: This field is available only for the fifth-generation low power CAPSENSE™.

◆ numEpiKrefDelay

uint16_t cy_stc_capsense_common_config_t::numEpiKrefDelay

Number of Kref/4 cycles to be run during EPILOGUE if PRS is disabled.

Note: This field is available only for the fifth-generation pow power CAPSENSE™.

◆ analogWakeupDelay

uint8_t cy_stc_capsense_common_config_t::analogWakeupDelay

Time needed to establish correct operation of CAPSENSE™ HW block block after power up or System Deep Sleep.

◆ csdInactiveSnsConnection

uint8_t cy_stc_capsense_common_config_t::csdInactiveSnsConnection

Inactive sensor connection for CSD scan:

CY_CAPSENSE_SNS_CONNECTION_HIGHZ
CY_CAPSENSE_SNS_CONNECTION_SHIELD
CY_CAPSENSE_SNS_CONNECTION_GROUND

◆ csxInactiveSnsConnection

uint8_t cy_stc_capsense_common_config_t::csxInactiveSnsConnection

Inactive sensor connection for CSX scan:

CY_CAPSENSE_SNS_CONNECTION_HIGHZ
CY_CAPSENSE_SNS_CONNECTION_GROUND
CY_CAPSENSE_SNS_CONNECTION_VDDA_BY_2

CY_CAPSENSE_SNS_CONNECTION_VDDA_BY_2 is only available for fifth-generation and fifth-generation low power CAPSENSE™.

◆ isxInactiveSnsConnection

uint8_t cy_stc_capsense_common_config_t::isxInactiveSnsConnection

Inactive sensor connection for ISX scan:

CY_CAPSENSE_SNS_CONNECTION_HIGHZ

Applicable only for fifth-generation low power CAPSENSE™.

◆ ssIrefSource

uint8_t cy_stc_capsense_common_config_t::ssIrefSource

Iref source.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ ssVrefSource

uint8_t cy_stc_capsense_common_config_t::ssVrefSource

Vref source.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ portCmodPadNum

uint8_t cy_stc_capsense_common_config_t::portCmodPadNum

Number of port of dedicated Cmod pad.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ pinCmodPad

uint8_t cy_stc_capsense_common_config_t::pinCmodPad

Position of the dedicated Cmod pad in the port.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ portCshPadNum

uint8_t cy_stc_capsense_common_config_t::portCshPadNum

Number of port of dedicated Csh pad.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ pinCshPad

uint8_t cy_stc_capsense_common_config_t::pinCshPad

Position of the dedicated Csh pad in the port.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ portShieldPadNum

uint8_t cy_stc_capsense_common_config_t::portShieldPadNum

Number of port of dedicated Shield pad.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ pinShieldPad

uint8_t cy_stc_capsense_common_config_t::pinShieldPad

Position of the dedicated Shield pad in the port.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ portVrefExtPadNum

uint8_t cy_stc_capsense_common_config_t::portVrefExtPadNum

Number of port of dedicated VrefExt pad.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ pinVrefExtPad

uint8_t cy_stc_capsense_common_config_t::pinVrefExtPad

Position of the dedicated VrefExt pad in the port.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ portCmodNum

uint8_t cy_stc_capsense_common_config_t::portCmodNum

Number of port of Cmod pin.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ pinCmod

uint8_t cy_stc_capsense_common_config_t::pinCmod

Position of the Cmod pin in the port.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ portCshNum

uint8_t cy_stc_capsense_common_config_t::portCshNum

Number of port of Csh pin.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ pinCsh

uint8_t cy_stc_capsense_common_config_t::pinCsh

Position of the Csh pin in the port.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ pinCintA

uint8_t cy_stc_capsense_common_config_t::pinCintA

Position of the CintA pin in the port.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ pinCintB

uint8_t cy_stc_capsense_common_config_t::pinCintB

Position of the CintB pin in the port.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ csdShieldDelay

uint8_t cy_stc_capsense_common_config_t::csdShieldDelay

Shield signal delay.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ csdShieldSwRes

uint8_t cy_stc_capsense_common_config_t::csdShieldSwRes

Shield switch resistance.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ csdInitSwRes

uint8_t cy_stc_capsense_common_config_t::csdInitSwRes

Switch resistance at coarse initialization.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ csdChargeTransfer

uint8_t cy_stc_capsense_common_config_t::csdChargeTransfer

IDAC sensing configuration.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ csdIdacGainInitIndex

uint8_t cy_stc_capsense_common_config_t::csdIdacGainInitIndex

IDAC gain index per idacGainTable.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ csdIdacMin

uint8_t cy_stc_capsense_common_config_t::csdIdacMin

Min acceptable IDAC value in CSD calibration.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ csdFineInitTime

uint8_t cy_stc_capsense_common_config_t::csdFineInitTime

Number of dummy SnsClk periods at fine initialization.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ csdMfsDividerOffsetF1

uint8_t cy_stc_capsense_common_config_t::csdMfsDividerOffsetF1

Frequency divider offset for channel 1.

This value is added to base (channel 0) SnsClk divider to form channel 1 frequency

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ csdMfsDividerOffsetF2

uint8_t cy_stc_capsense_common_config_t::csdMfsDividerOffsetF2

Frequency divider offset for channel 2.

This value is added to base (channel 0) SnsClk divider to form channel 2 frequency

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ csxFineInitTime

uint8_t cy_stc_capsense_common_config_t::csxFineInitTime

Number of dummy TX periods at fine initialization.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ csxInitSwRes

uint8_t cy_stc_capsense_common_config_t::csxInitSwRes

Switch resistance at fine initialization.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ csxScanSwRes

uint8_t cy_stc_capsense_common_config_t::csxScanSwRes

Switch resistance at scanning.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ csxInitShieldSwRes

uint8_t cy_stc_capsense_common_config_t::csxInitShieldSwRes

Switch resistance at fine initialization.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ csxScanShieldSwRes

uint8_t cy_stc_capsense_common_config_t::csxScanShieldSwRes

Switch resistance at scanning.

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ csxMfsDividerOffsetF1

uint8_t cy_stc_capsense_common_config_t::csxMfsDividerOffsetF1

Frequency divider offset for channel 1.

This value is added to base (channel 0) Tx divider to form channel 1 frequency

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ csxMfsDividerOffsetF2

uint8_t cy_stc_capsense_common_config_t::csxMfsDividerOffsetF2

Frequency divider offset for channel 2.

This value is added to base (channel 0) Tx divider to form channel 2 frequency

Note: This field is available only for the fourth-generation CAPSENSE™.

◆ isxRawTarget

uint8_t cy_stc_capsense_common_config_t::isxRawTarget

Raw count target in percentage for ISX calibration.

Note: This structure is available only for the fifth-generation low power CAPSENSE™

◆ isxCalibrationError

uint8_t cy_stc_capsense_common_config_t::isxCalibrationError

Acceptable calibration error.

Note: This structure is available only for the fifth-generation low power CAPSENSE™

◆ csdShieldMode

uint8_t cy_stc_capsense_common_config_t::csdShieldMode

Shield mode.

CY_CAPSENSE_SHIELD_DISABLED
CY_CAPSENSE_SHIELD_ACTIVE
CY_CAPSENSE_SHIELD_PASSIVE
Note
This field is available for the fifth-generation CAPSENSE™ and fifth-generation low power CAPSENSE™.

◆ numProOffsetCycles

uint8_t cy_stc_capsense_common_config_t::numProOffsetCycles

Maximum number of clk_mod cycles for the PRO_OFFSET state.

Note: This field is available for the fifth-generation CAPSENSE™ and fifth-generation low power CAPSENSE™.

◆ proOffsetCdacComp

uint8_t cy_stc_capsense_common_config_t::proOffsetCdacComp

Compensation CAPDAC size during PRO_OFFSET.

Note: This field is available only for the fifth-generation CAPSENSE™.

◆ chopPolarity

uint8_t cy_stc_capsense_common_config_t::chopPolarity

Select polarity for system level chopping.

Note: This field is available for the fifth-generation CAPSENSE™ and fifth-generation low power CAPSENSE™.

◆ numBadScans

uint8_t cy_stc_capsense_common_config_t::numBadScans

1 to 7, repeat scan upon "bad" scan.

Disabled = 0.

Note: This field is available for the fifth-generation CAPSENSE™ and fifth-generation low power CAPSENSE™.

◆ counterMode

uint8_t cy_stc_capsense_common_config_t::counterMode

Select overflow or saturate mode for raw count:

0 - CY_CAPSENSE_COUNTER_MODE_SATURATE
1 - CY_CAPSENSE_COUNTER_MODE_OVERFLOW
Note
This field is available for the fifth-generation CAPSENSE™ and fifth-generation low power CAPSENSE™.

◆ sensorConnection

uint8_t cy_stc_capsense_common_config_t::sensorConnection

Sensor Connection.

In CS-DMA mode, sensor connection always set to CTRLMUX.

0 - CY_CAPSENSE_AMUX_SENSOR_CONNECTION_METHOD: All AMUX capable GPIOs available as sensor.
1 - CY_CAPSENSE_CTRLMUX_SENSOR_CONNECTION_METHOD: Only dedicated GPIO available as sensor.
Note
This field is available only for the fifth-generation CAPSENSE™.

◆ syncClockEn

uint8_t cy_stc_capsense_common_config_t::syncClockEn

Enable external synchronization signals.

Note: This field is available only for the fifth-generation CAPSENSE™.

◆ syncMode

uint8_t cy_stc_capsense_common_config_t::syncMode

Synchronization mode:

0 - CY_CAPSENSE_SYNC_MODE_OFF
1 - CY_CAPSENSE_SYNC_EXTERNAL
2 - CY_CAPSENSE_SYNC_INTERNAL
Note
This field is available only for the fifth-generation CAPSENSE™.

◆ masterChannelId

uint8_t cy_stc_capsense_common_config_t::masterChannelId

The ID of the Master channel MULTI-CHIP solution.

This channel will generate msc_ext_frm_start_out and msc_ext_sync_clk_out signals

Note: This field is available only for the fifth-generation CAPSENSE™.

◆ numChannels

uint8_t cy_stc_capsense_common_config_t::numChannels

The number of CAPSENSE™ enabled MSCv3 blocks in the current chip.

Note: This field is available only for the fifth-generation CAPSENSE™.

◆ channelOffset

uint8_t cy_stc_capsense_common_config_t::channelOffset

The ID of the first channel that belongs to the current chip.

Note: This field is available only for the fifth-generation CAPSENSE™.

◆ syncFrameStartEn

uint8_t cy_stc_capsense_common_config_t::syncFrameStartEn