cy_stc_capsense_channel_config_t Struct Reference

Description

Declares MSC channel (HW block) configuration.

Note

This structure is available for the fifth-generation CAPSENSE™ and fifth-generation low power CAPSENSE™.

Data Fields
MSC_Type *	ptrHwBase
	Pointer to the MSC HW block register. More...
cy_stc_msc_context_t *	ptrHwContext
	Pointer to the MSC driver context. More...
MSCLP_Type *	ptrHwBase
	Pointer to the MSCLP HW block register. More...
cy_stc_msclp_context_t *	ptrHwContext
	Pointer to the MSCLP driver context. More...
GPIO_PRT_Type *	portCmod1
	The pointer to the Cmod1 pin base port register.
uint8_t	pinCmod1
	The Cmod1 pin position (bit number) in the port.
GPIO_PRT_Type *	portCmod2
	The pointer to the Cmod2 pin base port register.
uint8_t	pinCmod2
	The Cmod2 pin position (bit number) in the port.
uint8_t	dmaWrChIndex
	Specifies the DMA Write channel index. More...
uint8_t	dmaChainWrChIndex
	Specifies the DMA Chain Write channel index. More...
uint8_t	dmaRdChIndex
	Specifies the DMA Read channel index. More...
uint8_t	dmaChainRdChIndex
	Specifies the DMA Chain Read channel index. More...
const cy_stc_capsense_electrode_config_t *	ptrShieldEltdConfig
	Pointer to the first object of shield electrode configuration.

Field Documentation

ptrHwBase [1/2]

MSC_Type* cy_stc_capsense_channel_config_t::ptrHwBase

Pointer to the MSC HW block register.

Note

This structure is available only for the fifth-generation CAPSENSE™

ptrHwContext [1/2]

cy_stc_msc_context_t* cy_stc_capsense_channel_config_t::ptrHwContext

Pointer to the MSC driver context.

Note

This structure is available only for the fifth-generation CAPSENSE™

ptrHwBase [2/2]

MSCLP_Type* cy_stc_capsense_channel_config_t::ptrHwBase

Pointer to the MSCLP HW block register.

Note

This structure is available only for the fifth-generation low power CAPSENSE™

ptrHwContext [2/2]

cy_stc_msclp_context_t* cy_stc_capsense_channel_config_t::ptrHwContext

Pointer to the MSCLP driver context.

Note

This structure is available only for the fifth-generation low power CAPSENSE™

dmaWrChIndex

uint8_t cy_stc_capsense_channel_config_t::dmaWrChIndex

Specifies the DMA Write channel index.

Note

This structure is available only for the fifth-generation CAPSENSE™

dmaChainWrChIndex

uint8_t cy_stc_capsense_channel_config_t::dmaChainWrChIndex

Specifies the DMA Chain Write channel index.

Note

This structure is available only for the fifth-generation CAPSENSE™

dmaRdChIndex

uint8_t cy_stc_capsense_channel_config_t::dmaRdChIndex

Specifies the DMA Read channel index.

Note

This structure is available only for the fifth-generation CAPSENSE™

dmaChainRdChIndex

uint8_t cy_stc_capsense_channel_config_t::dmaChainRdChIndex

Specifies the DMA Chain Read channel index.

Note

This structure is available only for the fifth-generation CAPSENSE™