Structure containing information for configuration of a PLL.
Data Fields | |
| uint32_t | inputFreq |
| Frequency of the PLL source clock, in Hz. More... | |
| uint32_t | outputFreq |
| Frequency of the PLL output, in Hz. More... | |
| uint32_t cy_stc_sysclk_pll_config_t::inputFreq |
Frequency of the PLL source clock, in Hz.
This value can be left 0, then the Cy_SysClk_PllConfigure will get the source frequency automatically. The desired source clock should be already enabled and selected using Cy_SysClk_PllSetSource.
| uint32_t cy_stc_sysclk_pll_config_t::outputFreq |
Frequency of the PLL output, in Hz.