 |
CAT2 Peripheral Driver Library
|
|
CAT2 Peripheral Driver Library
|
This structure is used to initialize the SAR ADC subsystem.
The SAR ADC subsystem is highly configurable with many options. When calling Cy_SAR_Init, provide a pointer to the structure containing this configuration data. A set of enumerations is provided in this driver to help with configuring this structure.
See the Initialization and Enable section for guidance.
Data Fields | |
| cy_en_sar_ctrl_vref_sel_t | vrefSel |
| Internal VREF selection. | |
| bool | vrefBypCapEn |
| VREF bypass cap enable for when VREF buffer is on. | |
| cy_en_sar_ctrl_neg_sel_t | negSel |
| Internal NEG selection for Single ended conversion. | |
| cy_en_sar_ctrl_hw_ctrl_negvref_t | negVref |
| Hardware control of the VREF to NEG switch. | |
| bool | boostPump |
| Internal pump: false = disabled/bypassed, pump output is VDDA, true = enabled, pump output is boosted. | |
| cy_en_sar_ctrl_pwr_t | power |
| Power mode. | |
| bool | sarMuxDsEn |
| Enable SarMux during Deep Sleep cycle. | |
| bool | switchDisable |
| Disable SAR sequencer from enabling routing switches (note DSI and firmware can always close switches independent of this control) | |
| cy_en_sar_sample_ctrl_sub_resolution_t | subResolution |
| Conversion resolution for channels that have sub-resolution enabled. | |
| bool | leftAlign |
| Left align data in data[15:0], default data is right aligned in data[11:0], with sign extension to 16 bits if the channel is differential. More... | |
| bool | singleEndedSigned |
| Output data from a single ended conversion as a signed value. | |
| bool | differentialSigned |
| Output data from a differential conversion as a signed value. | |
| cy_en_sar_sample_ctrl_avg_cnt_t | avgCnt |
| Averaging Count for channels that have over sampling enabled (avgEn = true). More... | |
| bool | avgShift |
| Averaging shifting: after averaging the result is shifted right to fit in the sample resolution. More... | |
| cy_en_sar_sample_ctrl_trigger_mode_t | trigMode |
| Trigger Mode: FW only, edge or level sensitive. | |
| bool | eosEn |
| Enable to output EOS_INTR to trigger output. More... | |
| uint32_t | sampleTime0 |
| Sample time in ADC clocks for Sample Time 0. More... | |
| uint32_t | sampleTime1 |
| Sample time in ADC clocks for Sample Time 1. | |
| uint32_t | sampleTime2 |
| Sample time in ADC clocks for Sample Time 2. | |
| uint32_t | sampleTime3 |
| Sample time in ADC clocks for Sample Time 3. | |
| uint32_t | rangeThresLow |
| Range detect low threshold for all channels. More... | |
| uint32_t | rangeThresHigh |
| Range detect high threshold for all channels. More... | |
| cy_en_sar_range_detect_condition_t | rangeCond |
| Range detect condition (below, inside, output, or above) for all channels. More... | |
| uint32_t | chanEn |
| Enable bits for the channels. More... | |
| const cy_stc_sar_channel_config_t * | channelConfig [CY_SAR_NUM_CHANNELS] |
| Pointers to channel configuration structures, NULL means the channel is not configured. | |
| const cy_stc_sar_routing_config_t * | routingConfig |
| Pointer to the routing configuration structure. More... | |
| uint32_t | vrefMvValue |
| Reference voltage in millivolts used in converting counts to volts. | |
| bool cy_stc_sar_config_t::leftAlign |
Left align data in data[15:0], default data is right aligned in data[11:0], with sign extension to 16 bits if the channel is differential.
| cy_en_sar_sample_ctrl_avg_cnt_t cy_stc_sar_config_t::avgCnt |
Averaging Count for channels that have over sampling enabled (avgEn = true).
A channel will be sampled back to back avgCnt times before the result is stored and the next enabled channel is sampled (1st order accumulate and dump filter). If shifting is not enabled (avgShift = true) then the result is forced to shift right so that is fits in 16 bits, so right shift is done by max(0,AVG_CNT-3).
| bool cy_stc_sar_config_t::avgShift |
Averaging shifting: after averaging the result is shifted right to fit in the sample resolution.
For averaging the sample resolution is the highest resolution allowed by wounding.
| bool cy_stc_sar_config_t::eosEn |
Enable to output EOS_INTR to trigger output.
When enabled each time EOS_INTR is set by the hardware also a pulse is send on the trigger signal.
| uint32_t cy_stc_sar_config_t::sampleTime0 |
Sample time in ADC clocks for Sample Time 0.
For all the sampleTimeX fields, valid range is 2 - 1023 cycles. The minimum aperture time is 167 ns. With an 18 MHz ADC clock, this is equal to 3 cycles or a value of 4 in this field. The actual aperture time is one cycle less than the value stored in this field.
| uint32_t cy_stc_sar_config_t::rangeThresLow |
Range detect low threshold for all channels.
Used to generate range interrupt. Range detection for both rangeThresLow and rangeThresHigh is done after averaging, alignment, and sign extension (if applicable), i.e. threshold values need to have the same data format as the result data. The values are interpreted as signed or unsigned according to each channel's configuration
| uint32_t cy_stc_sar_config_t::rangeThresHigh |
Range detect high threshold for all channels.
Used to generate range interrupt
| cy_en_sar_range_detect_condition_t cy_stc_sar_config_t::rangeCond |
Range detect condition (below, inside, output, or above) for all channels.
Used to generate range interrupt
| uint32_t cy_stc_sar_config_t::chanEn |
Enable bits for the channels.
All the sequential channels bits are within CY_SAR_CHANNELS_MASK, the injection channel mask is CY_SAR_INJ_CHAN_MASK.
| const cy_stc_sar_routing_config_t* cy_stc_sar_config_t::routingConfig |
Pointer to the routing configuration structure.
Can be NULL in case of no need to configure the routing