Functions
void	Cy_SysClk_CsvInit (cy_stc_sysclk_csv_config_t *config)
	Initializes the clock supervision parameters. More...

__STATIC_INLINE void	Cy_SysClk_CsvEnable (void)
	Enables the Clock Supervision block. More...

__STATIC_INLINE bool	Cy_SysClk_CsvIsEnabled (void)
	Checks the Clock Supervision block enable/disable state. More...

__STATIC_INLINE void	Cy_SysClk_CsvDisable (void)
	Disables clock supervision. More...

Detailed Description

Function Documentation

◆ Cy_SysClk_CsvInit()

void Cy_SysClk_CsvInit ( cy_stc_sysclk_csv_config_t * config )

Initializes the clock supervision parameters.

This API is available on devices with the CSV Feature (i.e. PSoC 4500S and 4100S Max). Refer to the Device Datasheet to check the CSV feature support.

Parameters

config A pointer to the structure of type cy_stc_sysclk_csv_config_t

Function Usage: uint32_t csvIntr = 0UL;
void Csv_Isr(void)
{
csvIntr = Cy_SysClk_GetInterruptStatusMasked();
Cy_SysClk_ClearInterrupt(csvIntr);
}
/* Scenario: Presume we have 32MHz IMO clock and 24 MHz EXCO block output clock: */
cy_stc_sysclk_csv_config_t csvConfig =
{
.startupDelay = 16000U, /* let the startup delay be 0.5 ms */
.period = 24000U, /* let the monitor period be 1 ms */
.lowerLimit = 31000U, /* let add the ~3% (~1ns) margin around the reference clock */
.upperLimit = 33000U,
.clkSwitchEn = true, /* enable the clock switching feature */
.triggerEn = true, /* enable the trigger signal */
.interruptEn = true /* enable the CSV interrupt */
};
/* Scenario: Configure and enable the CSV interrupt in the application code */
cy_stc_sysint_t Csv_IrqCfg =
{
.intrSrc = exco_interrupt_IRQn, /* The interrupt source is the EXCO block */
.intrPriority = 3UL /* The interrupt priority is 3 */
};
/* Configure the interrupt with a vector at Csv_Isr(). */
cy_en_sysint_status_t sysintStatus = Cy_SysInt_Init(&Csv_IrqCfg, Csv_Isr);
if (CY_SYSINT_SUCCESS != sysintStatus)
{
/* Insert the error handling here */
}
NVIC_ClearPendingIRQ(Csv_IrqCfg.intrSrc); /* Clear a possible pending interrupt */
NVIC_EnableIRQ(Csv_IrqCfg.intrSrc); /* Enable the interrupt */
/* Scenario: Connect the CSV trigger to the DMA channel */
Cy_TrigMux_Connect(TRIG0_IN_EXCO_TRIGGER, TRIG0_OUT_CPUSS_DMAC_TR_IN0);
/* Scenario: Enable the CSV */
Cy_SysClk_CsvInit(&csvConfig);
Cy_SysClk_CsvEnable();
Cy_SysClk_ClearInterrupt(CY_SYSCLK_INTR_SW_IMO);
Cy_SysClk_SetInterruptMask(CY_SYSCLK_INTR_SW_IMO);

◆ Cy_SysClk_CsvEnable()

__STATIC_INLINE void Cy_SysClk_CsvEnable ( void )

Enables the Clock Supervision block.

This API is available on devices with the CSV Feature (i.e. PSoC 4500S and 4100S Max). Refer to the Device Datasheet to check the CSV feature support.

Function Usage: uint32_t csvIntr = 0UL;
void Csv_Isr(void)
{
csvIntr = Cy_SysClk_GetInterruptStatusMasked();
Cy_SysClk_ClearInterrupt(csvIntr);
}
/* Scenario: Configure and enable the CSV interrupt in the application code */
cy_stc_sysint_t Csv_IrqCfg =
{
.intrSrc = exco_interrupt_IRQn, /* The interrupt source is the EXCO block */
.intrPriority = 3UL /* The interrupt priority is 3 */
};
/* Configure the interrupt with a vector at Csv_Isr(). */
cy_en_sysint_status_t sysintStatus = Cy_SysInt_Init(&Csv_IrqCfg, Csv_Isr);
if (CY_SYSINT_SUCCESS != sysintStatus)
{
/* Insert the error handling here */
}
NVIC_ClearPendingIRQ(Csv_IrqCfg.intrSrc); /* Clear a possible pending interrupt */
NVIC_EnableIRQ(Csv_IrqCfg.intrSrc); /* Enable the interrupt */
/* Scenario: Presume we have 32MHz IMO clock and 24 MHz EXCO block output clock: */
cy_stc_sysclk_csv_config_t csvConfig =
{
.startupDelay = 16000U, /* let the startup delay be 0.5 ms */
.period = 24000U, /* let the monitor period be 1 ms */
.lowerLimit = 31000U, /* let add the ~3% (~1ns) margin around the reference clock */
.upperLimit = 33000U,
.clkSwitchEn = true, /* enable the clock switching feature */
.triggerEn = true, /* enable the trigger signal */
.interruptEn = true /* enable the CSV interrupt */
};
/* Scenario: Enable the CSV */
Cy_SysClk_CsvInit(&csvConfig);
Cy_SysClk_CsvEnable();
Cy_SysClk_ClearInterrupt(CY_SYSCLK_INTR_SW_IMO);
Cy_SysClk_SetInterruptMask(CY_SYSCLK_INTR_SW_IMO);

◆ Cy_SysClk_CsvIsEnabled()

__STATIC_INLINE bool Cy_SysClk_CsvIsEnabled ( void )

Checks the Clock Supervision block enable/disable state.

This API is available on devices with the CSV Feature (i.e. PSoC 4500S and 4100S Max). Refer to the Device Datasheet to check the CSV feature support.

Function Usage: /* Declare the Clock Supervisor Deep Sleep callback */
cy_en_syspm_status_t My_CsvDsCb(cy_stc_syspm_callback_params_t * callbackParams, cy_en_syspm_callback_mode_t mode)
{
static bool pgmEn = false; /* Static variable to store the Delay Counter state during Deep Sleep cycle */
static bool csvEn = false; /* Static variable to store the CSV state during Deep Sleep cycle */
cy_en_syspm_status_t retVal = CY_SYSPM_SUCCESS;
CY_UNUSED_PARAMETER(callbackParams);
if (CY_SYSPM_BEFORE_TRANSITION == mode)
{
pgmEn = Cy_SysClk_DelayCounterIsEnabled(); /* Check the Delay Counter state */
csvEn = Cy_SysClk_CsvIsEnabled(); /* Check the CSV state */
if (pgmEn)
{
Cy_SysClk_DelayCounterDisable(); /* Disable the Delay Counter before falling asleep */
}
if (csvEn)
{
Cy_SysClk_CsvDisable(); /* Disable the CSV before falling asleep */
}
}
if (CY_SYSPM_AFTER_TRANSITION == mode)
{
if (csvEn)
{
Cy_SysClk_CsvEnable(); /* Enable the CSV after wake up */
}
if (pgmEn)
{
Cy_SysClk_DelayCounterReload(); /* Reload the Delay Counter before enabling */
Cy_SysClk_DelayCounterEnable(); /* Enable the Delay Counter after wake up */
}
}
return (retVal);
}

◆ Cy_SysClk_CsvDisable()

__STATIC_INLINE void Cy_SysClk_CsvDisable ( void )

Disables clock supervision.

This API is available on devices with the CSV Feature (i.e. PSoC 4500S and 4100S Max). Refer to the Device Datasheet to check the CSV feature support.

Function Usage: /* Scenario: Disable the CSV */
Cy_SysClk_SetInterruptMask(0UL);
Cy_SysClk_CsvDisable();

Functions

Detailed Description

Function Documentation

◆ Cy_SysClk_CsvInit()

◆ Cy_SysClk_CsvEnable()

◆ Cy_SysClk_CsvIsEnabled()

◆ Cy_SysClk_CsvDisable()