CAT2 Peripheral Driver Library
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Enumerations

enum  cy_en_dmac_descriptor_t {
  CY_DMAC_DESCRIPTOR_PING = 0U,
  CY_DMAC_DESCRIPTOR_PONG = 1U
}
 Descriptor type. More...
 
enum  cy_en_dmac_trigger_type_t {
  CY_DMAC_SINGLE_ELEMENT = 0U,
  CY_DMAC_SINGLE_DESCR = 1U,
  CY_DMAC_DESCR_LIST = 2U
}
 Triggering Type. More...
 
enum  cy_en_dmac_data_size_t {
  CY_DMAC_BYTE = 0U,
  CY_DMAC_HALFWORD = 1U,
  CY_DMAC_WORD = 2U
}
 Contains the options for the data size. More...
 
enum  cy_en_dmac_retrigger_t {
  CY_DMAC_RETRIG_IM = 0U,
  CY_DMAC_RETRIG_4CYC = 1U,
  CY_DMAC_RETRIG_16CYC = 2U,
  CY_DMAC_WAIT_FOR_REACT = 3U
}
 Contains the options for descriptor retriggering. More...
 
enum  cy_en_dmac_transfer_size_t {
  CY_DMAC_TRANSFER_SIZE_DATA = 0U,
  CY_DMAC_TRANSFER_SIZE_WORD = 1U
}
 Contains the options for the transfer size. More...
 
enum  cy_en_dmac_status_t {
  CY_DMAC_SUCCESS = 0x0UL,
  CY_DMAC_BAD_PARAM = CY_DMAC_ID | CY_PDL_STATUS_ERROR | 0x1UL
}
 Contains the return values of the DMAC driver. More...
 
enum  cy_en_dmac_response_t {
  CY_DMAC_NO_ERROR = 0x0UL,
  CY_DMAC_DONE = 0x1UL,
  CY_DMAC_SRC_BUS_ERROR = 0x2UL,
  CY_DMAC_DST_BUS_ERROR = 0x3UL,
  CY_DMAC_SRC_MISAL = 0x4UL,
  CY_DMAC_DST_MISAL = 0x5UL,
  CY_DMAC_INVALID_DESCR = 0x6UL
}
 The descriptor response codes. More...
 

Detailed Description

Enumeration Type Documentation

◆ cy_en_dmac_descriptor_t

Descriptor type.

Enumerator
CY_DMAC_DESCRIPTOR_PING 

Ping descriptor.

CY_DMAC_DESCRIPTOR_PONG 

Pong descriptor.

◆ cy_en_dmac_trigger_type_t

Triggering Type.

Enumerator
CY_DMAC_SINGLE_ELEMENT 

A single trigger initiates a single data element transfer.

CY_DMAC_SINGLE_DESCR 

A single trigger initiates a single descriptor transfer.

CY_DMAC_DESCR_LIST 

A single trigger initiates a descriptor list transfer.

This option relies on cy_stc_dmac_descriptor_config_t::flipping to be set to 'true', such that the cy_stc_dmac_channel_config_t::descriptor field is flipped/inverted and the successive descriptor is used.

◆ cy_en_dmac_data_size_t

Contains the options for the data size.

Enumerator
CY_DMAC_BYTE 

One byte.

CY_DMAC_HALFWORD 

Half word (two bytes).

CY_DMAC_WORD 

Full word (four bytes).

◆ cy_en_dmac_retrigger_t

Contains the options for descriptor retriggering.

Enumerator
CY_DMAC_RETRIG_IM 

Retrigger immediately.

CY_DMAC_RETRIG_4CYC 

Retrigger after 4 Clk_Slow cycles.

CY_DMAC_RETRIG_16CYC 

Retrigger after 16 Clk_Slow cycles.

CY_DMAC_WAIT_FOR_REACT 

Wait for trigger reactivation.

◆ cy_en_dmac_transfer_size_t

Contains the options for the transfer size.

Enumerator
CY_DMAC_TRANSFER_SIZE_DATA 

As specified by dataSize.

CY_DMAC_TRANSFER_SIZE_WORD 

A full word (four bytes).

◆ cy_en_dmac_status_t

Contains the return values of the DMAC driver.

Enumerator
CY_DMAC_SUCCESS 

Success.

CY_DMAC_BAD_PARAM 

The input parameters passed to the DMAC API are not valid.

◆ cy_en_dmac_response_t

The descriptor response codes.

The first two codes NO_ERROR and DONE are the result of normal behavior, the other codes are the result of erroneous behavior.

Enumerator
CY_DMAC_NO_ERROR 

No error.

Setting this response does NOT set the interrupt cause bit. The descriptor validness status is not affected. The channel enable state is not affected. The channel current descriptor status is not updated. This response is used for an unused or not completed descriptor.

CY_DMAC_DONE 

The descriptor is done (without errors).

Setting this response sets the interrupt bit if cy_stc_dmac_descriptor_config_t::interrupt is true. The descriptor is invalidated if cy_stc_dmac_descriptor_config_t::cpltState is true. The channel enable state is not affected. The channel current descriptor status is updated if cy_stc_dmac_descriptor_config_t::flipping is true.

CY_DMAC_SRC_BUS_ERROR 

A bus error while loading data from the source location.

Setting this response sets the correspondent interrupt bit. The descriptor is invalidated. The channel is disabled. The channel current descriptor status is not updated (it identifies the descriptor that caused the error).

CY_DMAC_DST_BUS_ERROR 

A bus error while storing data to the destination location.

Setting this response sets the correspondent interrupt bit. The descriptor is invalidated. The channel is disabled. The channel current descriptor status is not updated (it identifies the descriptor that caused the error).

CY_DMAC_SRC_MISAL 

Misalignment of the source address.

This occurs on a source 16-bit bus transfer that is not 2-byte aligned or on a 32-bit bus transfer that is not 4-byte aligned. Setting this response sets the correspondent interrupt bit. The descriptor is invalidated. The channel is disabled. The channel current descriptor status is not updated (it identifies the descriptor that caused the error).

CY_DMAC_DST_MISAL 

Misalignment of the destination address.

This occurs on a destination 16-bit bus transfer that is not 2-byte aligned or on a 32-bit bus transfer that is not 4-byte aligned. Setting this response sets the correspondent interrupt bit. The descriptor is invalidated. The channel is disabled. The channel current descriptor status is not updated (it identifies the descriptor that caused the error).

CY_DMAC_INVALID_DESCR 

The invalid descriptor.

This occurs when an activated channel has an invalidated/disabled descriptor (either by HW or FW). The channel is disabled. The channel current descriptor status is not updated (it identifies the descriptor that caused the error).