CAT2 Peripheral Driver Library
DMAC (Direct Memory Access Controller)

Configures the DMA Controller block, channels and descriptors. More...

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Detailed Description

Configures the DMA Controller block, channels and descriptors.

The functions and other declarations used in this driver are in cy_dmac.h. You can include cy_pdl.h to get access to all functions and declarations in the PDL.

The DMA Controller channel is used in any project to transfer data without CPU intervention basing on a hardware trigger signal from another component.

The DMA Controller block has a set of registers, a base hardware address, and supports multiple channels with ping and pong descriptors. Many API functions for the DMAC driver require a base hardware address, channel number and descriptor. Ensure that you use the correct hardware address for the DMA Controller block in use.

Features:

Configuration Considerations

To set up a DMAC driver, initialize and validate a descriptor and channel, then enable the DMAC block.

To set up a descriptor, provide the configuration parameters for the descriptor in the cy_stc_dmac_descriptor_config_t structure. Then call the Cy_DMAC_Descriptor_Init function to initialize the descriptor. You can modify the source and destination addresses dynamically by calling Cy_DMAC_Descriptor_SetSrcAddress and Cy_DMAC_Descriptor_SetDstAddress.

To set up a DMAC channel, provide a filled cy_stc_dmac_channel_config_t structure. Call the Cy_DMAC_Channel_Init function, specifying the channel number. Use Cy_DMAC_Channel_Enable to enable the configured DMAC channel.

Call Cy_DMAC_Channel_Enable for each DMAC channel in use.

When configured, another peripheral typically triggers the DMAC channel. The trigger is connected to the DMAC channel using the trigger multiplexer. The trigger multiplexer driver has a software trigger you can use in firmware to trigger the DMAC channel. See the Trigger Multiplexer documentation.

The following is a simplified structure of the DMAC driver API interdependencies in a typical user application:

NOTE: Even if a DMAC channel is enabled and the descriptor is validated, the channel is not operational until the DMAC block is enabled using function Cy_DMAC_Enable.
NOTE: If the DMAC descriptor is configured to generate an interrupt, the interrupt must be enabled using the Cy_DMAC_SetInterruptMask function for each DMAC channel.

For example:

/* Scenario: Initialize the single ping descriptor */
#define DATA_CNT (8U)
#define CHANN_NUM (0U)
uint32_t src[DATA_CNT];
uint32_t dst[DATA_CNT];
/* Descriptor ping configuration structure */
cy_stc_dmac_descriptor_config_t descriptorPingCfg =
{
.srcAddress = src,
.dstAddress = dst,
.dataCount = DATA_CNT,
.dataSize = CY_DMAC_WORD,
.srcTransferSize = CY_DMAC_TRANSFER_SIZE_WORD,
.srcAddrIncrement = true,
.dstTransferSize = CY_DMAC_TRANSFER_SIZE_WORD,
.dstAddrIncrement = true,
.retrigger = CY_DMAC_RETRIG_IM,
.cpltState = false,
.interrupt = false,
.preemptable = false,
.flipping = false,
.triggerType = CY_DMAC_SINGLE_DESCR
};
/* Channel configuration structure */
{
.priority = 3U,
.enable = false,
};
/* Initialize the ping descriptor for channel 0 */
if (CY_DMAC_SUCCESS != Cy_DMAC_Descriptor_Init(DMAC, CHANN_NUM, CY_DMAC_DESCRIPTOR_PING, &descriptorPingCfg))
{
/* Insert error handling */
}
/* Scenario: Setup and enable DMAC channel 0 */
if (CY_DMAC_SUCCESS != Cy_DMAC_Channel_Init(DMAC, CHANN_NUM, &channelConfig))
{
/* Insert error handling */
}

Power Modes.

The DMA controller provides the Active/Sleep functionality and is not available in Deep-Sleep power mode. Before transition to Deep-Sleep, handle pending interrupts and triggers for channels because they will be cleared on transition or wait for completion using the Cy_DMAC_GetActiveChannel function.

/* Scenario: Wait for the completion of all pending channels and disable DMAC */
while (0U != Cy_DMAC_GetActiveChannel(DMAC))
{
}

Refer to the SysPm (System Power Management) driver for more information about low-power mode transitions.

More Information.

See the DMAC chapter of the device technical reference manual (TRM).

Changelog

VersionChangesReason for Change
1.20 Interface update for Cy_DMAC_Descriptor_SetSrcAddress() and Cy_DMAC_Descriptor_SetDstAddress(), parameter update for cy_stc_dmac_descriptor_config_t. MISRA violation fix.
1.10.1 Update the paths to the code snippets. PDL structure update.
1.10 Fixed the Cy_DMAC_Descriptor_SetState() function to properly clear status register. Defect fix.
1.0.1 Corrected source code comments text.
1.0 The initial version.