Default constants for CNT Registers.
Macros | |
#define | CY_TCPWM_CNT_CTRL_DEFAULT (0x0U) |
Default value for CTRL register. | |
#define | CY_TCPWM_CNT_COUNTER_DEFAULT (0x0U) |
Default value for COUNTER register. | |
#define | CY_TCPWM_CNT_CC_DEFAULT (0xFFFFFFFFU) |
Default value for CC register. | |
#define | CY_TCPWM_CNT_CC_BUFF_DEFAULT (0xFFFFFFFFU) |
Default value for CC_BUFF register. | |
#define | CY_TCPWM_CNT_PERIOD_DEFAULT (0xFFFFFFFFU) |
Default value for PERIOD register. | |
#define | CY_TCPWM_CNT_PERIOD_BUFF_DEFAULT (0xFFFFFFFFU) |
Default value for PERIOD_BUFF register. | |
#define | CY_TCPWM_CNT_TR_CTRL0_DEFAULT (0x10U) |
Default value for TR_CTRL0 register. | |
#define | CY_TCPWM_CNT_TR_CTRL1_DEFAULT (0x3FFU) |
Default value for TR_CTRL1 register. | |
#define | CY_TCPWM_CNT_TR_CTRL2_DEFAULT (0x3FU) |
Default value for TR_CTRL2 register. | |
#define | CY_TCPWM_CNT_INTR_DEFAULT (0x3U) |
Default value for INTR register. | |
#define | CY_TCPWM_CNT_INTR_SET_DEFAULT (0x0U) |
Default value for INTR_SET register. | |
#define | CY_TCPWM_CNT_INTR_MASK_DEFAULT (0x0U) |
Default value for INTR_MASK register. | |
#define | CY_TCPWM_GRP_CNT_CTRL_DEFAULT (0xF0U) |
Default value for CTRL register. | |
#define | CY_TCPWM_GRP_CNT_DT_DEFAULT (0x0U) |
Default value for DT register. | |
#define | CY_TCPWM_GRP_CNT_COUNTER_DEFAULT (0x0U) |
Default value for COUNTER register. | |
#define | CY_TCPWM_GRP_CNT_CC0_DEFAULT (0xFFFFFFFFU) |
Default value for CC0 register. | |
#define | CY_TCPWM_GRP_CNT_CC0_BUFF_DEFAULT (0xFFFFFFFFU) |
Default value for CC0_BUFF register. | |
#define | CY_TCPWM_GRP_CNT_CC1_DEFAULT (0xFFFFFFFFU) |
Default value for CC0 register. | |
#define | CY_TCPWM_GRP_CNT_CC1_BUFF_DEFAULT (0xFFFFFFFFU) |
Default value for CC0_BUFF register. | |
#define | CY_TCPWM_GRP_CNT_PERIOD_DEFAULT (0xFFFFFFFFU) |
Default value for PERIOD register. | |
#define | CY_TCPWM_GRP_CNT_PERIOD_BUFF_DEFAULT (0xFFFFFFFFU) |
Default value for PERIOD_BUFF register. | |
#define | CY_TCPWM_GRP_CNT_TR_PWM_CTRL_DEFAULT (0xFFFU) |
Default value for TR_PWM_CTRL register. | |
#define | CY_TCPWM_GRP_CNT_TR_IN_SEL0_DEFAULT (0x100U) |
Default value for TR_IN_SEL0 register. | |
#define | CY_TCPWM_GRP_CNT_TR_IN_SEL1_DEFAULT (0x0U) |
Default value for TR_IN_SEL1 register. | |
#define | CY_TCPWM_GRP_CNT_TR_IN_EDGE_SEL_DEFAULT (0xFFFU) |
Default value for TR_IN_EDGE_SEL register. | |
#define | CY_TCPWM_GRP_CNT_INTR_MASK_DEFAULT (0x0U) |
Default value for INTR_MASK register. | |