Enumerations | |
enum | cy_en_clkhf_in_sources_t { CY_SYSCLK_CLKHF_IN_CLKPATH0 = 0U, CY_SYSCLK_CLKHF_IN_CLKPATH1 = 1U, CY_SYSCLK_CLKHF_IN_CLKPATH2 = 2U, CY_SYSCLK_CLKHF_IN_CLKPATH3 = 3U, CY_SYSCLK_CLKHF_IN_CLKPATH4 = 4U, CY_SYSCLK_CLKHF_IN_CLKPATH5 = 5U, CY_SYSCLK_CLKHF_IN_CLKPATH6 = 6U, CY_SYSCLK_CLKHF_IN_CLKPATH7 = 7U, CY_SYSCLK_CLKHF_IN_CLKPATH8 = 8U, CY_SYSCLK_CLKHF_IN_CLKPATH9 = 9U, CY_SYSCLK_CLKHF_IN_CLKPATH10 = 10U, CY_SYSCLK_CLKHF_IN_CLKPATH11 = 11U, CY_SYSCLK_CLKHF_IN_CLKPATH12 = 12U, CY_SYSCLK_CLKHF_IN_CLKPATH13 = 13U, CY_SYSCLK_CLKHF_IN_CLKPATH14 = 14U, CY_SYSCLK_CLKHF_IN_CLKPATH15 = 15U } |
Selects which clkHf input, or root mux, to configure. More... | |
enum | cy_en_clkhf_dividers_t { CY_SYSCLK_CLKHF_NO_DIVIDE = 0U, CY_SYSCLK_CLKHF_DIVIDE_BY_2 = 1U, CY_SYSCLK_CLKHF_DIVIDE_BY_4 = 2U, CY_SYSCLK_CLKHF_DIVIDE_BY_8 = 3U, CY_SYSCLK_CLKHF_MAX_DIVIDER } |
clkHf divider values. More... | |
Selects which clkHf input, or root mux, to configure.
See CLK_ROOT_SELECT registers, bits ROOT_MUX. Used with functions Cy_SysClk_ClkHfSetSource and Cy_SysClk_ClkHfGetSource.
clkHf divider values.
See CLK_ROOT_SELECT registers, bits ROOT_DIV. Used with functions Cy_SysClk_ClkHfSetDivider and Cy_SysClk_ClkHfGetDivider.