Interrupt Functions

General Description

This set of functions are related to ADCMic interrupts.

Functions
void	Cy_ADCMic_EnableInterrupt (MXS40ADCMIC_Type *base, uint32_t intrMask)
	Sets the specified interrupt bit in the interrupt mask register. More...
void	Cy_ADCMic_DisableInterrupt (MXS40ADCMIC_Type *base, uint32_t intrMask)
	Clears the specified interrupt bit in the interrupt mask register. More...
__STATIC_INLINE uint32_t	Cy_ADCMic_GetInterruptStatus (MXS40ADCMIC_Type const *base)
	Returns the interrupt status of the specified channel. More...
__STATIC_INLINE void	Cy_ADCMic_ClearInterrupt (MXS40ADCMIC_Type *base, uint32_t intrMask)
	Clears the interrupt status. More...
__STATIC_INLINE void	Cy_ADCMic_SetInterrupt (MXS40ADCMIC_Type *base, uint32_t intrMask)
	Sets the interrupt for the specified channel. More...
__STATIC_INLINE uint32_t	Cy_ADCMic_GetInterruptMask (MXS40ADCMIC_Type const *base)
	Returns the interrupt mask value of the specified channel. More...
__STATIC_INLINE void	Cy_ADCMic_SetInterruptMask (MXS40ADCMIC_Type *base, uint32_t intrMask)
	Sets an interrupt mask value for the specified channel. More...
__STATIC_INLINE uint32_t	Cy_ADCMic_GetInterruptStatusMasked (MXS40ADCMIC_Type const *base)
	Returns the logical AND of the corresponding INTR and INTR_MASK fields in a single-load operation. More...

Function Documentation

Cy_ADCMic_EnableInterrupt()

void Cy_ADCMic_EnableInterrupt	(	MXS40ADCMIC_Type *	base,
		uint32_t	intrMask
	)

Sets the specified interrupt bit in the interrupt mask register.

Parameters

base	The pointer to the hardware ADCMic block.
intrMask	The mask of interrupts to enable. Select one or more values from Interrupt Masks and "OR" them together. CY_ADCMIC_INTR_DC CY_ADCMIC_INTR_DATA

Function Usage

    /* Scenario: Configure and enable the ADCMic interrupt. */
    const cy_stc_sysint_t ADCMic_IRQ_cfg =
    {
        .intrSrc      = adcmic_interrupt_adcmic_IRQn, /* Interrupt source is the ADCMic interrupt */
        .intrPriority = 7UL                           /* Interrupt priority is 7 */
    };
    
    /* Configure the interrupt with vector at ADCMic_Isr(). */
    (void)Cy_SysInt_Init(&ADCMic_IRQ_cfg, ADCMic_Isr);

    /* Enable the interrupt. */
    NVIC_EnableIRQ(ADCMic_IRQ_cfg.intrSrc);
    
    /* Clear possible interrupt erroneously raised during block enabling */
    Cy_ADCMic_ClearInterrupt(MXS40ADCMIC0, CY_ADCMIC_INTR);
    Cy_ADCMic_EnableInterrupt(MXS40ADCMIC0, CY_ADCMIC_INTR_DATA);

Cy_ADCMic_DisableInterrupt()

void Cy_ADCMic_DisableInterrupt	(	MXS40ADCMIC_Type *	base,
		uint32_t	intrMask
	)

Clears the specified interrupt bit in the interrupt mask register.

Parameters

base	The pointer to the hardware ADCMic block.
intrMask	The mask of interrupts to disable. Select one or more values from Interrupt Masks and "OR" them together. CY_ADCMIC_INTR_DC CY_ADCMIC_INTR_DATA

Function Usage

    /* Scenario: Configure and enable the ADCMic interrupt. */
    const cy_stc_sysint_t ADCMic_IRQ_cfg =
    {
        .intrSrc      = adcmic_interrupt_adcmic_IRQn, /* Interrupt source is the ADCMic interrupt */
        .intrPriority = 7UL                           /* Interrupt priority is 7 */
    };
    
    /* Configure the interrupt with vector at ADCMic_Isr(). */
    (void)Cy_SysInt_Init(&ADCMic_IRQ_cfg, ADCMic_Isr);

    /* Enable the interrupt. */
    NVIC_EnableIRQ(ADCMic_IRQ_cfg.intrSrc);
    
    /* Clear possible interrupt erroneously raised during block enabling */
    Cy_ADCMic_ClearInterrupt(MXS40ADCMIC0, CY_ADCMIC_INTR);
    Cy_ADCMic_EnableInterrupt(MXS40ADCMIC0, CY_ADCMIC_INTR_DATA);

Cy_ADCMic_GetInterruptStatus()

__STATIC_INLINE uint32_t Cy_ADCMic_GetInterruptStatus

(

MXS40ADCMIC_Type const *

base

)

Returns the interrupt status of the specified channel.

Parameters

base	The pointer to the hardware ADCMic block.

Returns

The interrupt status.

Function Usage

    /* Scenario: Configure and enable the ADCMic interrupt. */
    const cy_stc_sysint_t ADCMic_IRQ_cfg =
    {
        .intrSrc      = adcmic_interrupt_adcmic_IRQn, /* Interrupt source is the ADCMic interrupt */
        .intrPriority = 7UL                           /* Interrupt priority is 7 */
    };
    
    /* Configure the interrupt with vector at ADCMic_Isr(). */
    (void)Cy_SysInt_Init(&ADCMic_IRQ_cfg, ADCMic_Isr);

    /* Enable the interrupt. */
    NVIC_EnableIRQ(ADCMic_IRQ_cfg.intrSrc);
    
    /* Clear possible interrupt erroneously raised during block enabling */
    Cy_ADCMic_ClearInterrupt(MXS40ADCMIC0, CY_ADCMIC_INTR);
    Cy_ADCMic_EnableInterrupt(MXS40ADCMIC0, CY_ADCMIC_INTR_DATA);

Cy_ADCMic_ClearInterrupt()

__STATIC_INLINE void Cy_ADCMic_ClearInterrupt	(	MXS40ADCMIC_Type *	base,
		uint32_t	intrMask
	)

Clears the interrupt status.

Parameters

base	The pointer to the hardware ADC block.
intrMask	The mask of interrupts to clear. Typically this will be the value returned from Cy_ADCMic_GetInterruptStatus. Alternately, select one or more values from Interrupt Masks and "OR" them together. CY_ADCMIC_INTR_DC CY_ADCMIC_INTR_DATA

Function Usage

    /* Scenario: Configure and enable the ADCMic interrupt. */
    const cy_stc_sysint_t ADCMic_IRQ_cfg =
    {
        .intrSrc      = adcmic_interrupt_adcmic_IRQn, /* Interrupt source is the ADCMic interrupt */
        .intrPriority = 7UL                           /* Interrupt priority is 7 */
    };
    
    /* Configure the interrupt with vector at ADCMic_Isr(). */
    (void)Cy_SysInt_Init(&ADCMic_IRQ_cfg, ADCMic_Isr);

    /* Enable the interrupt. */
    NVIC_EnableIRQ(ADCMic_IRQ_cfg.intrSrc);
    
    /* Clear possible interrupt erroneously raised during block enabling */
    Cy_ADCMic_ClearInterrupt(MXS40ADCMIC0, CY_ADCMIC_INTR);
    Cy_ADCMic_EnableInterrupt(MXS40ADCMIC0, CY_ADCMIC_INTR_DATA);

Cy_ADCMic_SetInterrupt()

__STATIC_INLINE void Cy_ADCMic_SetInterrupt	(	MXS40ADCMIC_Type *	base,
		uint32_t	intrMask
	)

Sets the interrupt for the specified channel.

Intended mostly for debugging.

Parameters

base	The pointer to the hardware ADCMic block.
intrMask	The mask of interrupts to set. Select one or more values from Interrupt Masks and "OR" them together. CY_ADCMIC_INTR_DC CY_ADCMIC_INTR_DATA

Cy_ADCMic_GetInterruptMask()

__STATIC_INLINE uint32_t Cy_ADCMic_GetInterruptMask

(

MXS40ADCMIC_Type const *

base

)

Returns the interrupt mask value of the specified channel.

Parameters

base	The pointer to the hardware ADCMic block.

Returns

The interrupt mask value.

Function Usage

    /* Scenario: Check whether a specific interrupt source is enabled. */    
    if (0UL != (CY_ADCMIC_INTR_DATA & Cy_ADCMic_GetInterruptMask(MXS40ADCMIC0)))
    {
        /* DATA interrupt was enabled. */
    }

Cy_ADCMic_SetInterruptMask()

__STATIC_INLINE void Cy_ADCMic_SetInterruptMask	(	MXS40ADCMIC_Type *	base,
		uint32_t	intrMask
	)

Sets an interrupt mask value for the specified channel.

Parameters

base	The pointer to the hardware ADCMic block.
intrMask	The mask of interrupts. Select one or more values from Interrupt Masks and "OR" them together. CY_ADCMIC_INTR_DC CY_ADCMIC_INTR_DATA

Function Usage

    /* Scenario: Enable the DATA and DC interrupt sources.
     * Make sure to assign an ISR to handle the ADCMic interrupts.
     */
    Cy_ADCMic_SetInterruptMask(MXS40ADCMIC0, CY_ADCMIC_INTR_DC | CY_ADCMIC_INTR_DATA);

Cy_ADCMic_GetInterruptStatusMasked()

__STATIC_INLINE uint32_t Cy_ADCMic_GetInterruptStatusMasked

(

MXS40ADCMIC_Type const *

base

)

Returns the logical AND of the corresponding INTR and INTR_MASK fields in a single-load operation.

Parameters

base	The pointer to the hardware ADCMic block.

Returns

The masked interrupt status.

Function Usage

    /* Scenario: Configure and enable the ADCMic interrupt. */
    const cy_stc_sysint_t ADCMic_IRQ_cfg =
    {
        .intrSrc      = adcmic_interrupt_adcmic_IRQn, /* Interrupt source is the ADCMic interrupt */
        .intrPriority = 7UL                           /* Interrupt priority is 7 */
    };
    
    /* Configure the interrupt with vector at ADCMic_Isr(). */
    (void)Cy_SysInt_Init(&ADCMic_IRQ_cfg, ADCMic_Isr);

    /* Enable the interrupt. */
    NVIC_EnableIRQ(ADCMic_IRQ_cfg.intrSrc);
    
    /* Clear possible interrupt erroneously raised during block enabling */
    Cy_ADCMic_ClearInterrupt(MXS40ADCMIC0, CY_ADCMIC_INTR);
    Cy_ADCMic_EnableInterrupt(MXS40ADCMIC0, CY_ADCMIC_INTR_DATA);