Hardware Abstraction Layer (HAL)
CAT5 (AIROCâ„¢) Implementation Specific

General Description

This section provides details about the CAT5 (AIROCâ„¢) implementation of the Cypress HAL.

All information within this section is platform specific and is provided for reference. Portable application code should depend only on the APIs and types which are documented in the HAL Drivers section.

HAL Resource Hardware Mapping

The following table shows a mapping of each HAL driver to the lower level firmware driver and the corresponding hardware resource. This is intended to help understand how the HAL is implemented for CAT5 and what features the underlying hardware supports.

HAL Resource CAT5 Hardware
ADC ADCMic
Clock All clocks (system & peripheral)
Comparator LPComp
DMA DMA Controller
EZ-I2C SCB
GPIO GPIO
Hardware Manager NA
I2C SCB
I2S I2S
PDM/PCM PDM-PCM
PWM TCPWM
Quadrature Decoder TCPWM
RTC RTC
SPI SCB
SysPM System Power Resources
System System Resources
TDM I2S
Timer TCPWM
UART SCB
SDIO SDIOD

API Reference

 Clocks
 Implementation specific interface for using the Clock driver.
 
 DMA (Direct Memory Access)
 DMA allows transferring data without CPU intervention.
 
 HAL Driver Availability Macros
 
 CAT5 Specific Hardware Types
 Aliases for types which are part of the public HAL interface but whose representations need to vary per HAL implementation.
 
 Pins
 Definitions for the pinout for each supported device.
 
 RTC (Real-Time Clock)
 
 Syspm
 
 ADC (Analog Digital Converter)
 
 COMP (Analog Comparator)
 On CAT5, the comparator driver is used to control the x2 LPComp (Low Power Comparator) HW blocks.
 
 PDM/PCM (Pulse Density Modulation to Pulse Code Modulation Converter)
 The CAT5 PDM/PCM Supports the following conversion parameters:
 
 PWM (Pulse Width Modulator)
 
 QSPI (Quad Serial Peripheral Interface)
 
 QuadDec (Quadrature Decoder)
 
 SDIO (Secure Digital Input Output)
 The SDIO device HAL implemenation for CAT5 is available only for CYW955900 family of devices.
 
 SPI (Serial Peripheral Interface)