Clocks

General Description

Implementation specific interface for using the Clock driver.

These items, while usable within the HAL, are not necessarily portable between devices.

Code snippets

Note

Error handling code has been intentionally left out of snippets to highlight API usage.

Snippet: System initialization

The system clocks are initialized in the cybsp_init() function.

Note

CAT5 SCB System Clock Maximum frequency is 192MHz, maximum divider value is 128 and the maximum oversample value is 16. This limits the minimum supported UART baud rate to be 115200bps and the minimum supported SPI clock frequency to be 100KHz.

Variables
const cyhal_clock_t	CYHAL_CLOCK_PERI_SCB0
	PERI_SCB0 : Provides the clock for SCB0.
const cyhal_clock_t	CYHAL_CLOCK_PERI_SCB1
	PERI_SCB1 : Provides the clock for SCB1.
const cyhal_clock_t	CYHAL_CLOCK_PERI_SCB2
	PERI_SCB2 : Provides the clock for SCB2.
const cyhal_clock_t	CYHAL_CLOCK_PERI_TCPWM
	PERI_TCPWM : Provides the clock for TCPWM.
const cyhal_clock_t	CYHAL_CLOCK_TDM
	TDM : Provides the clock for TDM.
const cyhal_clock_t	CYHAL_CLOCK_ADCMIC
	ADCMIC : Provides the clock for ADCMIC.
const cyhal_clock_t	CYHAL_CLOCK_CPU
	CPU : Provides the clock for CPU.
const cyhal_resource_inst_t	CYHAL_CLOCK_RSC_PERI_SCB0
	PERI_SCB0 : Provides the clock for SCB0.
const cyhal_resource_inst_t	CYHAL_CLOCK_RSC_PERI_SCB1
	PERI_SCB1 : Provides the clock for SCB1.
const cyhal_resource_inst_t	CYHAL_CLOCK_RSC_PERI_SCB2
	PERI_SCB2 : Provides the clock for SCB2.
const cyhal_resource_inst_t	CYHAL_CLOCK_RSC_PERI_TCPWM
	PERI_TCPWM : Provides the clock for TCPWM.
const cyhal_resource_inst_t	CYHAL_CLOCK_RSC_TDM
	TDM : Provides the clock for TDM.
const cyhal_resource_inst_t	CYHAL_CLOCK_RSC_ADCMIC
	ADCMIC : Provides the clock for ADCMIC.
const cyhal_resource_inst_t	CYHAL_CLOCK_RSC_CPU
	CPU : Provides the clock for CPU.