General Description

Enumerations
enum	cy_en_autanalog_ctb_oa_pwr_t { CY_AUTANALOG_CTB_OA_PWR_OFF = 0UL , CY_AUTANALOG_CTB_OA_PWR_ULTRA_LOW = 1UL , CY_AUTANALOG_CTB_OA_PWR_ULTRA_LOW_RAIL = 2UL , CY_AUTANALOG_CTB_OA_PWR_LOW_RAIL = 4UL , CY_AUTANALOG_CTB_OA_PWR_MEDIUM_RAIL = 6UL , CY_AUTANALOG_CTB_OA_PWR_HIGH_RAIL = 8UL , CY_AUTANALOG_CTB_OA_PWR_ULTRA_HIGH_RAIL = 10UL }
	Configures the power mode and charge pump usage for each Opamp. More...

enum	cy_en_autanalog_ctb_oa_topo_t { CY_AUTANALOG_CTB_OA_TOPO_COMPARATOR = 0UL , CY_AUTANALOG_CTB_OA_TOPO_PGA = 1UL , CY_AUTANALOG_CTB_OA_TOPO_TIA = 2UL , CY_AUTANALOG_CTB_OA_TOPO_OPEN_LOOP_OPAMP = 3UL , CY_AUTANALOG_CTB_OA_TOPO_DIFF_AMPLIFIER = 4UL , CY_AUTANALOG_CTB_OA_TOPO_HYST_COMPARATOR = 5UL , CY_AUTANALOG_CTB_OA_TOPO_BUFFER = 6UL }
	Configures the predefined topology for the Opamps within the CTB (COMP (with/without hysteresis), PGA, TIA, Potentiostat, DiffAmp, Follower). More...

enum	cy_en_autanalog_ctb_comp_int_t { CY_AUTANALOG_CTB_COMP_INT_EDGE_DISABLED = 0UL , CY_AUTANALOG_CTB_COMP_INT_EDGE_RISING = 1UL , CY_AUTANALOG_CTB_COMP_INT_EDGE_FALLING = 2UL , CY_AUTANALOG_CTB_COMP_INT_EDGE_BOTH = 3UL }
	Configures the type of edge that triggers a comparator interrupt. More...

enum	cy_en_autanalog_ctb_oa_fb_cap_t { CY_AUTANALOG_CTB_OA_FB_CAP_0_pF = 0UL , CY_AUTANALOG_CTB_OA_FB_CAP_0_7_pF = 1UL , CY_AUTANALOG_CTB_OA_FB_CAP_1_4_pF = 2UL , CY_AUTANALOG_CTB_OA_FB_CAP_2_1_pF = 3UL , CY_AUTANALOG_CTB_OA_FB_CAP_2_8_pF = 4UL , CY_AUTANALOG_CTB_OA_FB_CAP_3_5_pF = 5UL , CY_AUTANALOG_CTB_OA_FB_CAP_4_2_pF = 6UL , CY_AUTANALOG_CTB_OA_FB_CAP_4_9_pF = 7UL , CY_AUTANALOG_CTB_OA_FB_CAP_5_6_pF = 8UL , CY_AUTANALOG_CTB_OA_FB_CAP_6_3_pF = 9UL , CY_AUTANALOG_CTB_OA_FB_CAP_7_0_pF = 10UL , CY_AUTANALOG_CTB_OA_FB_CAP_7_7_pF = 11UL , CY_AUTANALOG_CTB_OA_FB_CAP_8_4_pF = 12UL , CY_AUTANALOG_CTB_OA_FB_CAP_9_1_pF = 13UL , CY_AUTANALOG_CTB_OA_FB_CAP_9_8_pF = 14UL , CY_AUTANALOG_CTB_OA_FB_CAP_10_5_pF = 15UL }
	Configures the value of the feedback capacitor (Miller capacitance). More...

enum	cy_en_autanalog_ctb_oa_cc_cap_t { CY_AUTANALOG_CTB_OA_CC_CAP_0_1_pF = 0UL , CY_AUTANALOG_CTB_OA_CC_CAP_1_1_pF = 1UL , CY_AUTANALOG_CTB_OA_CC_CAP_2_1_pF = 2UL , CY_AUTANALOG_CTB_OA_CC_CAP_3_1_pF = 3UL , CY_AUTANALOG_CTB_OA_CC_CAP_4_1_pF = 4UL , CY_AUTANALOG_CTB_OA_CC_CAP_5_1_pF = 5UL , CY_AUTANALOG_CTB_OA_CC_CAP_6_1_pF = 6UL , CY_AUTANALOG_CTB_OA_CC_CAP_7_1_pF = 7UL , CY_AUTANALOG_CTB_OA_CC_CAP_DISABLED = 8UL }
	Configures the value of the compensation capacitor (CC). More...

enum	cy_en_autanalog_ctb_oa_ninv_pin_t { CY_AUTANALOG_CTB_OA_NINV_PIN_DISCONNECT = 0UL , CY_AUTANALOG_CTB_OA_NINV_PIN_OA0_P0_OA1_P5 = 1UL , CY_AUTANALOG_CTB_OA_NINV_PIN_OA0_P1_OA1_P4 = 2UL }
	Configures the direct connection of the non-inverting input of the Opamp to the external pin. More...

enum	cy_en_autanalog_ctb_oa_ninv_ref_t { CY_AUTANALOG_CTB_OA_NINV_REF_DISCONNECT = 0UL , CY_AUTANALOG_CTB_OA_NINV_REF_DAC0 = 1UL , CY_AUTANALOG_CTB_OA_NINV_REF_DAC1 = 2UL , CY_AUTANALOG_CTB_OA_NINV_REF_PRB_OUT0 = 3UL , CY_AUTANALOG_CTB_OA_NINV_REF_PRB_OUT1 = 4UL , CY_AUTANALOG_CTB_OA_NINV_REF_VBGR = 5UL , CY_AUTANALOG_CTB_OA_NINV_REF_CTB_OA0_OUT = 6UL , CY_AUTANALOG_CTB_OA_NINV_REF_CTB_OA1_OUT = 7UL }
	Configures the direct connection of the non-inverting input of the Opamp to the Vref. More...

enum	cy_en_autanalog_ctb_oa_inv_pin_t { CY_AUTANALOG_CTB_OA_INV_PIN_DISCONNECT = 0UL , CY_AUTANALOG_CTB_OA_INV_PIN_OA0_P0_OA1_P5 = 1UL , CY_AUTANALOG_CTB_OA_INV_PIN_OA0_P1_OA1_P4 = 2UL }
	Configures the direct connection of the inverting input of the Opamp to the external pin. More...

enum	cy_en_autanalog_ctb_oa_res_pin_t { CY_AUTANALOG_CTB_OA_RES_PIN_DISCONNECT = 0UL , CY_AUTANALOG_CTB_OA_RES_PIN_OA0_P0_OA1_P5 = 1UL , CY_AUTANALOG_CTB_OA_RES_PIN_OA0_P1_OA1_P4 = 2UL }
	Configures the direct connection of the bottom ends of the resistor ladders to the external pin. More...

enum	cy_en_autanalog_ctb_oa_res_ref_t { CY_AUTANALOG_CTB_OA_RES_REF_DISCONNECT = 0UL , CY_AUTANALOG_CTB_OA_RES_REF_DAC0 = 1UL , CY_AUTANALOG_CTB_OA_RES_REF_DAC1 = 2UL , CY_AUTANALOG_CTB_OA_RES_REF_CTB_OA0_OUT = 3UL , CY_AUTANALOG_CTB_OA_RES_REF_CTB_OA1_OUT = 4UL , CY_AUTANALOG_CTB_OA_RES_REF_VSSA = 5UL }
	Configures the direct connection of the bottom ends of the resistor ladders to the Vref. More...

enum	cy_en_autanalog_ctb_oa_mux_in_t { CY_AUTANALOG_CTB_OA_MUX_IN_DISCONNECT = 0UL , CY_AUTANALOG_CTB_OA_MUX_IN_P0 = 1UL , CY_AUTANALOG_CTB_OA_MUX_IN_P1 = 2UL , CY_AUTANALOG_CTB_OA_MUX_IN_P2 = 3UL , CY_AUTANALOG_CTB_OA_MUX_IN_P3 = 4UL , CY_AUTANALOG_CTB_OA_MUX_IN_P4 = 5UL , CY_AUTANALOG_CTB_OA_MUX_IN_P5 = 6UL , CY_AUTANALOG_CTB_OA_MUX_IN_P6 = 7UL , CY_AUTANALOG_CTB_OA_MUX_IN_P7 = 8UL }
	The CTB subsystem allows the pins to be connected directly to the internal analog bus using the input multiplexer for further routing. More...

enum	cy_en_autanalog_ctb_oa_mux_out_t { CY_AUTANALOG_CTB_OA_MUX_OUT_DISCONNECT = 0UL , CY_AUTANALOG_CTB_OA_MUX_OUT_NINV = 1UL , CY_AUTANALOG_CTB_OA_MUX_OUT_INV = 2UL , CY_AUTANALOG_CTB_OA_MUX_OUT_RES = 3UL }
	The CTB subsystem allows the Opamp inputs or the bottom end of the resistor ladder to be connected directly to the internal analog bus via the output multiplexer. More...

enum	cy_en_autanalog_stt_ctb_oa_gain_t { CY_AUTANALOG_STT_CTB_OA_GAIN_1_00 = 0UL , CY_AUTANALOG_STT_CTB_OA_GAIN_1_42 = 1UL , CY_AUTANALOG_STT_CTB_OA_GAIN_2_00 = 2UL , CY_AUTANALOG_STT_CTB_OA_GAIN_2_78 = 3UL , CY_AUTANALOG_STT_CTB_OA_GAIN_4_00 = 4UL , CY_AUTANALOG_STT_CTB_OA_GAIN_5_82 = 5UL , CY_AUTANALOG_STT_CTB_OA_GAIN_8_00 = 6UL , CY_AUTANALOG_STT_CTB_OA_GAIN_10_67 = 7UL , CY_AUTANALOG_STT_CTB_OA_GAIN_16_00 = 8UL , CY_AUTANALOG_STT_CTB_OA_GAIN_21_33 = 9UL , CY_AUTANALOG_STT_CTB_OA_GAIN_32_00 = 10UL }
	The set of the gain configurations for the Opamp in the CTB. More...

Enumeration Type Documentation

◆ cy_en_autanalog_ctb_oa_pwr_t

enum cy_en_autanalog_ctb_oa_pwr_t

Configures the power mode and charge pump usage for each Opamp.

Each power setting consumes different levels of current and supports a different input range and gain bandwidth. The charge pump is used to increase the input range to the rails. For more details, refer to the device Architecture Technical Reference Manual.

Enumerator
CY_AUTANALOG_CTB_OA_PWR_OFF	The Opamp powering is off.
CY_AUTANALOG_CTB_OA_PWR_ULTRA_LOW	The Opamp power mode is ULTRA LOW, the charge pump is OFF, the Opamp quiescent current is 15uA. If cy_stc_autanalog_ctb_dyn_t::outToPin: FALSE the gain bandwidth is 30kHz; If cy_stc_autanalog_ctb_dyn_t::outToPin: TRUE the gain bandwidth is 100kHz; and the drive capability of the Opamp output is 10uA;
CY_AUTANALOG_CTB_OA_PWR_ULTRA_LOW_RAIL	The Opamp power mode is ULTRA LOW, the charge pump is ON, the Opamp quiescent current is 35uA. If cy_stc_autanalog_ctb_dyn_t::outToPin: FALSE the gain bandwidth is 30kHz; If cy_stc_autanalog_ctb_dyn_t::outToPin: TRUE the gain bandwidth is 100kHz; and the drive capability of the Opamp output is 10uA;
CY_AUTANALOG_CTB_OA_PWR_LOW_RAIL	The Opamp power mode is LOW, the charge pump is ON, the Opamp quiescent current is 150uA. If cy_stc_autanalog_ctb_dyn_t::outToPin: FALSE the gain bandwidth is 350kHz; If cy_stc_autanalog_ctb_dyn_t::outToPin: TRUE the gain bandwidth is 1.2MHz; and the drive capability of the Opamp output is 100uA;
CY_AUTANALOG_CTB_OA_PWR_MEDIUM_RAIL	The Opamp power mode is MEDIUM, the charge pump is ON, the Opamp quiescent current is 200uA. If cy_stc_autanalog_ctb_dyn_t::outToPin: FALSE the gain bandwidth is 700kHz; If cy_stc_autanalog_ctb_dyn_t::outToPin: TRUE the gain bandwidth is 2.4MHz; and the drive capability of the Opamp output is 1mA;
CY_AUTANALOG_CTB_OA_PWR_HIGH_RAIL	The Opamp power mode is HIGH, the charge pump is ON, the Opamp quiescent current is 600uA. If cy_stc_autanalog_ctb_dyn_t::outToPin: FALSE the gain bandwidth is 1.75MHz; If cy_stc_autanalog_ctb_dyn_t::outToPin: TRUE the gain bandwidth is 6MHz; and the drive capability of the Opamp output is 1mA;
CY_AUTANALOG_CTB_OA_PWR_ULTRA_HIGH_RAIL	The Opamp power mode is ULTRA HIGH, the charge pump is ON, the Opamp quiescent current is 800uA. If cy_stc_autanalog_ctb_dyn_t::outToPin: FALSE the gain bandwidth is 2.8MHz; If cy_stc_autanalog_ctb_dyn_t::outToPin: TRUE the gain bandwidth is 7.5MHz; and the drive capability of the Opamp output is 10mA;

◆ cy_en_autanalog_ctb_oa_topo_t

enum cy_en_autanalog_ctb_oa_topo_t

Configures the predefined topology for the Opamps within the CTB (COMP (with/without hysteresis), PGA, TIA, Potentiostat, DiffAmp, Follower).

For more details, refer to the device Architecture Technical Reference Manual.

Enumerator
CY_AUTANALOG_CTB_OA_TOPO_COMPARATOR	The Opamp operational topology is Comparator without hysteresis.
CY_AUTANALOG_CTB_OA_TOPO_PGA	The Opamp operational topology is Programmable Gain Amplifier.
CY_AUTANALOG_CTB_OA_TOPO_TIA	The Opamp operational topology is Trans-impedance Amplifier.
CY_AUTANALOG_CTB_OA_TOPO_OPEN_LOOP_OPAMP	The Opamp operational topology is Opamp with open loop (cy_stc_autanalog_ctb_dyn_t::outToPin must be TRUE for this configuration)
CY_AUTANALOG_CTB_OA_TOPO_DIFF_AMPLIFIER	The Opamp operational topology is Differential Amplifier (requires the same configuration for both Opamps)
CY_AUTANALOG_CTB_OA_TOPO_HYST_COMPARATOR	The Opamp operational topology is Comparator with hysteresis. Note The hysteresis is not a constant and depends on cy_en_autanalog_ctb_oa_pwr_t ULTRA LOW: 80mV LOW: 40mV MEDIUM: 20mV HIGH: 10mV ULTRA HIGH: 4mV
CY_AUTANALOG_CTB_OA_TOPO_BUFFER	The Opamp operational topology is Voltage follower.

◆ cy_en_autanalog_ctb_comp_int_t

enum cy_en_autanalog_ctb_comp_int_t

Configures the type of edge that triggers a comparator interrupt.

Note: This setting applies only to the Opamp in Comparator mode.

Enumerator
CY_AUTANALOG_CTB_COMP_INT_EDGE_DISABLED	Disabled, no interrupts detected.
CY_AUTANALOG_CTB_COMP_INT_EDGE_RISING	Rising edge generates an interrupt.
CY_AUTANALOG_CTB_COMP_INT_EDGE_FALLING	Falling edge generates an interrupt.
CY_AUTANALOG_CTB_COMP_INT_EDGE_BOTH	Both edges generate an interrupt.

◆ cy_en_autanalog_ctb_oa_fb_cap_t

enum cy_en_autanalog_ctb_oa_fb_cap_t

Configures the value of the feedback capacitor (Miller capacitance).

The feedback capacitor (FB cap) is only used in the following configurations: PGA, TIA, Differential Amplifier (for the topologies 1, 2 or 4, in cy_en_autanalog_ctb_oa_topo_t) and for non-unity value of the Opamp gain (cy_en_autanalog_stt_ctb_oa_gain_t). Use the Autonomous Analog Configurator to define the actual capacitance value required for a particular configuration. For more details, refer to the device Architecture Technical Reference Manual.

Enumerator
CY_AUTANALOG_CTB_OA_FB_CAP_0_pF	The capacitor is NOT connected in the feedback loop.
CY_AUTANALOG_CTB_OA_FB_CAP_0_7_pF	The value of the feedback capacitor is 0.7 pF.
CY_AUTANALOG_CTB_OA_FB_CAP_1_4_pF	The value of the feedback capacitor is 1.4 pF.
CY_AUTANALOG_CTB_OA_FB_CAP_2_1_pF	The value of the feedback capacitor is 2.1 pF.
CY_AUTANALOG_CTB_OA_FB_CAP_2_8_pF	The value of the feedback capacitor is 2.8 pF.
CY_AUTANALOG_CTB_OA_FB_CAP_3_5_pF	The value of the feedback capacitor is 3.5 pF.
CY_AUTANALOG_CTB_OA_FB_CAP_4_2_pF	The value of the feedback capacitor is 4.2 pF.
CY_AUTANALOG_CTB_OA_FB_CAP_4_9_pF	The value of the feedback capacitor is 4.9 pF.
CY_AUTANALOG_CTB_OA_FB_CAP_5_6_pF	The value of the feedback capacitor is 5.6 pF.
CY_AUTANALOG_CTB_OA_FB_CAP_6_3_pF	The value of the feedback capacitor is 6.3 pF.
CY_AUTANALOG_CTB_OA_FB_CAP_7_0_pF	The value of the feedback capacitor is 7.0 pF.
CY_AUTANALOG_CTB_OA_FB_CAP_7_7_pF	The value of the feedback capacitor is 7.7 pF.
CY_AUTANALOG_CTB_OA_FB_CAP_8_4_pF	The value of the feedback capacitor is 8.4 pF.
CY_AUTANALOG_CTB_OA_FB_CAP_9_1_pF	The value of the feedback capacitor is 9.1 pF.
CY_AUTANALOG_CTB_OA_FB_CAP_9_8_pF	The value of the feedback capacitor is 9.8 pF.
CY_AUTANALOG_CTB_OA_FB_CAP_10_5_pF	The value of the feedback capacitor is 10.5 pF.

◆ cy_en_autanalog_ctb_oa_cc_cap_t

enum cy_en_autanalog_ctb_oa_cc_cap_t

Configures the value of the compensation capacitor (CC).

The compensation capacitance must be activated together with the capacitance in the feedback loop cy_en_autanalog_ctb_oa_fb_cap_t to optimize the stability of the Opamp. Use the Autonomous Analog Configurator to define the actual capacitance value required for particular configuration. For more details, refer to the device Architecture Technical Reference Manual.

Enumerator
CY_AUTANALOG_CTB_OA_CC_CAP_0_1_pF	The value of the compensation capacitor is 0.1 pF.
CY_AUTANALOG_CTB_OA_CC_CAP_1_1_pF	The value of the compensation capacitor is 1.1 pF.
CY_AUTANALOG_CTB_OA_CC_CAP_2_1_pF	The value of the compensation capacitor is 2.1 pF.
CY_AUTANALOG_CTB_OA_CC_CAP_3_1_pF	The value of the compensation capacitor is 3.1 pF.
CY_AUTANALOG_CTB_OA_CC_CAP_4_1_pF	The value of the compensation capacitor is 4.1 pF.
CY_AUTANALOG_CTB_OA_CC_CAP_5_1_pF	The value of the compensation capacitor is 5.1 pF.
CY_AUTANALOG_CTB_OA_CC_CAP_6_1_pF	The value of the compensation capacitor is 6.1 pF.
CY_AUTANALOG_CTB_OA_CC_CAP_7_1_pF	The value of the compensation capacitor is 7.1 pF.
CY_AUTANALOG_CTB_OA_CC_CAP_DISABLED	The compensation capacitor is NOT used.

◆ cy_en_autanalog_ctb_oa_ninv_pin_t

enum cy_en_autanalog_ctb_oa_ninv_pin_t

Configures the direct connection of the non-inverting input of the Opamp to the external pin.

The CTB subsystem allows the non-inverting input of the Opamp to be connected directly to the pin by means of the switch routing matrix. For more details, refer to the device Architecture Technical Reference Manual.

Enumerator
CY_AUTANALOG_CTB_OA_NINV_PIN_DISCONNECT	The non-inverting inputs of the Opamps are not connected to pin.
CY_AUTANALOG_CTB_OA_NINV_PIN_OA0_P0_OA1_P5	The non-inverting inputs of the Opamps OA0, OA1 are connected to P0 and P5 respectively.
CY_AUTANALOG_CTB_OA_NINV_PIN_OA0_P1_OA1_P4	The non-inverting inputs of the Opamps OA0, OA1 are connected to P1 and P4 respectively.

◆ cy_en_autanalog_ctb_oa_ninv_ref_t

enum cy_en_autanalog_ctb_oa_ninv_ref_t

Configures the direct connection of the non-inverting input of the Opamp to the Vref.

The CTB subsystem allows the non-inverting input of the Opamp to be connected directly to the selected reference voltage using the switch routing matrix. For more details, refer to the device Architecture Technical Reference Manual.

Enumerator
CY_AUTANALOG_CTB_OA_NINV_REF_DISCONNECT	The non-inverting input of the Opamp is not connected to Vref.
CY_AUTANALOG_CTB_OA_NINV_REF_DAC0	The non-inverting input is connected to VREF0 (from DAC0)
CY_AUTANALOG_CTB_OA_NINV_REF_DAC1	The non-inverting input is connected to VREF1 (from DAC1.
CY_AUTANALOG_CTB_OA_NINV_REF_PRB_OUT0	The non-inverting input is connected to VREF2 (from PRB0)
CY_AUTANALOG_CTB_OA_NINV_REF_PRB_OUT1	The non-inverting input is connected to VREF3 (from PRB1)
CY_AUTANALOG_CTB_OA_NINV_REF_VBGR	The non-inverting input is connected to VBGR.
CY_AUTANALOG_CTB_OA_NINV_REF_CTB_OA0_OUT	The non-inverting input is connected to the output of the adjacent CTB OA0. Note OA from another CTB
CY_AUTANALOG_CTB_OA_NINV_REF_CTB_OA1_OUT	The non-inverting input is connected to the output of the adjacent CTB OA1. Note OA from another CTB

◆ cy_en_autanalog_ctb_oa_inv_pin_t

enum cy_en_autanalog_ctb_oa_inv_pin_t

Configures the direct connection of the inverting input of the Opamp to the external pin.

The CTB subsystem allows the inverting input of the Opamp to be connected directly to the pin using the switch routing matrix. For more details, refer to the device Architecture Technical Reference Manual.

Enumerator
CY_AUTANALOG_CTB_OA_INV_PIN_DISCONNECT	The inverting inputs of the Opamps are not connected to pin.
CY_AUTANALOG_CTB_OA_INV_PIN_OA0_P0_OA1_P5	The inverting inputs of the Opamps OA0, OA1 are connected to P0 and P5 respectively.
CY_AUTANALOG_CTB_OA_INV_PIN_OA0_P1_OA1_P4	The inverting inputs of the Opamps OA0, OA1 are connected to P1 and P4 respectively.

◆ cy_en_autanalog_ctb_oa_res_pin_t

enum cy_en_autanalog_ctb_oa_res_pin_t

Configures the direct connection of the bottom ends of the resistor ladders to the external pin.

The CTB subsystem allows the bottom end of the resistor ladder in the Opamp to be connected directly to the pin using the switch routing matrix. For more details, refer to the device Architecture Technical Reference Manual.

Enumerator
CY_AUTANALOG_CTB_OA_RES_PIN_DISCONNECT	The bottom ends of the resistor ladders are not connected to the pin.
CY_AUTANALOG_CTB_OA_RES_PIN_OA0_P0_OA1_P5	The bottom ends of the resistor ladders of Opamps OA0, OA1 are connected to P0 and P5 respectively.
CY_AUTANALOG_CTB_OA_RES_PIN_OA0_P1_OA1_P4	The bottom ends of the resistor ladders of Opamps OA0, OA1 are connected to P1 and P4 respectively.

◆ cy_en_autanalog_ctb_oa_res_ref_t

enum cy_en_autanalog_ctb_oa_res_ref_t

Configures the direct connection of the bottom ends of the resistor ladders to the Vref.

The CTB subsystem allows the bottom end of the resistor ladder in the Opamp to be connected directly to the selected reference voltage using of the switch routing matrix. For more details, refer to the device Architecture Technical Reference Manual.

Enumerator
CY_AUTANALOG_CTB_OA_RES_REF_DISCONNECT	The bottom end of the resistor ladder is not connected to the voltage reference.
CY_AUTANALOG_CTB_OA_RES_REF_DAC0	The bottom end of the resistor ladder is connected to VREF0 (from DAC0)
CY_AUTANALOG_CTB_OA_RES_REF_DAC1	The bottom end of the resistor ladder is connected to VREF1 (from DAC1)
CY_AUTANALOG_CTB_OA_RES_REF_CTB_OA0_OUT	The bottom end of the resistor ladder is connected to the output of the adjacent CTB OA0. Note OA from another CTB
CY_AUTANALOG_CTB_OA_RES_REF_CTB_OA1_OUT	The bottom end of the resistor ladder is connected to the output of the adjacent CTB OA1. Note OA from another CTB
CY_AUTANALOG_CTB_OA_RES_REF_VSSA	The bottom end of the resistor ladder is connected to VSSA.

◆ cy_en_autanalog_ctb_oa_mux_in_t

enum cy_en_autanalog_ctb_oa_mux_in_t

The CTB subsystem allows the pins to be connected directly to the internal analog bus using the input multiplexer for further routing.

Must be used in conjunction with cy_en_autanalog_ctb_oa_mux_out_t. For more details, refer to the device Architecture Technical Reference Manual.

Enumerator
CY_AUTANALOG_CTB_OA_MUX_IN_DISCONNECT	The input multiplexer is disconnected.
CY_AUTANALOG_CTB_OA_MUX_IN_P0	Pin P0 is routed to the internal analog bus.
CY_AUTANALOG_CTB_OA_MUX_IN_P1	Pin P1 is routed to the internal analog bus.
CY_AUTANALOG_CTB_OA_MUX_IN_P2	Pin P2 is routed to the internal analog bus.
CY_AUTANALOG_CTB_OA_MUX_IN_P3	Pin P3 is routed to the internal analog bus.
CY_AUTANALOG_CTB_OA_MUX_IN_P4	Pin P4 is routed to the internal analog bus.
CY_AUTANALOG_CTB_OA_MUX_IN_P5	Pin P5 is routed to the internal analog bus.
CY_AUTANALOG_CTB_OA_MUX_IN_P6	Pin P6 is routed to the internal analog bus.
CY_AUTANALOG_CTB_OA_MUX_IN_P7	Pin P7 is routed to the internal analog bus.

◆ cy_en_autanalog_ctb_oa_mux_out_t

enum cy_en_autanalog_ctb_oa_mux_out_t

The CTB subsystem allows the Opamp inputs or the bottom end of the resistor ladder to be connected directly to the internal analog bus via the output multiplexer.

Must be used in conjunction with cy_en_autanalog_ctb_oa_mux_in_t. For more details, refer to the device Architecture Technical Reference Manual.

Enumerator
CY_AUTANALOG_CTB_OA_MUX_OUT_DISCONNECT	The output multiplexer is disconnected.
CY_AUTANALOG_CTB_OA_MUX_OUT_NINV	The internal analog bus is routed to the Opamps non-inverting input.
CY_AUTANALOG_CTB_OA_MUX_OUT_INV	The internal analog bus is routed to the Opamps inverting input.
CY_AUTANALOG_CTB_OA_MUX_OUT_RES	The internal analog bus is routed to the Opamps bottom end of the resistor ladder.

◆ cy_en_autanalog_stt_ctb_oa_gain_t

enum cy_en_autanalog_stt_ctb_oa_gain_t

The set of the gain configurations for the Opamp in the CTB.

The gain of the Opamp can be modified by the Autonomous Controller during operation, per settings in the State Transition Table, see cy_stc_autanalog_stt_t. For more details, refer to the device Architecture Technical Reference Manual.

Enumerator
CY_AUTANALOG_STT_CTB_OA_GAIN_1_00	The value of the gain is 1.00.
CY_AUTANALOG_STT_CTB_OA_GAIN_1_42	The value of the gain is 1.42.
CY_AUTANALOG_STT_CTB_OA_GAIN_2_00	The value of the gain is 2.00.
CY_AUTANALOG_STT_CTB_OA_GAIN_2_78	The value of the gain is 2.78.
CY_AUTANALOG_STT_CTB_OA_GAIN_4_00	The value of the gain is 4.00.
CY_AUTANALOG_STT_CTB_OA_GAIN_5_82	The value of the gain is 5.82.
CY_AUTANALOG_STT_CTB_OA_GAIN_8_00	The value of the gain is 8.00.
CY_AUTANALOG_STT_CTB_OA_GAIN_10_67	The value of the gain is 10.67.
CY_AUTANALOG_STT_CTB_OA_GAIN_16_00	The value of the gain is 16.00.
CY_AUTANALOG_STT_CTB_OA_GAIN_21_33	The value of the gain is 21.33.
CY_AUTANALOG_STT_CTB_OA_GAIN_32_00	The value of the gain is 32.00.