This driver provides API functions to configure the CTB subsystem of the Autonomous Analog.
The CTB block provides operational amplifiers (Opamps) for use in continuous-time signal chains. Each CTB includes two identical Opamps marked OA0 and OA1, a switch matrix for input/output routing, and the resistor ladder for each Opamp gain setting.
For more information on the CTB, refer to the device Architecture Technical Reference Manual (TRM).
For the exact location of the pins, see the device datasheet.
The static configuration contains application-specific settings intended to remain static for any Opamp application. The Autonomous Controller (AC) will NOT change the static configuration during operation.
The dynamic configuration structure includes the Opamp settings, which can be modified by the Autonomous Controller (AC) during operation.
The Autonomous Controller is able to modify the following characteristics of the CTB in runtime per settings provided in the State Transition Table:
The input range of the Opamp can be rail-to-rail if the charge pump is enabled. Without the charge pump, the input range is 0 V to VDDA - 1.5 V. The output range of the Opamp is typically 0.2 V to VDDA - 1.0 V and will depend on the load. See the device datasheet for more details.
The Opamp stability is affected by the phase delay caused by the resistance in the Opmap feedback and parasitic capacitance at the Opamp input. Therefore, a 4-bit programmable compensation capacitor block is added in parallel with the resistor in the Opmap feedback to optimize the stability of the Opamp performance. For the configuration settings, see cy_en_autanalog_ctb_oa_fb_cap_t and cy_en_autanalog_ctb_oa_cc_cap_t.
{
};
{
{
.outToPin = true,
},
{
.outToPin = false,
},
};
{
.ctbDynCfgNum = sizeof(ctb0DynamicCfgPGA) / sizeof(ctb0DynamicCfgPGA[0U]),
.ctbDynCfgArr = ctb0DynamicCfgPGA,
};
{
{
.enableOpamp0 = true,
.cfgOpamp0 = OPAMP0IDX,
.enableOpamp1 = true,
.cfgOpamp1 = OPAMP1IDX,
},
};
cy_stc_autanalog_ctb_sta_t * ctbStaCfg
The pointer to a static part of the CTB configuration.
Definition: cy_autanalog_ctb.h:679
bool unlock
CTB Unlock FALSE - Locked: Data from fields enableOpampX, cfgOpampX, gainOpampX will NOT be taken in...
Definition: cy_autanalog_ctb.h:694
cy_en_autanalog_ctb_oa_ninv_pin_t ninvInpPin
Connection of the non-inverting input of the Opamp to pin.
Definition: cy_autanalog_ctb.h:659
cy_en_autanalog_ctb_oa_pwr_t pwrOpamp0
The Power mode for the Opamp0.
Definition: cy_autanalog_ctb.h:638
Defines the dynamic configuration structure, see Dynamic Configuration and State Transition Table.
Definition: cy_autanalog_ctb.h:658
Defines the static configuration structure, see Static Configuration.
Definition: cy_autanalog_ctb.h:637
The configuration structure to set up the entire CTB based on static and dynamic configurations.
Definition: cy_autanalog_ctb.h:677
The CTB section in the State Transition Table state.
Definition: cy_autanalog_ctb.h:693
@ CY_AUTANALOG_CTB_OA_PWR_ULTRA_LOW_RAIL
The Opamp power mode is ULTRA LOW, the charge pump is ON, the Opamp quiescent current is 35uA.
Definition: cy_autanalog_ctb.h:325
@ CY_AUTANALOG_CTB_OA_NINV_PIN_DISCONNECT
The non-inverting inputs of the Opamps are not connected to pin.
Definition: cy_autanalog_ctb.h:472
@ CY_AUTANALOG_CTB_OA_NINV_PIN_OA0_P0_OA1_P5
The non-inverting inputs of the Opamps OA0, OA1 are connected to P0 and P5 respectively.
Definition: cy_autanalog_ctb.h:473
@ CY_AUTANALOG_CTB_OA_RES_PIN_OA0_P1_OA1_P4
The bottom ends of the resistor ladders of Opamps OA0, OA1 are connected to P1 and P4 respectively.
Definition: cy_autanalog_ctb.h:530
@ CY_AUTANALOG_CTB_OA_RES_PIN_DISCONNECT
The bottom ends of the resistor ladders are not connected to the pin.
Definition: cy_autanalog_ctb.h:527
@ CY_AUTANALOG_CTB_OA_MUX_IN_DISCONNECT
The input multiplexer is disconnected.
Definition: cy_autanalog_ctb.h:568
@ CY_AUTANALOG_CTB_COMP_INT_EDGE_DISABLED
Disabled, no interrupts detected.
Definition: cy_autanalog_ctb.h:403
@ CY_AUTANALOG_CTB_COMP_INT_EDGE_BOTH
Both edges generate an interrupt.
Definition: cy_autanalog_ctb.h:406
@ CY_AUTANALOG_CTB_OA_FB_CAP_0_pF
The capacitor is NOT connected in the feedback loop.
Definition: cy_autanalog_ctb.h:422
@ CY_AUTANALOG_CTB_OA_FB_CAP_3_5_pF
The value of the feedback capacitor is 3.5 pF.
Definition: cy_autanalog_ctb.h:427
@ CY_AUTANALOG_CTB_OA_CC_CAP_2_1_pF
The value of the compensation capacitor is 2.1 pF.
Definition: cy_autanalog_ctb.h:453
@ CY_AUTANALOG_CTB_OA_CC_CAP_0_1_pF
The value of the compensation capacitor is 0.1 pF.
Definition: cy_autanalog_ctb.h:451
@ CY_AUTANALOG_CTB_OA_TOPO_PGA
The Opamp operational topology is Programmable Gain Amplifier.
Definition: cy_autanalog_ctb.h:377
@ CY_AUTANALOG_CTB_OA_TOPO_HYST_COMPARATOR
The Opamp operational topology is Comparator with hysteresis.
Definition: cy_autanalog_ctb.h:384
@ CY_AUTANALOG_CTB_OA_NINV_REF_DISCONNECT
The non-inverting input of the Opamp is not connected to Vref.
Definition: cy_autanalog_ctb.h:488
@ CY_AUTANALOG_CTB_OA_NINV_REF_PRB_OUT0
The non-inverting input is connected to VREF2 (from PRB0)
Definition: cy_autanalog_ctb.h:491
@ CY_AUTANALOG_STT_CTB_OA_GAIN_1_00
The value of the gain is 1.00.
Definition: cy_autanalog_ctb.h:607
@ CY_AUTANALOG_STT_CTB_OA_GAIN_16_00
The value of the gain is 16.00.
Definition: cy_autanalog_ctb.h:615
@ CY_AUTANALOG_CTB_OA_INV_PIN_DISCONNECT
The inverting inputs of the Opamps are not connected to pin.
Definition: cy_autanalog_ctb.h:509
@ CY_AUTANALOG_CTB_OA_INV_PIN_OA0_P1_OA1_P4
The inverting inputs of the Opamps OA0, OA1 are connected to P1 and P4 respectively.
Definition: cy_autanalog_ctb.h:513
@ CY_AUTANALOG_CTB_OA_MUX_OUT_DISCONNECT
The output multiplexer is disconnected.
Definition: cy_autanalog_ctb.h:589
@ CY_AUTANALOG_CTB_OA_RES_REF_DISCONNECT
The bottom end of the resistor ladder is not connected to the voltage reference.
Definition: cy_autanalog_ctb.h:543
{
};
{
{
.outToPin = true,
},
{
.outToPin = true,
},
};
{
.ctbDynCfgNum = sizeof(ctb1DynamicCfgPGA) / sizeof(ctb1DynamicCfgPGA[0U]),
.ctbDynCfgArr = ctb1DynamicCfgPGA,
};
{
{
.enableOpamp0 = true,
.cfgOpamp0 = OPAMP0IDX,
.enableOpamp1 = true,
.cfgOpamp1 = OPAMP1IDX,
},
};
@ CY_AUTANALOG_CTB_OA_PWR_ULTRA_LOW
The Opamp power mode is ULTRA LOW, the charge pump is OFF, the Opamp quiescent current is 15uA.
Definition: cy_autanalog_ctb.h:317
@ CY_AUTANALOG_CTB_OA_FB_CAP_7_7_pF
The value of the feedback capacitor is 7.7 pF.
Definition: cy_autanalog_ctb.h:433
@ CY_AUTANALOG_CTB_OA_CC_CAP_1_1_pF
The value of the compensation capacitor is 1.1 pF.
Definition: cy_autanalog_ctb.h:452
@ CY_AUTANALOG_CTB_OA_CC_CAP_5_1_pF
The value of the compensation capacitor is 5.1 pF.
Definition: cy_autanalog_ctb.h:456
@ CY_AUTANALOG_CTB_OA_TOPO_BUFFER
The Opamp operational topology is Voltage follower.
Definition: cy_autanalog_ctb.h:392
@ CY_AUTANALOG_STT_CTB_OA_GAIN_8_00
The value of the gain is 8.00.
Definition: cy_autanalog_ctb.h:613
@ CY_AUTANALOG_CTB_OA_RES_REF_VSSA
The bottom end of the resistor ladder is connected to VSSA.
Definition: cy_autanalog_ctb.h:555