Data Structures | |
struct | XMC_SCU_CLOCK_CONFIG_t |
struct | XMC_SCU_CLOCK_SYSPLL_CONFIG_t |
Macros | |
#define | XMC_SCU_INTERRUPT_EVENT_DLR_OVERRUN SCU_INTERRUPT_SRSTAT_DLROVR_Msk |
#define | XMC_SCU_INTERRUPT_EVENT_HDCLR_UPDATED SCU_INTERRUPT_SRSTAT_HDCLR_Msk |
#define | XMC_SCU_INTERRUPT_EVENT_HDCR_UPDATED SCU_INTERRUPT_SRSTAT_HDCR_Msk |
#define | XMC_SCU_INTERRUPT_EVENT_HDSET_UPDATED SCU_INTERRUPT_SRSTAT_HDSET_Msk |
#define | XMC_SCU_INTERRUPT_EVENT_OSCSICTRL_UPDATED SCU_INTERRUPT_SRSTAT_OSCSICTRL_Msk |
#define | XMC_SCU_INTERRUPT_EVENT_OSCULCTRL_UPDATED SCU_INTERRUPT_SRSTAT_OSCULCTRL_Msk |
#define | XMC_SCU_INTERRUPT_EVENT_RMX_UPDATED SCU_INTERRUPT_SRSTAT_RMX_Msk |
#define | XMC_SCU_INTERRUPT_EVENT_RTC_ALARM SCU_INTERRUPT_SRSTAT_AI_Msk |
#define | XMC_SCU_INTERRUPT_EVENT_RTC_PERIODIC SCU_INTERRUPT_SRSTAT_PI_Msk |
#define | XMC_SCU_INTERRUPT_EVENT_RTCATIM0_UPDATED SCU_INTERRUPT_SRSTAT_RTC_ATIM0_Msk |
#define | XMC_SCU_INTERRUPT_EVENT_RTCATIM1_UPDATED SCU_INTERRUPT_SRSTAT_RTC_ATIM1_Msk |
#define | XMC_SCU_INTERRUPT_EVENT_RTCCTR_UPDATED SCU_INTERRUPT_SRSTAT_RTC_CTR_Msk |
#define | XMC_SCU_INTERRUPT_EVENT_RTCTIM0_UPDATED SCU_INTERRUPT_SRSTAT_RTC_TIM0_Msk |
#define | XMC_SCU_INTERRUPT_EVENT_RTCTIM1_UPDATED SCU_INTERRUPT_SRSTAT_RTC_TIM1_Msk |
#define | XMC_SCU_INTERRUPT_EVENT_WDT_WARN SCU_INTERRUPT_SRSTAT_PRWARN_Msk |
Typedefs | |
typedef void(* | XMC_SCU_INTERRUPT_EVENT_HANDLER_t) (void) |
typedef uint32_t | XMC_SCU_INTERRUPT_EVENT_t |
System control unit is the SoC power, reset and a clock manager with additional responsibility of providing system stability protection and other auxiliary functions.
SCU provides the following features,
The SCU driver is divided in to clock control logic, reset control logic, system interrupt control logic , hibernate control logic, trap control logic, parity control logic and miscellaneous control logic.
Clock driver features:
Reset driver features:
Interrupt driver features:
Hibernate driver features:
Trap driver features:
Parity driver features:
Power driver features:
Miscellaneous features:
#define XMC_SCU_INTERRUPT_EVENT_DLR_OVERRUN SCU_INTERRUPT_SRSTAT_DLROVR_Msk |
DLR overrun event.
#define XMC_SCU_INTERRUPT_EVENT_HDCLR_UPDATED SCU_INTERRUPT_SRSTAT_HDCLR_Msk |
HIB HDCLR register update event.
#define XMC_SCU_INTERRUPT_EVENT_HDCR_UPDATED SCU_INTERRUPT_SRSTAT_HDCR_Msk |
HIB HDCR register update event.
#define XMC_SCU_INTERRUPT_EVENT_HDSET_UPDATED SCU_INTERRUPT_SRSTAT_HDSET_Msk |
HIB HDSET register update event.
#define XMC_SCU_INTERRUPT_EVENT_OSCSICTRL_UPDATED SCU_INTERRUPT_SRSTAT_OSCSICTRL_Msk |
HIB OSCSICTRL register update event.
#define XMC_SCU_INTERRUPT_EVENT_OSCULCTRL_UPDATED SCU_INTERRUPT_SRSTAT_OSCULCTRL_Msk |
HIB OSCULCTRL register update event.
#define XMC_SCU_INTERRUPT_EVENT_RMX_UPDATED SCU_INTERRUPT_SRSTAT_RMX_Msk |
HIB RMX register update event.
#define XMC_SCU_INTERRUPT_EVENT_RTC_ALARM SCU_INTERRUPT_SRSTAT_AI_Msk |
RTC alarm event.
#define XMC_SCU_INTERRUPT_EVENT_RTC_PERIODIC SCU_INTERRUPT_SRSTAT_PI_Msk |
RTC periodic interrupt.
#define XMC_SCU_INTERRUPT_EVENT_RTCATIM0_UPDATED SCU_INTERRUPT_SRSTAT_RTC_ATIM0_Msk |
HIB RTCATIM0 register update event.
#define XMC_SCU_INTERRUPT_EVENT_RTCATIM1_UPDATED SCU_INTERRUPT_SRSTAT_RTC_ATIM1_Msk |
HIB RTCATIM1 register update event.
#define XMC_SCU_INTERRUPT_EVENT_RTCCTR_UPDATED SCU_INTERRUPT_SRSTAT_RTC_CTR_Msk |
HIB RTCCTR register update event.
#define XMC_SCU_INTERRUPT_EVENT_RTCTIM0_UPDATED SCU_INTERRUPT_SRSTAT_RTC_TIM0_Msk |
HIB TIM0 register update event.
#define XMC_SCU_INTERRUPT_EVENT_RTCTIM1_UPDATED SCU_INTERRUPT_SRSTAT_RTC_TIM1_Msk |
HIB TIM1 register update event.
#define XMC_SCU_INTERRUPT_EVENT_WDT_WARN SCU_INTERRUPT_SRSTAT_PRWARN_Msk |
Watchdog prewarning event.
typedef void(* XMC_SCU_INTERRUPT_EVENT_HANDLER_t) (void) |
Function pointer type used for registering callback functions on SCU event occurrence.
typedef uint32_t XMC_SCU_INTERRUPT_EVENT_t |
Defines enumerations for events which can lead to interrupt. These enumeration values represent the status of one of the bits in SRSTAT register. Use type XMC_SCU_INTERRUPT_EVENT_t for accessing these enum parameters.
enum XMC_SCU_BOOTMODE_t |
Defines options for selecting device boot mode. These enums are used to configure SWCON bits of STCON register. User can choose among various boot modes by configuring SWCON bits. Use type XMC_SCU_BOOTMODE_t for accessing these enum parameters.
Defines Capture/Compare unit timer slice trigger, that enables synchronous start function available on the SCU, CCUCON register. Use type XMC_SCU_CCU_TRIGGER_t for accessing these enum parameters.
Enumerator | |
---|---|
XMC_SCU_CCU_TRIGGER_CCU40 | Trigger mask used for Global Start Control of CCU40 peripheral. |
XMC_SCU_CCU_TRIGGER_CCU80 | Trigger mask used for Global Start Control of CCU80 peripheral. |
Defines the source of the system clock and peripherals clock gating in DEEPSLEEP state. In addition the state of FLASH, PLL and PLLVCO during DEEPSLEEP state. Use this enum as parameter of XMC_SCU_CLOCK_SetDeepSleepConfig before going to DEEPSLEEP state.
The DEEPSLEEP state of the system corresponds to the DEEPSLEEP state of the CPU. The state is entered via WFI or WFE instruction of the CPU. In this state the clock to the CPU is stopped.
In Deep Sleep state the OSC_HP and the PLL may be switched off. The wake-up logic in the NVIC is still clocked by a free-running clock. Peripherals are only clocked when configured to stay enabled. Configuration of peripherals and any SRAM content is preserved. The Flash module can be put into low-power mode to achieve a further power reduction. On wake-up Flash module will be restarted again before instructions or data access is possible. Any interrupt will bring the system back to operation via the NVIC.The clock setup before entering Deep Sleep state is restored upon wake-up.
Defines options for selecting the source of external clock out (fEXT). These enums are used to configure ECKSEL bits of EXTCLKCR register. User can choose either fSYS or fPLL or fUSBPLL clock as a source for external clock out (fEXT). Use type XMC_SCU_CLOCK_EXTOUTCLKSRC_t for accessing these enum parameters.
Defines options for backup clock trimming. These enums are used to configure AOTREN FOTR bits of PLLCON0 register. Use type XMC_SCU_CLOCK_BACKUP_TRIM_t for accessing these enum parameters.
Defines the source of the system clock and peripherals clock gating in SLEEP state. Use this enum as parameter of XMC_SCU_CLOCK_SetSleepConfig before going to SLEEP state.
The SLEEP state of the system corresponds to the SLEEP state of the CPU. The state is entered via WFI or WFE instruction of the CPU. In this state the clock to the CPU is stopped. Peripherals are only clocked when configured to stay enabled.
Peripherals can continue to operate unaffected and eventually generate an event to wake-up the CPU. Any interrupt to the NVIC will bring the CPU back to operation. The clock tree upon exit from SLEEP state is restored to what it was before entry into SLEEP state.
Defines options for system clock (fSYS) source. These enums are used to configure SYSSEL bits of SYSCLKCR Clock Control Register. Use type XMC_SCU_CLOCK_SYSCLKSRC_t for accessing these enum parameters.
Enumerator | |
---|---|
XMC_SCU_CLOCK_SYSCLKSRC_OFI | Internal Fast Clock (fOFI) as a source for system clock (fSYS). |
XMC_SCU_CLOCK_SYSCLKSRC_PLL | PLL output (fPLL) as a source for system clock (fSYS). |
Defines various PLL modes of operation. These enums are used to configure VCOBYP bit of PLLCON0 register. User can choose either normal or prescalar mode by configuring VCOBYP bit. Use type XMC_SCU_PLL_MODE_t for accessing these enum parameters.
Defines options for selecting the P-Divider input frequency. These enums are used to configure PINSEL bits of PLLCON2 register. Use type XMC_SCU_CLOCK_OSCCLKSRC_t for accessing these enum parameters.
Enumerator | |
---|---|
XMC_SCU_CLOCK_SYSPLLCLKSRC_OSCHP | External crystal oscillator (fOHP) as the source for P-Divider. |
XMC_SCU_CLOCK_SYSPLLCLKSRC_OFI | Backup clock(fOFI) as the source for P-Divider. |
enum XMC_SCU_CLOCK_t |
Defines enumerations for disabling the clocks sources of peripherals. Disabling of the peripheral clock is configured via the CLKCLR registers. Use type XMC_SCU_PERIPHERAL_CLOCK_t for accessing these enum parameters.
Defines options for selecting the USB clock source(fUSB/fSDMMC). These enums are used to configure USBSEL bits of USBCLKCR register. User can choose either fPLL or fUSBPLL clock as a source for USB clock. Use type XMC_SCU_CLOCK_USBCLKSRC_t for accessing these enum parameters.
Enumerator | |
---|---|
XMC_SCU_CLOCK_USBCLKSRC_USBPLL | USB PLL(fUSB PLL) as a source for USB clock (fUSB/fSDMMC). |
XMC_SCU_CLOCK_USBCLKSRC_SYSPLL | Main PLL output (fPLL) as a source for USB clock (fUSB/fSDMMC). |
Defines options for selecting the source of WDT clock(fWDT). These enums are used to configure WDTSEL bits of WDTCLKCR register. User can choose either fOFI or fPLL or fSTDBY clock as a source for WDT clock. Use type XMC_SCU_CLOCK_USBCLKSRC_t for accessing these enum parameters.
enum XMC_SCU_HIB_EVENT_t |
Hibernate domain event status
enum XMC_SCU_HIB_IO_t |
Hibernate domain dedicated pins
HIB LPAC input selection
HIB LPAC status
HIB LPAC start trigger selection for selected inputs
HIB_IOx pin I/O control
Defines options for selecting the source of RTC Clock (fRTC). These enums are used to configure RCS bit of HDCR register. User can choose either fOSI or fULP clock as a source for RTC Clock (fRTC). Use type XMC_SCU_HIB_RTCCLKSRC_t for accessing these enum parameters.
Enumerator | |
---|---|
XMC_SCU_HIB_RTCCLKSRC_OSI | Internal Slow Clock (fOSI) as the source for RTC Clock (fRTC). |
XMC_SCU_HIB_RTCCLKSRC_ULP | Ultra Low Power Clock (fULP) as the source for RTC Clock (fRTC). |
Selects input signal HIB_SR0 of ERU0
Defines options for selecting the source of Standby Clock (fSTDBY). These enums are used to configure STDBYSEL bit of HDCR register. User can choose either fOSI or fULP clock as a source for Standby Clock (fSTDBY). Use type XMC_SCU_HIB_STDBYCLKSRC_t for accessing these enum parameters.
enum XMC_SCU_NMIREQ_t |
Defines enumeration for the events that can generate non maskable interrupt(NMI). The NMI generation can be enabled with NMIREQEN register. The event will be reflected in SRSTAT or will be mirrored in the TRAPSTAT register. These enums can be used to configure NMI request generation bits of NMIREQEN register. Once configured, these events can generate non maskable interrupt. All the enum items are tabulated as per bits present in NMIREQEN register. Use type XMC_SCU_NMIREQ_t for accessing these enum parameters.
enum XMC_SCU_PARITY_t |
Defines enumerations for different parity event generating modules that in turn generate a trap. Parity can be enabled with PETE register in order to get the trap flag reflected in TRAPRAW register. These enums are used to configure parity error trap generation mechanism bits of PETE register. All the enum items are tabulated as per bits present in PETE register. Use type XMC_SCU_PARITY_t for accessing these enum parameters.
Defines enumeration for peripherals that support clock gating. The enumerations can be used for gating or ungating the peripheral clocks. All the enum items are tabulated as per bits present in CGATSTAT0 register. Use type XMC_SCU_PERIPHERAL_CLOCK_t for accessing these enum parameters.
Defines enumeration representing different peripheral reset bits in the PRSTAT registers. All the enum items are tabulated as per bits present in PRSTAT0, PRSTAT1, PRSTAT2, PRSTAT3 registers. Use type XMC_SCU_PERIPHERAL_RESET_t for accessing these enum parameters. Note: Release of reset should be prevented when the peripheral clock is gated in cases where kernel clock and bus interface clocks are shared, in order to avoid system hang-up.
enum XMC_SCU_POWER_MODE_t |
Defines the different causes for last reset. The cause of the last reset gets automatically stored in the SCU_RSTSTAT register and can be checked by user software to determine the state of the system and for debuggging purpose. All the enum items are tabulated as per bits present in SCU_RSTSTAT register. Use type XMC_SCU_RESET_REASON_t for accessing these enum parameters.
enum XMC_SCU_STATUS_t |
Defines the status of SCU API execution, used to verify the SCU related API calls.
enum XMC_SCU_TRAP_t |
Defines enumerations representing the status of trap cause. The cause of the trap gets automatically stored in the TRAPSTAT register and can be checked by user software to determine the state of the system and for debug purpose. Use type XMC_SCU_TRAP_t for accessing these enum parameters.
void XMC_SCU_CalibrateTemperatureSensor | ( | uint32_t | offset, |
uint32_t | gain | ||
) |
offset | Offset value for calibrating the DTS result. Range: 0 to 127. |
gain | Gain value for calibrating the DTS conversion result. Range: 0 to 63. |
void XMC_SCU_CLOCK_DisableClock | ( | const XMC_SCU_CLOCK_t | clock | ) |
clock | Peripheral for which the clock has to be disabled. Range: Use type XMC_SCU_CLOCK_t to select the peripheral. |
void XMC_SCU_CLOCK_DisableHighPerformanceOscillator | ( | void | ) |
void XMC_SCU_CLOCK_DisableHighPerformanceOscillatorGeneralPurposeInput | ( | void | ) |
void XMC_SCU_CLOCK_DisableLowPowerOscillator | ( | void | ) |
void XMC_SCU_CLOCK_DisableLowPowerOscillatorGeneralPurposeInput | ( | void | ) |
void XMC_SCU_CLOCK_DisableSystemPll | ( | void | ) |
void XMC_SCU_CLOCK_DisableUsbPll | ( | void | ) |
void XMC_SCU_CLOCK_EnableClock | ( | const XMC_SCU_CLOCK_t | clock | ) |
clock | Peripheral for which the clock has to be enabled. Range: Use type XMC_SCU_CLOCK_t to select the peripheral. |
void XMC_SCU_CLOCK_EnableHighPerformanceOscillator | ( | void | ) |
void XMC_SCU_CLOCK_EnableHighPerformanceOscillatorGeneralPurposeInput | ( | void | ) |
void XMC_SCU_CLOCK_EnableLowPowerOscillator | ( | void | ) |
void XMC_SCU_CLOCK_EnableLowPowerOscillatorGeneralPurposeInput | ( | void | ) |
void XMC_SCU_CLOCK_EnableSystemPll | ( | void | ) |
void XMC_SCU_CLOCK_EnableUsbPll | ( | void | ) |
void XMC_SCU_CLOCK_GatePeripheralClock | ( | const XMC_SCU_PERIPHERAL_CLOCK_t | peripheral | ) |
peripheral | The peripheral for which the clock has to be gated. Range: Use type XMC_SCU_PERIPHERAL_CLOCK_t to identify the peripheral clock to be gated. |
Note: Clock gating shall not be activated unless the module is in reset state. So use XMC_SCU_CLOCK_IsPeripheralClockGated() API before enabling the gating of any peripheral.
uint32_t XMC_SCU_CLOCK_GetCcuClockDivider | ( | void | ) |
uint32_t XMC_SCU_CLOCK_GetCcuClockFrequency | ( | void | ) |
uint32_t XMC_SCU_CLOCK_GetCpuClockDivider | ( | void | ) |
uint32_t XMC_SCU_CLOCK_GetCpuClockFrequency | ( | void | ) |
uint32_t XMC_SCU_CLOCK_GetEbuClockDivider | ( | void | ) |
uint32_t XMC_SCU_CLOCK_GetEbuClockFrequency | ( | void | ) |
uint32_t XMC_SCU_CLOCK_GetECATClockDivider | ( | void | ) |
uint32_t XMC_SCU_CLOCK_GetECATClockFrequency | ( | void | ) |
XMC_SCU_CLOCK_ECATCLKSRC_t XMC_SCU_CLOCK_GetECATClockSource | ( | void | ) |
uint32_t XMC_SCU_CLOCK_GetEthernetClockFrequency | ( | void | ) |
uint32_t XMC_SCU_CLOCK_GetExternalOutputClockDivider | ( | void | ) |
uint32_t XMC_SCU_CLOCK_GetExternalOutputClockFrequency | ( | void | ) |
XMC_SCU_CLOCK_EXTOUTCLKSRC_t XMC_SCU_CLOCK_GetExternalOutputClockSource | ( | void | ) |
uint32_t XMC_SCU_CLOCK_GetHighPerformanceOscillatorGeneralPurposeInputStatus | ( | void | ) |
uint32_t XMC_SCU_CLOCK_GetLowPowerOscillatorGeneralPurposeInputStatus | ( | void | ) |
uint32_t XMC_SCU_CLOCK_GetPeripheralClockDivider | ( | void | ) |
uint32_t XMC_SCU_CLOCK_GetPeripheralClockFrequency | ( | void | ) |
uint32_t XMC_SCU_CLOCK_GetSystemClockDivider | ( | void | ) |
uint32_t XMC_SCU_CLOCK_GetSystemClockFrequency | ( | void | ) |
XMC_SCU_CLOCK_SYSCLKSRC_t XMC_SCU_CLOCK_GetSystemClockSource | ( | void | ) |
uint32_t XMC_SCU_CLOCK_GetSystemPllClockFrequency | ( | void | ) |
XMC_SCU_CLOCK_SYSPLLCLKSRC_t XMC_SCU_CLOCK_GetSystemPllClockSource | ( | void | ) |
uint32_t XMC_SCU_CLOCK_GetSystemPllClockSourceFrequency | ( | void | ) |
uint32_t XMC_SCU_CLOCK_GetUsbClockDivider | ( | void | ) |
uint32_t XMC_SCU_CLOCK_GetUsbClockFrequency | ( | void | ) |
XMC_SCU_CLOCK_USBCLKSRC_t XMC_SCU_CLOCK_GetUsbClockSource | ( | void | ) |
uint32_t XMC_SCU_CLOCK_GetUsbPllClockFrequency | ( | void | ) |
uint32_t XMC_SCU_CLOCK_GetWdtClockDivider | ( | void | ) |
uint32_t XMC_SCU_CLOCK_GetWdtClockFrequency | ( | void | ) |
XMC_SCU_CLOCK_WDTCLKSRC_t XMC_SCU_CLOCK_GetWdtClockSource | ( | void | ) |
void XMC_SCU_CLOCK_Init | ( | const XMC_SCU_CLOCK_CONFIG_t *const | config | ) |
config | Pointer to structure holding the clock prescaler values and divider values for configuring clock generators and clock tree. Range: Configure the members of structure XMC_SCU_CLOCK_CONFIG_t for various parameters of clock setup. |
bool XMC_SCU_CLOCK_IsClockEnabled | ( | const XMC_SCU_CLOCK_t | clock | ) |
clock | Peripheral for which the clock status has to be checked. Range: Use type XMC_SCU_CLOCK_t to select the peripheral. |
bool XMC_SCU_CLOCK_IsHighPerformanceOscillatorStable | ( | void | ) |
bool XMC_SCU_CLOCK_IsLowPowerOscillatorStable | ( | void | ) |
bool XMC_SCU_CLOCK_IsPeripheralClockGated | ( | const XMC_SCU_PERIPHERAL_CLOCK_t | peripheral | ) |
peripheral | The peripheral for which the check for clock gating has to be done. Range: Use type XMC_SCU_PERIPHERAL_CLOCK_t to identify the peripheral. |
bool XMC_SCU_CLOCK_IsSystemPllLocked | ( | void | ) |
None |
bool XMC_SCU_CLOCK_IsUsbPllLocked | ( | void | ) |
None |
void XMC_SCU_CLOCK_SetBackupClockCalibrationMode | ( | XMC_SCU_CLOCK_FOFI_CALIBRATION_MODE_t | mode | ) |
mode | Backup clock calibration mode. Range: Use type XMC_SCU_CLOCK_FOFI_CALIBRATION_MODE_t to identify the calibration mode. XMC_SCU_CLOCK_FOFI_CALIBRATION_MODE_FACTORY- Force trimming of internal oscillator with firmware configured values. XMC_SCU_CLOCK_FOFI_CALIBRATION_MODE_AUTOMATIC- Calibrate internal oscillator automatically using standby clock(fSTDBY). |
void XMC_SCU_CLOCK_SetCcuClockDivider | ( | const uint32_t | ratio | ) |
ratio | Ratio of fCCU clock source to the value of fCCU. Range: 1 or 2. 1-> fCCU= fSYS 2-> fCCU= fSYS/2. |
void XMC_SCU_CLOCK_SetCpuClockDivider | ( | const uint32_t | ratio | ) |
ratio | Ratio between system clock(fSYS) and CPU clock(fCPU). Range: 1 or 2. 1-> fCPU= fSYS. 2-> fCPU= fSYS/2. |
void XMC_SCU_CLOCK_SetDeepSleepConfig | ( | int32_t | config | ) |
config | Defines the source of the system clock and peripherals clock gating in DEEPSLEEP state. XMC_SCU_CLOCK_DEEPSLEEP_MODE_CONFIG_t |
The DEEPSLEEP state of the system corresponds to the DEEPSLEEP state of the CPU. The state is entered via WFI or WFE instruction of the CPU. In this state the clock to the CPU is stopped.
In Deep Sleep state the OSC_HP and the PLL may be switched off. The wake-up logic in the NVIC is still clocked by a free-running clock. Peripherals are only clocked when configured to stay enabled. Configuration of peripherals and any SRAM content is preserved. The Flash module can be put into low-power mode to achieve a further power reduction. On wake-up Flash module will be restarted again before instructions or data access is possible. Any interrupt will bring the system back to operation via the NVIC.The clock setup before entering Deep Sleep state is restored upon wake-up.
void XMC_SCU_CLOCK_SetEbuClockDivider | ( | const uint32_t | ratio | ) |
ratio | Ratio of PLL clock(fPLL) to EBU clock(fEBU). Range: 1 to 64. |
void XMC_SCU_CLOCK_SetECATClockDivider | ( | const uint32_t | divider | ) |
ratio | Ratio between the source of ECAT clock and the ECAT clock. Range: 1 to 4. |
void XMC_SCU_CLOCK_SetECATClockSource | ( | const XMC_SCU_CLOCK_ECATCLKSRC_t | source | ) |
source | Source of ECAT clock. Range: Use type XMC_SCU_CLOCK_ECATCLKSRC_t to identify the clock source. XMC_SCU_CLOCK_ECATCLKSRC_USBPLL - USB PLL (fUSBPLL) as a source for ECAT clock. XMC_SCU_CLOCK_ECATCLKSRC_SYSPLL - Main PLL output (fPLL) as a source for ECAT clock. |
void XMC_SCU_CLOCK_SetExternalOutputClockDivider | ( | const uint32_t | ratio | ) |
ratio | Ratio between the external output parent clock selected and the output clock. Range: 1 to 512. |
void XMC_SCU_CLOCK_SetExternalOutputClockSource | ( | const XMC_SCU_CLOCK_EXTOUTCLKSRC_t | clock | ) |
clock | Source of external clock output(fEXT). Range: Use type XMC_SCU_CLOCK_EXTOUTCLKSRC_t to identify the clock. XMC_SCU_CLOCK_EXTOUTCLKSRC_SYS - system clock fSYS. XMC_SCU_CLOCK_EXTOUTCLKSRC_USB - USB clock fUSB. XMC_SCU_CLOCK_EXTOUTCLKSRC_PLL - PLL output fPLL. |
void XMC_SCU_CLOCK_SetPeripheralClockDivider | ( | const uint32_t | ratio | ) |
ratio | Ratio of peripheral clock source to the value of peripheral clock. Range: 1 or 2. 1-> fPERIPH= fCPU. 2-> fPERIPH= fCPU/2. |
void XMC_SCU_CLOCK_SetSleepConfig | ( | int32_t | config | ) |
config | Defines the source of the system clock and peripherals clock gating in SLEEP state. XMC_SCU_CLOCK_SLEEP_MODE_CONFIG_t |
The SLEEP state of the system corresponds to the SLEEP state of the CPU. The state is entered via WFI or WFE instruction of the CPU. In this state the clock to the CPU is stopped. Peripherals are only clocked when configured to stay enabled.
Peripherals can continue to operate unaffected and eventually generate an event to wake-up the CPU. Any interrupt to the NVIC will bring the CPU back to operation. The clock tree upon exit from SLEEP state is restored to what it was before entry into SLEEP state.
void XMC_SCU_CLOCK_SetSystemClockDivider | ( | const uint32_t | divider | ) |
divider | Ratio of fSYS clock source to the value of fSYS. Range: 1 to 256. |
void XMC_SCU_CLOCK_SetSystemClockSource | ( | const XMC_SCU_CLOCK_SYSCLKSRC_t | source | ) |
source | Source of clock for fSYS. Range: Use type XMC_SCU_CLOCK_SYSCLKSRC_t to select the source of clock. XMC_SCU_CLOCK_SYSCLKSRC_OFI for selecting internal fast clock as fSYS. XMC_SCU_CLOCK_SYSCLKSRC_PLL for selecting the output of PLL fPLL as fSYS. |
void XMC_SCU_CLOCK_SetSystemPllClockSource | ( | const XMC_SCU_CLOCK_SYSPLLCLKSRC_t | source | ) |
source | Source of clock for system PLL. Range: Use type XMC_SCU_CLOCK_SYSPLLCLKSRC_t for identifying the clock source. XMC_SCU_CLOCK_SYSPLLCLKSRC_OSCHP - External High performance oscillator(fOHP). XMC_SCU_CLOCK_SYSPLLCLKSRC_OFI - Internal fast clock (fOFI). |
void XMC_SCU_CLOCK_SetUsbClockDivider | ( | const uint32_t | ratio | ) |
ratio | Ratio of PLL output clock(fPLL) to USB clock(fUSB). Range: 1 to 8. |
void XMC_SCU_CLOCK_SetUsbClockSource | ( | const XMC_SCU_CLOCK_USBCLKSRC_t | source | ) |
source | Source of clock for USB and SDMMC(fUSB/SDMMC). Range: Use type XMC_SCU_CLOCK_USBCLKSRC_t to select the source of clock. XMC_SCU_CLOCK_USBCLKSRC_USBPLL - output of USB PLL as source of USB clock(fUSB/SDMMC). XMC_SCU_CLOCK_USBCLKSRC_SYSPLL - output of PLL fPLL as source of USB clock(fUSB/SDMMC). |
void XMC_SCU_CLOCK_SetWdtClockDivider | ( | const uint32_t | ratio | ) |
ratio | Ratio between the source of WDT clock and the WDT clock. Range: 1 to 256. |
void XMC_SCU_CLOCK_SetWdtClockSource | ( | const XMC_SCU_CLOCK_WDTCLKSRC_t | source | ) |
source | Clock source for watchdog timer. Range: Use type XMC_SCU_CLOCK_WDTCLKSRC_t to identify the clock source. XMC_SCU_CLOCK_WDTCLKSRC_OFI - internal fast oscillator (fOFI) XMC_SCU_CLOCK_WDTCLKSRC_STDBY - backup standby clock (fSTDBY) XMC_SCU_CLOCK_WDTCLKSRC_PLL - PLL output clock (fPLL) |
void XMC_SCU_CLOCK_StartSystemPll | ( | XMC_SCU_CLOCK_SYSPLLCLKSRC_t | source, |
XMC_SCU_CLOCK_SYSPLL_MODE_t | mode, | ||
uint32_t | pdiv, | ||
uint32_t | ndiv, | ||
uint32_t | kdiv | ||
) |
source | PLL clock source. Range: Use type XMC_SCU_CLOCK_SYSPLLCLKSRC_t to identify the clock source. XMC_SCU_CLOCK_SYSPLLCLKSRC_OSCHP- External high precision oscillator input. XMC_SCU_CLOCK_SYSPLLCLKSRC_OFI- Internal fast clock input. |
mode | Mode of PLL operation. Range: Use type XMC_SCU_CLOCK_SYSPLL_MODE_t to identify the PLL mode. XMC_SCU_CLOCK_SYSPLL_MODE_NORMAL- PLL frequency obtained from output of VCO(fVCO). XMC_SCU_CLOCK_SYSPLL_MODE_PRESCALAR- VCO is bypassed. Frequency obtained from fOSC. |
pdiv | Input divider. Represents (PDIV+1) applied to external reference frequency. Range: 1 to 16. |
ndiv | Feedback divider. Represents(NDIV+1) Range: 1 to 128. |
kdiv | Output divider. Represents (K2DIV+1) in normal PLL mode or (K1DIV+1) in prescaler mode. Range: 1 to 128. |
void XMC_SCU_CLOCK_StartUsbPll | ( | uint32_t | pdiv, |
uint32_t | ndiv | ||
) |
pdiv | Input divider value. Represents (PDIV+1) divider for the USB PLL. Range: 1 to 16. |
ndiv | VCO feedback divider for USB PLL. Represents (NDIV+1) feedback divider. Range: 1 to 128. |
void XMC_SCU_CLOCK_StepSystemPllFrequency | ( | uint32_t | kdiv | ) |
kdiv | PLL output divider K2DIV. Range: 1 to 128. Represents (K2DIV+1). |
void XMC_SCU_CLOCK_StopSystemPll | ( | void | ) |
void XMC_SCU_CLOCK_StopUsbPll | ( | void | ) |
void XMC_SCU_CLOCK_UngatePeripheralClock | ( | const XMC_SCU_PERIPHERAL_CLOCK_t | peripheral | ) |
peripheral | The peripheral for which the clock has to be ungated. Range: Use type XMC_SCU_PERIPHERAL_CLOCK_t to identify the peripheral. |
void XMC_SCU_DisableOutOfRangeComparator | ( | const uint32_t | group, |
const uint32_t | channel | ||
) |
group | ADC Group to which the channel being monitored belongs to. Range: 0 or 1. |
channel | The channel whose voltage range has to be monitored. Range: 6 or 7. Value identifies the channel in the selected ADC group. |
void XMC_SCU_DisableTemperatureSensor | ( | void | ) |
void XMC_SCU_EnableOutOfRangeComparator | ( | const uint32_t | group, |
const uint32_t | channel | ||
) |
group | ADC Group to which the channel being monitored belongs to. Range: 0 or 1. |
channel | The channel whose voltage range has to be monitored. Range: 6 or 7. Value identifies the channel in the selected ADC group. |
void XMC_SCU_EnableTemperatureSensor | ( | void | ) |
uint32_t XMC_SCU_GetBootMode | ( | void | ) |
uint32_t XMC_SCU_GetMirrorStatus | ( | void | ) |
uint32_t XMC_SCU_GetTemperatureMeasurement | ( | void | ) |
void XMC_SCU_HIB_ClearEventStatus | ( | int32_t | event | ) |
event | Hibernate wakeup event XMC_SCU_HIB_EVENT_t |
void XMC_SCU_HIB_ClearWakeupEventDetectionStatus | ( | void | ) |
void XMC_SCU_HIB_DisableEvent | ( | int32_t | event | ) |
event | Hibernate wakeup event XMC_SCU_HIB_EVENT_t |
void XMC_SCU_HIB_DisableHibernateDomain | ( | void | ) |
void XMC_SCU_HIB_DisableInternalSlowClock | ( | void | ) |
void XMC_SCU_HIB_EnableEvent | ( | int32_t | event | ) |
event | Hibernate wakeup event XMC_SCU_HIB_EVENT_t |
void XMC_SCU_HIB_EnableHibernateDomain | ( | void | ) |
void XMC_SCU_HIB_EnableInternalSlowClock | ( | void | ) |
void XMC_SCU_HIB_EnterHibernateState | ( | void | ) |
void XMC_SCU_HIB_EnterHibernateStateEx | ( | XMC_SCU_HIB_HIBERNATE_MODE_t | mode | ) |
mode | hibernate mode XMC_SCU_HIB_HIBERNATE_MODE_t |
int32_t XMC_SCU_HIB_GetEventStatus | ( | void | ) |
int32_t XMC_SCU_HIB_GetHibernateControlStatus | ( | void | ) |
XMC_SCU_HIB_RTCCLKSRC_t XMC_SCU_HIB_GetRtcClockSource | ( | void | ) |
XMC_SCU_HIB_RTCCLKSRC_t XMC_SCU_HIB_GetStdbyClockSource | ( | void | ) |
bool XMC_SCU_HIB_IsHibernateDomainEnabled | ( | void | ) |
bool XMC_SCU_HIB_IsWakeupEventDetected | ( | void | ) |
void XMC_SCU_HIB_LPAC_ClearStatus | ( | int32_t | status | ) |
status | HIB LPAC status. Values from XMC_SCU_HIB_LPAC_STATUS_t can be ORed. |
int32_t XMC_SCU_HIB_LPAC_GetStatus | ( | void | ) |
void XMC_SCU_HIB_LPAC_SetHIBIO0Thresholds | ( | uint8_t | lower, |
uint8_t | upper | ||
) |
low | HIB_IO_0 low threshold |
high | HIB_IO_0 high threshold |
void XMC_SCU_HIB_LPAC_SetHIBIO1Thresholds | ( | uint8_t | lower, |
uint8_t | upper | ||
) |
low | HIB_IO_1 low threshold |
high | HIB_IO_1 high threshold |
void XMC_SCU_HIB_LPAC_SetInput | ( | XMC_SCU_HIB_LPAC_INPUT_t | input | ) |
input | LPAC compare input. Values from XMC_SCU_HIB_LPAC_INPUT_t can be ORed. |
void XMC_SCU_HIB_LPAC_SetTiming | ( | bool | enable_delay, |
uint16_t | interval_count, | ||
uint8_t | settle_count | ||
) |
enable_delay | Enable conversion delay |
interval_count | compare interval (interval_count + 16) * 1/32768 (s) |
settle_count | settleing time of LPAC after powered up (triggered) before measurement start (settle_count + 1) * 1/32768 (s) |
void XMC_SCU_HIB_LPAC_SetTrigger | ( | XMC_SCU_HIB_LPAC_TRIGGER_t | trigger | ) |
trigger | LPAC compare trigger |
void XMC_SCU_HIB_LPAC_SetVBATThresholds | ( | uint8_t | lower, |
uint8_t | upper | ||
) |
low | VBAT low threshold |
high | VBAT high threshold |
void XMC_SCU_HIB_LPAC_TriggerCompare | ( | XMC_SCU_HIB_LPAC_INPUT_t | input | ) |
input | LPAC compare input. Values from XMC_SCU_HIB_LPAC_INPUT_t can be ORed. |
void XMC_SCU_HIB_SetInput0 | ( | XMC_SCU_HIB_IO_t | pin | ) |
pin | Hibernate domain dedicated pin XMC_SCU_HIB_IO_t |
void XMC_SCU_HIB_SetPinMode | ( | XMC_SCU_HIB_IO_t | pin, |
XMC_SCU_HIB_PIN_MODE_t | mode | ||
) |
pin | Hibernate domain dedicated pin XMC_SCU_HIB_IO_t |
mode | Hibernate domain dedicated pin mode XMC_SCU_HIB_PIN_MODE_t |
void XMC_SCU_HIB_SetPinOutputLevel | ( | XMC_SCU_HIB_IO_t | pin, |
XMC_SCU_HIB_IO_OUTPUT_LEVEL_t | level | ||
) |
pin | Hibernate domain dedicated pin XMC_SCU_HIB_IO_t |
level | Output polarity of the hibernate domain dedicated pins HIB_IOx XMC_SCU_HIB_IO_OUTPUT_LEVEL_t |
void XMC_SCU_HIB_SetRtcClockSource | ( | const XMC_SCU_HIB_RTCCLKSRC_t | source | ) |
source | Source of RTC clock. Range: Use type XMC_SCU_HIB_RTCCLKSRC_t to identify the clock source. XMC_SCU_HIB_RTCCLKSRC_OSI - internal slow oscillator(fOSI). XMC_SCU_HIB_RTCCLKSRC_ULP - ultra low power oscillator(fULP). |
void XMC_SCU_HIB_SetSR0Input | ( | XMC_SCU_HIB_SR0_INPUT_t | input | ) |
input | input signal HIB_SR0 of ERU0 |
void XMC_SCU_HIB_SetStandbyClockSource | ( | const XMC_SCU_HIB_STDBYCLKSRC_t | source | ) |
source | Source for standby clock. Range: Use type XMC_SCU_HIB_STDBYCLKSRC_t to identify the clock source. XMC_SCU_HIB_STDBYCLKSRC_OSI - internal slow oscillator (fOSI) XMC_SCU_HIB_STDBYCLKSRC_OSCULP - ultra low power osciallator (fULP) |
void XMC_SCU_HIB_SetWakeupTriggerInput | ( | XMC_SCU_HIB_IO_t | pin | ) |
pin | Hibernate domain dedicated pin XMC_SCU_HIB_IO_t |
void XMC_SCU_HIB_TriggerEvent | ( | int32_t | event | ) |
event | Hibernate wakeup event XMC_SCU_HIB_EVENT_t |
void XMC_SCU_INTERRUPT_ClearEventStatus | ( | const XMC_SCU_INTERRUPT_EVENT_t | event | ) |
event | Bit mask of the events to clear. Range: Use type XMC_SCU_INTERRUPT_EVENT_t for providing the input value. Multiple events can be combined using the OR operation. |
void XMC_SCU_INTERRUPT_DisableEvent | ( | const XMC_SCU_INTERRUPT_EVENT_t | event | ) |
event | Bit mask of the event to disable. Range: Use type XMC_SCU_INTERRUPT_EVENT_t for providing the input value. Multiple events can be combined using the OR operation. |
void XMC_SCU_INTERRUPT_DisableNmiRequest | ( | const uint32_t | request | ) |
request | Non-maskable interrupt (NMI) request source to be disabled. Range: Use type XMC_SCU_NMIREQ_t for selecting the source of NMI. Multiple sources can be combined using OR operation. |
void XMC_SCU_INTERRUPT_EnableEvent | ( | const XMC_SCU_INTERRUPT_EVENT_t | event | ) |
event | Bit mask of the event to enable. Range: Use type XMC_SCU_INTERRUPT_EVENT_t for providing the input value. Multiple events can be combined using the OR operation. |
void XMC_SCU_INTERRUPT_EnableNmiRequest | ( | const uint32_t | request | ) |
request | Non-maskable interrupt (NMI) request source to be enabled. Range: Use type XMC_SCU_NMIREQ_t for selecting the source of NMI. Multiple sources can be combined using OR operation. |
XMC_SCU_STATUS_t XMC_SCU_INTERRUPT_SetEventHandler | ( | const XMC_SCU_INTERRUPT_EVENT_t | event, |
const XMC_SCU_INTERRUPT_EVENT_HANDLER_t | handler | ||
) |
event | The event for which the interrupt handler is to be configured. Range: Use type XMC_SCU_INTERRUPT_EVENT_t for identifying the event. |
handler | Name of the function to be executed when the event if detected. Range: The function accepts no arguments and returns no value. |
void XMC_SCU_INTERRUPT_TriggerEvent | ( | const XMC_SCU_INTERRUPT_EVENT_t | event | ) |
event | Bit mask of the event to be triggered. Range: Use type XMC_SCU_INTERRUPT_EVENT_t for providing the input value. Multiple events can be combined using the OR operation. |
XMC_SCU_INTERRUPT_EVENT_t XMC_SCU_INTERUPT_GetEventStatus | ( | void | ) |
void XMC_SCU_IRQHandler | ( | uint32_t | sr_num | ) |
sr_num | Service request number identifying the SCU interrupt generated. Range: 0 to 2. XMC4x devices have one common SCU interrupt, so the value should be 0. But XMC1x devices support 3 interrupt nodes. |
bool XMC_SCU_IsTemperatureSensorBusy | ( | void | ) |
bool XMC_SCU_IsTemperatureSensorEnabled | ( | void | ) |
bool XMC_SCU_IsTemperatureSensorReady | ( | void | ) |
void XMC_SCU_PARITY_ClearStatus | ( | const uint32_t | memory | ) |
memory | The on-chip RAM type, for which the parity error status has to be cleared. Range: Use type XMC_SCU_PARITY_t to identify the on-chip RAM type. Multiple memory status bits can be cleared by using the OR operation. |
void XMC_SCU_PARITY_Disable | ( | const uint32_t | memory | ) |
memory | The on-chip RAM type, for which the parity error checking has to be disabled. Range: Use type XMC_SCU_PARITY_t to identify the on-chip RAM type. Multiple memory types can be combined using the OR operation. |
void XMC_SCU_PARITY_DisableTrapGeneration | ( | const uint32_t | memory | ) |
memory | The on-chip RAM type, for which the parity error trap generation has to be disabled. Range: Use type XMC_SCU_PARITY_t to identify the on-chip RAM type. Multiple memory types can be combined using the OR operation. |
void XMC_SCU_PARITY_Enable | ( | const uint32_t | memory | ) |
memory | The on-chip RAM type, for which the parity error checking has to be enabled. Range: Use type XMC_SCU_PARITY_t to identify the on-chip RAM type. Multiple memory types can be combined using the OR operation. |
void XMC_SCU_PARITY_EnableTrapGeneration | ( | const uint32_t | memory | ) |
memory | The on-chip RAM type, for which the parity error trap generation has to be enabled. Range: Use type XMC_SCU_PARITY_t to identify the on-chip RAM type. Multiple memory types can be combined using the OR operation. |
uint8_t XMC_SCU_PARITY_GetParityReadValue | ( | void | ) |
uint32_t XMC_SCU_PARITY_GetStatus | ( | void | ) |
void XMC_SCU_PARITY_OverrideParityBitLogic | ( | uint32_t | memory | ) |
memory | The on-chip RAM type, for which the parity logic should be overriden. Range: Use type XMC_SCU_PARITY_t to identify the on-chip RAM type. Multiple memory types can be combined using the OR operation. |
void XMC_SCU_PARITY_SelectMemoryTest | ( | const XMC_SCU_PARITY_t | memory | ) |
memory | The on-chip RAM type, for which the parity test has to be enabled. Range: Use type XMC_SCU_PARITY_t to identify the on-chip RAM type. Only a single memory type should be specified. |
void XMC_SCU_PARITY_SetParityWriteValue | ( | uint8_t | write_value | ) |
write_value | parity bits value stored with next write access |
void XMC_SCU_PCU_DisableUsbPullUp | ( | void | ) |
void XMC_SCU_PCU_EnableUsbPullUp | ( | void | ) |
bool XMC_SCU_PCU_IsEnabledUsbPullUp | ( | void | ) |
void XMC_SCU_POWER_DisableMonitor | ( | void | ) |
Disable power monitoring control register for brown-out detection.
void XMC_SCU_POWER_DisableUsb | ( | void | ) |
void XMC_SCU_POWER_EnableMonitor | ( | uint8_t | threshold, |
uint8_t | interval | ||
) |
threshold | Threshold value for comparison to VDDP for brownout detection. LSB33V is 22.5mV |
interval | Interval value for comparison to VDDP expressed in cycles of system clock |
Enable power monitoring control register for brown-out detection. Brown Out Trap need to be enabled using XMC_SCU_TRAP_Enable() and event handling done in NMI_Handler.
void XMC_SCU_POWER_EnableUsb | ( | void | ) |
float XMC_SCU_POWER_GetEVR13Voltage | ( | void | ) |
float XMC_SCU_POWER_GetEVR33Voltage | ( | void | ) |
int32_t XMC_SCU_POWER_GetEVRStatus | ( | void | ) |
void XMC_SCU_POWER_WaitForEvent | ( | XMC_SCU_POWER_MODE_t | mode | ) |
mode | Low power mode |
void XMC_SCU_POWER_WaitForInterrupt | ( | XMC_SCU_POWER_MODE_t | mode, |
bool | sleep_on_exit | ||
) |
mode | Low power mode |
sleep_on_exit | Enter sleep, or deep sleep, on return from an ISR |
uint32_t XMC_SCU_ReadFromRetentionMemory | ( | uint32_t | address | ) |
address | Location in the retention memory to be read. Range: 4 bit address space is provided for selecting 16 words of 32 bits. equivalent to 64 bytes of data. address value should be from 0 to 15. |
uint32_t XMC_SCU_ReadGPR | ( | const uint32_t | index | ) |
index | The SCU general purpose register to be read. Range: 0 and 1 corresponding to GPR0 and GPR1. |
void XMC_SCU_RESET_AssertPeripheralReset | ( | const XMC_SCU_PERIPHERAL_RESET_t | peripheral | ) |
peripheral | The peripheral to be reset. Range: Type XMC_SCU_PERIPHERAL_RESET_t enumerates all the peripherals that can be reset. |
void XMC_SCU_RESET_ClearDeviceResetReason | ( | void | ) |
void XMC_SCU_RESET_DeassertPeripheralReset | ( | const XMC_SCU_PERIPHERAL_RESET_t | peripheral | ) |
peripheral | The peripheral to be moved out of reset state. Range: Type XMC_SCU_PERIPHERAL_RESET_t enumerates all the peripherals that can be reset. |
uint32_t XMC_SCU_RESET_GetDeviceResetReason | ( | void | ) |
bool XMC_SCU_RESET_IsPeripheralResetAsserted | ( | const XMC_SCU_PERIPHERAL_RESET_t | peripheral | ) |
peripheral | The peripheral, whose reset status has to be checked. Range: Type XMC_SCU_PERIPHERAL_RESET_t enumerates all the peripherals. |
void XMC_SCU_SetBootMode | ( | const XMC_SCU_BOOTMODE_t | mode | ) |
mode | Boot mode to be configured for the device. Range: Use type XMC_SCU_BOOTMODE_t for selecting the boot mode. |
void XMC_SCU_SetCcuTriggerHigh | ( | const uint32_t | trigger | ) |
trigger | CCU slices to be triggered synchronously via software. The value is a bitmask of CCU slice bits in the register CCUCON. Range: Use type XMC_SCU_CCU_TRIGGER_t for bitmask of individual CCU slices. Multiple slices can be combined using OR operation. |
void XMC_SCU_SetCcuTriggerLow | ( | const uint32_t | trigger | ) |
trigger | CCU slices to be triggered synchronously via software. The value is a bitmask of CCU slice bits in the register CCUCON. Range: Use type XMC_SCU_CCU_TRIGGER_t for bitmask of individual CCU slices. Multiple slices can be combined using OR operation. |
XMC_SCU_STATUS_t XMC_SCU_StartTemperatureMeasurement | ( | void | ) |
void XMC_SCU_TRAP_ClearStatus | ( | const uint32_t | trap | ) |
trap | The event for which, trap status bit has to be cleared. Range: Use type XMC_SCU_TRAP_t to identify the event. |
void XMC_SCU_TRAP_Disable | ( | const uint32_t | trap | ) |
trap | The event for which, trap generation has to be disabled. Range: Use type XMC_SCU_TRAP_t to identify the event. |
void XMC_SCU_TRAP_Enable | ( | const uint32_t | trap | ) |
trap | The event for which, trap generation has to be enabled. Range: Use type XMC_SCU_TRAP_t to identify the event. |
uint32_t XMC_SCU_TRAP_GetStatus | ( | void | ) |
void XMC_SCU_TRAP_Trigger | ( | const uint32_t | trap | ) |
trap | The event for which, trap has to be triggered. Range: Use type XMC_SCU_TRAP_t to identify the event. |
void XMC_SCU_WriteGPR | ( | const uint32_t | index, |
const uint32_t | data | ||
) |
index | The SCU general purpose register to be written. Range: 0 and 1 corresponding to GPR0 and GPR1. |
data | Data to be written to the selected general purpose register. |
void XMC_SCU_WriteToRetentionMemory | ( | uint32_t | address, |
uint32_t | data | ||
) |
address | Location in the retention memory to be written. Range: 4 bit address space is provided for selecting 16 words of 32 bits. equivalent to 64 bytes of data. address value should be from 0 to 15. |
data | 32 bit data to be written into retention memory. The API writes one word(4 bytes) of data to the address specified. Range: 32 bit data. |