Transfer Functions

General Description

Functions
mtb_pmbus_ctrl_status_t	mtb_pmbus_ctrl_execute_transfer (mtb_pmbus_ctrl_stc_t *inst, mtb_pmbus_ctrl_stc_transfer_cfg_t *cfg)
	Execute a generic PMBus transfer.
mtb_pmbus_ctrl_status_t	mtb_pmbus_ctrl_ex_quick_cmd (mtb_pmbus_ctrl_stc_t *inst, uint8_t addr)
	Execute SMBus Quick Command protocol.
mtb_pmbus_ctrl_status_t	mtb_pmbus_ctrl_ex_received_byte (mtb_pmbus_ctrl_stc_t *inst, uint8_t addr, uint8_t *data, bool pec)
	Execute SMBus Receive Byte protocol.
mtb_pmbus_ctrl_status_t	mtb_pmbus_ctrl_ex_send_byte (mtb_pmbus_ctrl_stc_t *inst, uint8_t addr, uint8_t *data, bool pec)
	Execute SMBus Send Byte protocol.
mtb_pmbus_ctrl_status_t	mtb_pmbus_ctrl_ex_write_byte (mtb_pmbus_ctrl_stc_t *inst, uint8_t addr, uint32_t cmd_code, uint8_t *data, bool pec)
	Execute SMBus Write Byte protocol.
mtb_pmbus_ctrl_status_t	mtb_pmbus_ctrl_ex_read_byte (mtb_pmbus_ctrl_stc_t *inst, uint8_t addr, uint32_t cmd_code, uint8_t *data, bool pec)
	Execute SMBus Read Byte protocol.
mtb_pmbus_ctrl_status_t	mtb_pmbus_ctrl_ex_write_word (mtb_pmbus_ctrl_stc_t *inst, uint8_t addr, uint32_t cmd_code, uint8_t *data, bool pec)
	Execute SMBus Write Word protocol.
mtb_pmbus_ctrl_status_t	mtb_pmbus_ctrl_ex_read_word (mtb_pmbus_ctrl_stc_t *inst, uint8_t addr, uint32_t cmd_code, uint8_t *data, bool pec)
	Execute SMBus Read Word protocol.
mtb_pmbus_ctrl_status_t	mtb_pmbus_ctrl_ex_process_call (mtb_pmbus_ctrl_stc_t *inst, uint8_t addr, uint32_t cmd_code, uint8_t *data, bool pec)
	Execute SMBus Process Call protocol.
mtb_pmbus_ctrl_status_t	mtb_pmbus_ctrl_ex_block_write (mtb_pmbus_ctrl_stc_t *inst, uint8_t addr, uint32_t cmd_code, uint8_t *data, uint32_t size, bool pec)
	Execute SMBus Block Write protocol.
mtb_pmbus_ctrl_status_t	mtb_pmbus_ctrl_ex_block_read (mtb_pmbus_ctrl_stc_t *inst, uint8_t addr, uint32_t cmd_code, uint8_t *data, uint32_t *size, bool pec)
	Execute SMBus Block Read protocol.
mtb_pmbus_ctrl_status_t	mtb_pmbus_ctrl_ex_block_process_call (mtb_pmbus_ctrl_stc_t *inst, uint8_t addr, uint32_t cmd_code, uint8_t *data, uint32_t size_wr, uint32_t *size, bool pec)
	Execute SMBus Block Write-Block Read Process Call protocol.
mtb_pmbus_ctrl_status_t	mtb_pmbus_ctrl_ex_write_32 (mtb_pmbus_ctrl_stc_t *inst, uint8_t addr, uint32_t cmd_code, uint8_t *data, bool pec)
	Execute SMBus Write 32 protocol.
mtb_pmbus_ctrl_status_t	mtb_pmbus_ctrl_ex_write_64 (mtb_pmbus_ctrl_stc_t *inst, uint8_t addr, uint32_t cmd_code, uint8_t *data, bool pec)
	Execute SMBus Write 64 protocol.
mtb_pmbus_ctrl_status_t	mtb_pmbus_ctrl_ex_read_32 (mtb_pmbus_ctrl_stc_t *inst, uint8_t addr, uint32_t cmd_code, uint8_t *data, bool pec)
	Execute SMBus Read 32 protocol.
mtb_pmbus_ctrl_status_t	mtb_pmbus_ctrl_ex_read_64 (mtb_pmbus_ctrl_stc_t *inst, uint8_t addr, uint32_t cmd_code, uint8_t *data, bool pec)
	Execute PMBus Read 64 protocol.

Function Documentation

mtb_pmbus_ctrl_execute_transfer()

mtb_pmbus_ctrl_status_t mtb_pmbus_ctrl_execute_transfer	(	mtb_pmbus_ctrl_stc_t *	inst,
		mtb_pmbus_ctrl_stc_transfer_cfg_t *	cfg )

Execute a generic PMBus transfer.

It accepts a transfer configuration structure containing all transfer parameters, allowing the application to construct custom protocol sequences.

The function handles low-level bus operations and the error detection while giving the application full control over:

• Target device address
• Payload format for write
• Write data size (number of bytes to write)
• Read data size (number of bytes to read)
• Stop condition control (whether to generate STOP at the end of the transfer)

Transfer behavior based on parameter combinations:

• wr_size > 0, rd_size = 0, execute_stop = true: Write-only transfer with STOP
• wr_size > 0, rd_size = 0, execute_stop = false: Write-only transfer without STOP
• wr_size > 0, rd_size > 0, execute_stop = true: Write followed by Repeated START and read, then STOP
• wr_size > 0, rd_size > 0, execute_stop = false: Write followed by Repeated START and read, without STOP
• wr_size = 0, rd_size > 0, execute_stop = true: Read-only transfer with STOP
• wr_size = 0, rd_size > 0, execute_stop = false: Read-only transfer without STOP

Note

When both wr_size and rd_size are non-zero, the provided data buffer must be large enough to accommodate the larger of the two sizes (size >= max(wr_size, rd_size)), as read data will overwrite the write data in the same buffer.

When using this generic transfer API, the application is responsible for proper protocol sequencing and data formatting according to the SMBus/PMBus specification.

Example: PMBus Group Command Protocol

The Group Command protocol allows sending the same command to multiple devices atomically. This can be achieved by calling this function multiple times with execute_stop set to false for all transfers except the last one. For example, to set VOUT_COMMAND on three devices (0x20, 0x21, 0x22), execute three transfers with only the final transfer generating a STOP condition, and so ensures all devices receive the command and update their outputs simultaneously.

Parameters

inst	The pointer to the PMBus controller instance structure
cfg	The pointer to the transfer configuration structure (mtb_pmbus_ctrl_stc_transfer_cfg_t)

Returns

mtb_pmbus_ctrl_status_t

mtb_pmbus_ctrl_ex_quick_cmd()

mtb_pmbus_ctrl_status_t mtb_pmbus_ctrl_ex_quick_cmd	(	mtb_pmbus_ctrl_stc_t *	inst,
		uint8_t	addr )

Execute SMBus Quick Command protocol.

This function performs the SMBus Quick Command Protocol, which sends only the write-direction bit of the target device address write-direction bit.

The function constructs a complete transaction packet including:

• Device address with W bit

Transaction format:

[S] [ADDR+W] [A] [P] 

Where: S=Start, P=Stop, A=ACK, W=Write bit

Note

Quick Command with Read direction (ADDR+R) is not supported due to HW limitations. See Quick Command with Read Direction Limitation for details.

Parameters

inst	The pointer to the PMBus Controller instance structure.
addr	Target device 7-bit I2C address (0x00 to 0x7F). The function automatically handles the W bit.

Returns

mtb_pmbus_ctrl_status_t Status of the operation:

• MTB_PMBUS_CTRL_STATUS_SUCCESS: Transaction initiated successfully
• MTB_PMBUS_CTRL_STATUS_BAD_PARAM: Invalid parameters (NULL pointers)
• MTB_PMBUS_CTRL_STATUS_BUS_IS_BUSY: I2C bus is currently busy
• Other error codes as defined in mtb_pmbus_ctrl_status_t

Note

This function is non-blocking. Use mtb_pmbus_ctrl_wait_cmpl() to determine when the transaction completes.

mtb_pmbus_ctrl_ex_received_byte()

mtb_pmbus_ctrl_status_t mtb_pmbus_ctrl_ex_received_byte	(	mtb_pmbus_ctrl_stc_t *	inst,
		uint8_t	addr,
		uint8_t *	data,
		bool	pec )

Execute SMBus Receive Byte protocol.

This function performs the SMBus Receive Byte protocol, which reads a single byte of data from the target device.

The function constructs a complete transaction packet including:

• Data payload reception (1 byte)
• Optional PEC (Packet Error Code) for data integrity verification

Transaction format without PEC:

[S] [ADDR+R] [A] [Data Byte] [N] [P] 

Transaction format with PEC:

[S] [ADDR+R] [A] [Data Byte] [A] [PEC] [N] [P] 

Where: S=Start, P=Stop, A=ACK, N=NACK, R=Read bit

Parameters

inst	The pointer to the PMBus Controller instance structure.
addr	Target device 7-bit I2C address (0x00 to 0x7F). The function automatically handles the R/W bit.
data	The pointer to a 1-byte buffer to store received data. Must point to valid memory with at least 1 byte.
pec	Enable (true) or disable (false) Packet Error Code calculation and verification. When enabled, verifies CRC-8 checksum for error detection.

Returns

mtb_pmbus_ctrl_status_t Status of the operation:

• MTB_PMBUS_CTRL_STATUS_SUCCESS: Transaction initiated successfully
• MTB_PMBUS_CTRL_STATUS_BAD_PARAM: Invalid parameters (NULL pointers)
• MTB_PMBUS_CTRL_STATUS_BUS_IS_BUSY: I2C bus is currently busy
• Other error codes as defined in mtb_pmbus_ctrl_status_t

Note

This function is non-blocking. Use mtb_pmbus_ctrl_wait_cmpl() to determine when the transaction completes.

The data parameter must remain valid until the transaction completes.

mtb_pmbus_ctrl_ex_send_byte()

mtb_pmbus_ctrl_status_t mtb_pmbus_ctrl_ex_send_byte	(	mtb_pmbus_ctrl_stc_t *	inst,
		uint8_t	addr,
		uint8_t *	data,
		bool	pec )

Execute SMBus Send Byte protocol.

This function performs the SMBus Send Byte protocol, which sends a single byte of data to the target device.

The function constructs a complete transaction packet including:

• Data payload (1 byte)
• Optional PEC (Packet Error Code) for data integrity verification

Transaction format without PEC:

[S] [ADDR+W] [A] [Data Byte] [A] [P] 

Transaction format with PEC:

[S] [ADDR+W] [A] [Data Byte] [A] [PEC] [A] [P] 

Where: S=Start, P=Stop, A=ACK, W=Write bit

Parameters

inst	The pointer to the PMBus controller instance structure.
addr	Target device 7-bit I2C address (0x00 to 0x7F). The function automatically handles the R/W bit.
data	The pointer to a 1-byte data value to send. Must point to valid memory with at least 1 byte.
pec	Enable (true) or disable (false) Packet Error Code calculation and transmission. When enabled, adds CRC-8 checksum for error detection.

Returns

mtb_pmbus_ctrl_status_t Status of the operation:

• MTB_PMBUS_CTRL_STATUS_SUCCESS: Transaction initiated successfully
• MTB_PMBUS_CTRL_STATUS_BAD_PARAM: Invalid parameters (NULL pointers)
• MTB_PMBUS_CTRL_STATUS_BUS_IS_BUSY: I2C bus is currently busy
• Other error codes as defined in mtb_pmbus_ctrl_status_t

Note

This function is non-blocking. Use mtb_pmbus_ctrl_wait_cmpl() to determine when the transaction completes.

The data parameter must remain valid until the transaction completes.

mtb_pmbus_ctrl_ex_write_byte()

mtb_pmbus_ctrl_status_t mtb_pmbus_ctrl_ex_write_byte	(	mtb_pmbus_ctrl_stc_t *	inst,
		uint8_t	addr,
		uint32_t	cmd_code,
		uint8_t *	data,
		bool	pec )

Execute SMBus Write Byte protocol.

This function performs the SMBus Write Byte protocol, which sends a command code followed by 1 byte of data to the target device.

The function constructs a complete transaction packet including:

• Command code (1 byte)
• Data payload (1 byte)
• Optional PEC (Packet Error Code) for data integrity verification

Transaction format without PEC:

[S] [ADDR+W] [A] [CMD] [A] [Data Byte] [A] [P] 

Transaction format with PEC:

[S] [ADDR+W] [A] [CMD] [A] [Data Byte] [A] [PEC] [A] [P] 

Where: S=Start, P=Stop, A=ACK, W=Write bit

Parameters

inst	The pointer to the PMBus controller instance structure.
addr	Target device 7-bit I2C address (0x00 to 0x7F). The function automatically handles the R/W bit.
cmd_code	Command code to send.
data	The pointer to a 1-byte data value to write. Must point to valid memory with at least 1 byte.
pec	Enable (true) or disable (false) Packet Error Code calculation and transmission. When enabled, adds CRC-8 checksum for error detection.

Returns

mtb_pmbus_ctrl_status_t Status of the operation:

• MTB_PMBUS_CTRL_STATUS_SUCCESS: Transaction initiated successfully
• MTB_PMBUS_CTRL_STATUS_BAD_PARAM: Invalid parameters (NULL pointers)
• MTB_PMBUS_CTRL_STATUS_BUS_IS_BUSY: I2C bus is currently busy
• Other error codes as defined in mtb_pmbus_ctrl_status_t

Note

This function is non-blocking. Use mtb_pmbus_ctrl_wait_cmpl() to determine when the transaction completes.

The data parameter must remain valid until the transaction completes.

mtb_pmbus_ctrl_ex_read_byte()

mtb_pmbus_ctrl_status_t mtb_pmbus_ctrl_ex_read_byte	(	mtb_pmbus_ctrl_stc_t *	inst,
		uint8_t	addr,
		uint32_t	cmd_code,
		uint8_t *	data,
		bool	pec )

Execute SMBus Read Byte protocol.

This function performs the SMBus Read Byte protocol, which sends a command code to the target device and then reads 1 byte of data from it.

The function constructs the complete transaction packet including:

• Command code (1 byte)
• Data payload reception (1 byte)
• Optional PEC (Packet Error Code) for data integrity verification

Transaction format without PEC:

[S] [ADDR+W] [A] [CMD] [A] [Sr] [ADDR+R] [A] [Data Byte] [N] [P] 

Transaction format with PEC:

[S] [ADDR+W] [A] [CMD] [A] [Sr] [ADDR+R] [A] [Data Byte] [A] [PEC] [N] [P] 

Where: S=Start, Sr=Repeated Start, P=Stop, A=ACK, N=NACK, W=Write bit, R=Read bit

Parameters

inst	The pointer to the PMBus Controller instance structure.
addr	Target device 7-bit I2C address (0x00 to 0x7F). The function automatically handles the R/W bit.
cmd_code	Command code to send.
data	Pointer to a 1-byte buffer to store the read data. Must point to valid memory with at least 1 byte.
pec	Enable (true) or disable (false) Packet Error Code calculation and verification. When enabled, verifies CRC-8 checksum for error detection.

Returns

mtb_pmbus_ctrl_status_t Status of the operation:

• MTB_PMBUS_CTRL_STATUS_SUCCESS: Transaction initiated successfully
• MTB_PMBUS_CTRL_STATUS_BAD_PARAM: Invalid parameters (NULL pointers)
• MTB_PMBUS_CTRL_STATUS_BUS_IS_BUSY: I2C bus is currently busy
• Other error codes as defined in mtb_pmbus_ctrl_status_t

Note

This function is non-blocking. Use mtb_pmbus_ctrl_wait_cmpl() to determine when the transaction completes.

The data parameter must remain valid until the transaction completes.

mtb_pmbus_ctrl_ex_write_word()

mtb_pmbus_ctrl_status_t mtb_pmbus_ctrl_ex_write_word	(	mtb_pmbus_ctrl_stc_t *	inst,
		uint8_t	addr,
		uint32_t	cmd_code,
		uint8_t *	data,
		bool	pec )

Execute SMBus Write Word protocol.

This function performs the SMBus Write Word protocol, which sends a command code followed by 2 bytes of data to the target device.

The function constructs a complete transaction packet including:

• Command code (1 byte)
• Data payload (2 bytes, LSB first)
• Optional PEC (Packet Error Code) for data integrity verification

Transaction format without PEC:

[S] [ADDR+W] [A] [CMD] [A] [Data Byte Low] [A] [Data Byte High] [A] [P] 

Transaction format with PEC:

[S] [ADDR+W] [A] [CMD] [A] [Data Byte Low] [A] [Data Byte High] [A] [PEC] [A] [P] 

Where: S=Start, P=Stop, A=ACK, W=Write bit

Parameters

inst	The pointer to the PMBus Controller instance structure.
addr	Target device 7-bit I2C address (0x00 to 0x7F). The function automatically handles the R/W bit.
cmd_code	Command code to send.
data	The pointer to a 2-byte array containing the data to write. Must point to valid memory with at least 2 bytes.
pec	Enable (true) or disable (false) Packet Error Code calculation and transmission. When enabled, adds CRC-8 checksum for the error detection.

Returns

mtb_pmbus_ctrl_status_t Status of the operation:

• MTB_PMBUS_CTRL_STATUS_SUCCESS: Transaction initiated successfully
• MTB_PMBUS_CTRL_STATUS_BAD_PARAM: Invalid parameters (NULL pointers)
• MTB_PMBUS_CTRL_STATUS_BUS_IS_BUSY: I2C bus is currently busy
• Other error codes as defined in mtb_pmbus_ctrl_status_t

Note

This function is non-blocking. Use mtb_pmbus_ctrl_wait_cmpl() to determine when the transaction completes.

The data parameter must remain valid until the transaction completes.

mtb_pmbus_ctrl_ex_read_word()

mtb_pmbus_ctrl_status_t mtb_pmbus_ctrl_ex_read_word	(	mtb_pmbus_ctrl_stc_t *	inst,
		uint8_t	addr,
		uint32_t	cmd_code,
		uint8_t *	data,
		bool	pec )

Execute SMBus Read Word protocol.

This function performs the SMBus Read Word protocol, which sends a command code to the target device and then reads 2 bytes of data from it.

The function constructs a complete transaction packet including:

• Command code (1 byte)
• Data payload reception (2 bytes, Data Byte Low first)
• Optional PEC (Packet Error Code) for data integrity verification

Transaction format without PEC:

[S] [ADDR+W] [A] [CMD] [A] [Sr] [ADDR+R] [A] [Data Byte Low] [A] ...
     ... [Data Byte High] [N] [P] 

Transaction format with PEC:

[S] [ADDR+W] [A] [CMD] [A] [Sr] [ADDR+R] [A] [Data Byte Low] [A] ...
     ... [Data Byte High] [A] [PEC] [N] [P] 

Where: S=Start, Sr=Repeated Start, P=Stop, A=ACK, N=NACK, W=Write bit, R=Read bit

Parameters

inst	The pointer to the PMBus Controller instance structure.
addr	Target device 7-bit I2C address (0x00 to 0x7F). The function automatically handles the R/W bit.
cmd_code	Command code to send.
data	The pointer to a 2-byte buffer to store read data. Must point to valid memory with at least 2 bytes.
pec	Enable (true) or disable (false) Packet Error Code calculation and verification. When enabled, verifies CRC-8 checksum for error detection.

Returns

mtb_pmbus_ctrl_status_t Status of the operation:

• MTB_PMBUS_CTRL_STATUS_SUCCESS: Transaction initiated successfully
• MTB_PMBUS_CTRL_STATUS_BAD_PARAM: Invalid parameters (NULL pointers)
• MTB_PMBUS_CTRL_STATUS_BUS_IS_BUSY: I2C bus is currently busy
• Other error codes as defined in mtb_pmbus_ctrl_status_t

Note

This function is non-blocking. Use mtb_pmbus_ctrl_wait_cmpl() to determine when the transaction completes.

The data parameter must remain valid until the transaction completes.

mtb_pmbus_ctrl_ex_process_call()

mtb_pmbus_ctrl_status_t mtb_pmbus_ctrl_ex_process_call	(	mtb_pmbus_ctrl_stc_t *	inst,
		uint8_t	addr,
		uint32_t	cmd_code,
		uint8_t *	data,
		bool	pec )

Execute SMBus Process Call protocol.

This function performs a SMBus Process Call protocol, which sends a command code followed by 2 bytes of data to a target device, and then reads 2 bytes of data back. This is a combined write-read operation in a single transaction.

The function constructs the complete transaction packet including:

• Command code (1 byte)
• Data payload transmission (2 bytes, Data Byte Low first)
• Data payload reception (2 bytes, Data Byte Low first)
• Optional PEC (Packet Error Code) for data integrity verification

Transaction format without PEC:

[S] [ADDR+W] [A] [CMD] [A] [Data Byte Low] [A] [Data Byte High] [A] ...
     ... [Sr] [ADDR+R] [A] [Data Byte Low] [A] [Data Byte High] [N] [P] 

Transaction format with PEC:

[S] [ADDR+W] [A] [CMD] [A] [Data Byte Low] [A] [Data Byte High] [A] ...
     ... [Sr] [ADDR+R] [A] [Data Byte Low] [A] [Data Byte High] [A] [PEC] [N] [P] 

Where: S=Start, Sr=Repeated Start, P=Stop, A=ACK, N=NACK, W=Write bit, R=Read bit

Parameters

inst	The pointer to the PMBus Controller instance structure.
addr	Target device 7-bit I2C address (0x00 to 0x7F). The function automatically handles the R/W bit.
cmd_code	Command code to send.
data	The pointer to the 4-byte buffer. The first 2 bytes contain data to send, and the last 2 bytes will be overwritten with the received data. Must point to valid memory with at least 4 bytes.
pec	Enable (true) or disable (false) Packet Error Code calculation and verification. When enabled, verifies CRC-8 checksum for error detection on the read part only.

Returns

mtb_pmbus_ctrl_status_t Status of the operation:

• MTB_PMBUS_CTRL_STATUS_SUCCESS: Transaction initiated successfully
• MTB_PMBUS_CTRL_STATUS_BAD_PARAM: Invalid parameters (NULL pointers)
• MTB_PMBUS_CTRL_STATUS_BUS_IS_BUSY: I2C bus is currently busy
• Other error codes as defined in mtb_pmbus_ctrl_status_t

Note

This function is non-blocking. Use mtb_pmbus_ctrl_wait_cmpl() to determine when the transaction completes.

The data parameter must remain valid until the transaction completes.

The received data will overwrite bytes 2-3 of the data buffer upon completion.

PEC verification is only applied to the read portion of the transaction.

mtb_pmbus_ctrl_ex_block_write()

mtb_pmbus_ctrl_status_t mtb_pmbus_ctrl_ex_block_write	(	mtb_pmbus_ctrl_stc_t *	inst,
		uint8_t	addr,
		uint32_t	cmd_code,
		uint8_t *	data,
		uint32_t	size,
		bool	pec )

Execute SMBus Block Write protocol.

This function performs the SMBus Block Write protocol, which sends a command code followed by a byte count and a variable number of data bytes to a target device.

The function constructs a complete transaction packet including:

• Command code (1 byte)
• Byte count (1 byte, indicating number of data bytes to follow)
• Data payload (0 to 255 bytes)
• Optional PEC (Packet Error Code) for data integrity verification

Transaction format without PEC:

[S] [ADDR+W] [A] [CMD] [A] [Byte Count] [A] [Data Byte 0] [A] ...
     ... [Data Byte 1] [A] ... [Data Byte N-1] [A] [P] 

Transaction format with PEC:

[S] [ADDR+W] [A] [CMD] [A] [Byte Count] [A] [Data Byte 0] [A] ...
     ... [Data Byte 1] [A] ... [Data Byte N-1] [A] [PEC] [A] [P] 

Where: S=Start, P=Stop, A=ACK, W=Write bit, N=Number of data bytes (1-255)

Parameters

inst	The pointer to the PMBus Controller instance structure.
addr	Target device 7-bit I2C address (0x00 to 0x7F). The function automatically handles the R/W bit.
cmd_code	Command code to send.
data	The pointer to the data buffer containing bytes to write. Must point to valid memory with at least 'size' bytes.
size	Number of bytes to write (0 to 255 bytes). This value is automatically sent as the byte count in the transaction.
pec	Enable (true) or disable (false) Packet Error Code calculation and transmission. When enabled, adds CRC-8 checksum for error detection.

Returns

mtb_pmbus_ctrl_status_t Status of the operation:

• MTB_PMBUS_CTRL_STATUS_SUCCESS: Transaction initiated successfully
• MTB_PMBUS_CTRL_STATUS_BAD_PARAM: Invalid parameters (NULL pointers, size out of range)
• MTB_PMBUS_CTRL_STATUS_BUS_IS_BUSY: I2C bus is currently busy
• Other error codes as defined in mtb_pmbus_ctrl_status_t

Note

This function is non-blocking. Use mtb_pmbus_ctrl_wait_cmpl() to determine when the transaction completes.

The data parameter must remain valid until the transaction completes.

The byte count is automatically included in the transaction and should not be part of the data buffer.

mtb_pmbus_ctrl_ex_block_read()

mtb_pmbus_ctrl_status_t mtb_pmbus_ctrl_ex_block_read	(	mtb_pmbus_ctrl_stc_t *	inst,
		uint8_t	addr,
		uint32_t	cmd_code,
		uint8_t *	data,
		uint32_t *	size,
		bool	pec )

Execute SMBus Block Read protocol.

This function performs the SMBus Block Read protocol, which sends a command code to the target device and then reads a variable number of data bytes from it. The target device first responds with a byte count indicating how many data bytes will follow.

The function constructs a complete transaction packet including:

• Command code (1 byte)
• Byte count reception (1 byte, indicating number of data bytes that follow)
• Data payload reception (0 to 255 bytes, as specified by byte count)
• Optional PEC (Packet Error Code) for data integrity verification

Transaction format without PEC:

[S] [ADDR+W] [A] [CMD] [A] [Sr] [ADDR+R] [A] [Byte Count] [A] ...
     ... [Data Byte 0] [A] [Data Byte 1] [A] ... [Data Byte N-1] [N] [P] 

Transaction format with PEC:

[S] [ADDR+W] [A] [CMD] [A] [Sr] [ADDR+R] [A] [Byte Count] [A] ...
     ... [Data Byte 0] [A] [Data Byte 1] [A] ... [Data Byte N-1] [A] [PEC] [N] [P] 

Where: S=Start, Sr=Repeated Start, P=Stop, A=ACK, N=NACK, W=Write bit, R=Read bit

Parameters

inst	The pointer to the PMBus Controller instance structure.
addr	Target device 7-bit I2C address (0x00 to 0x7F). The function automatically handles the R/W bit.
cmd_code	Command code to send.
data	The pointer to the data buffer to store read data. Must point to valid memory with at least the size specified in the size parameter. The byte count is not stored in this buffer, only actual data bytes.
size	The pointer to the variable containing the maximum buffer size on the input and actual read size on the output. Input: The maximum number of bytes that can be stored in the data buffer. Output: The actual number of bytes read (as reported by the target byte count).
pec	Enable (true) or disable (false) Packet Error Code calculation and verification. When enabled, verifies CRC-8 checksum for error detection.

Returns

mtb_pmbus_ctrl_status_t Status of the operation:

• MTB_PMBUS_CTRL_STATUS_SUCCESS: Transaction initiated successfully
• MTB_PMBUS_CTRL_STATUS_BAD_PARAM: Invalid parameters (NULL pointers)
• MTB_PMBUS_CTRL_STATUS_BUS_IS_BUSY: I2C bus is currently busy
• Other error codes as defined in mtb_pmbus_ctrl_status_t

Note

This function is non-blocking. Use mtb_pmbus_ctrl_wait_cmpl() to determine when the transaction completes.

The data and size parameters must remain valid until the transaction completes.

The byte count received from the target determines the actual number of data bytes read.

If the target byte count exceeds the maximum buffer size, the Controller will NACK the block count byte.

mtb_pmbus_ctrl_ex_block_process_call()

mtb_pmbus_ctrl_status_t mtb_pmbus_ctrl_ex_block_process_call	(	mtb_pmbus_ctrl_stc_t *	inst,
		uint8_t	addr,
		uint32_t	cmd_code,
		uint8_t *	data,
		uint32_t	size_wr,
		uint32_t *	size,
		bool	pec )

Execute SMBus Block Write-Block Read Process Call protocol.

This function performs the SMBus Block Write-Block Read Process Call protocol, which sends command code followed by a byte count and variable number of data bytes to the target device, and then reads the variable number of data bytes back. This is a combined block write-block read operation in a single transaction.

The function constructs a complete transaction packet including:

• Command code (1 byte)
• Write byte count (1 byte, indicating number of data bytes to write)
• Write data payload (0 to 255 bytes)
• Read byte count reception (1 byte, indicating number of data bytes that follow)
• Read data payload reception (0 to 255 bytes, as specified by read byte count)
• Optional PEC (Packet Error Code) for data integrity verification

Transaction format without PEC:

[S] [ADDR+W] [A] [CMD] [A] [Write Byte Count] [A] ...
     ... [Write Data 0] [A] ... [Write Data N-1] [A] ... [Sr] [ADDR+R] [A] ...
     ... [Read Byte Count] [A] [Read Data 0] [A] ... [Read Data M-1] [N] [P] 

Transaction format with PEC:

[S] [ADDR+W] [A] [CMD] [A] [Write Byte Count] [A] ...
     ... [Write Data 0] [A] ... [Write Data N-1] [A] ...
     ... [Sr] [ADDR+R] [A] [Read Byte Count] [A] ...
     ... [Read Data 0] [A] ... [Read Data M-1] [A] [PEC] [N] [P] 

Where: S=Start, Sr=Repeated Start, P=Stop, A=ACK, N=NACK, W=Write bit, R=Read bit

Parameters

inst	The pointer to the PMBus controller instance structure.
addr	Target device 7-bit I2C address (0x00 to 0x7F). The function automatically handles the R/W bit.
cmd_code	Command code to send.
data	The pointer to the data buffer containing write data followed by space for read data. The first size_wr bytes contain the data to write. The remaining buffer space will be overwritten with received data. Must point to valid memory with at least (size_wr + maximum expected read size) bytes.
size_wr	Number of bytes to write (0 to 255 bytes). Must be less than or equal to the size of the data buffer. This value is automatically sent as a write byte count in the transaction.
size	The pointer to the variable containing the maximum read buffer size on the input and actual read size on the output. Input: The size of the buffer space. Output: The actual number of bytes read (as reported by the target's read byte count).
pec	Enable (true) or disable (false) Packet Error Code calculation and verification. When enabled, verifies CRC-8 checksum for error detection on the read part only.

Returns

mtb_pmbus_ctrl_status_t Status of the operation:

• MTB_PMBUS_CTRL_STATUS_SUCCESS: Transaction initiated successfully
• MTB_PMBUS_CTRL_STATUS_BAD_PARAM: Invalid parameters (NULL pointers, size_wr out of range)
• MTB_PMBUS_CTRL_STATUS_BUS_IS_BUSY: I2C bus is currently busy
• Other error codes as defined in mtb_pmbus_ctrl_status_t

Note

This function is non-blocking. Use mtb_pmbus_ctrl_wait_cmpl() to determine when the transaction completes.

The data and size parameters must remain valid until the transaction completes.

The write byte count is automatically included in the transaction and shall not be part of the data buffer.

The read byte count received from the target determines the actual number of data bytes read.

The received data will overwrite the buffer starting at offset size_wr upon completion.

If the target's read byte count exceeds the remaining buffer size, the Controller will NACK the read byte count.

mtb_pmbus_ctrl_ex_write_32()

mtb_pmbus_ctrl_status_t mtb_pmbus_ctrl_ex_write_32	(	mtb_pmbus_ctrl_stc_t *	inst,
		uint8_t	addr,
		uint32_t	cmd_code,
		uint8_t *	data,
		bool	pec )

Execute SMBus Write 32 protocol.

This function performs a SMBus Write 32 Protocol, which sends command code followed by 4 bytes of data to a target device.

The function constructs the complete transaction packet including:

• Command code (1 byte)
• Data payload (4 bytes)
• Optional PEC (Packet Error Code) for data integrity verification

Transaction format without PEC:

[S] [ADDR+W] [A] [CMD] [A] [Data Byte 0] [A] [Data Byte 1] [A] ...
     ... [Data Byte 2] [A] [Data Byte 3] [A] [P] 

Transaction format with PEC:

[S] [ADDR+W] [A] [CMD] [A] [Data Byte 0] [A] [Data Byte 1] [A] ...
     ... [Data Byte 2] [A] [Data Byte 3] [A] [PEC] [A] [P] 

Where: S=Start, P=Stop, A=ACK, W=Write bit

Parameters

inst	The pointer to the PMBus controller instance structure.
addr	Target device 7-bit I2C address (0x00 to 0x7F). The function automatically handles the R/W bit.
cmd_code	Command code to send.
data	The pointer to a 4-byte array containing data to write. Must point to valid memory with at least 4 bytes.
pec	Enable (true) or disable (false) Packet Error Code calculation and transmission. When enabled, adds CRC-8 checksum for error detection.

Returns

mtb_pmbus_ctrl_status_t Status of the operation:

• MTB_PMBUS_CTRL_STATUS_SUCCESS: Transaction initiated successfully
• MTB_PMBUS_CTRL_STATUS_BAD_PARAM: Invalid parameters (NULL pointers)
• MTB_PMBUS_CTRL_STATUS_BUS_IS_BUSY: I2C bus is currently busy
• Other error codes as defined in mtb_pmbus_ctrl_status_t

Note

This function is non-blocking. Use mtb_pmbus_ctrl_wait_cmpl() to determine when the transaction completes.

The data parameter must remain valid until the transaction completes.

mtb_pmbus_ctrl_ex_write_64()

mtb_pmbus_ctrl_status_t mtb_pmbus_ctrl_ex_write_64	(	mtb_pmbus_ctrl_stc_t *	inst,
		uint8_t	addr,
		uint32_t	cmd_code,
		uint8_t *	data,
		bool	pec )

Execute SMBus Write 64 protocol.

This function performs the SMBus Write 64 Protocol, which sends command code followed by 8 bytes of data to the target device.

The function constructs a complete transaction packet including:

• Command code (1 byte)
• Data payload (8 bytes)
• Optional PEC (Packet Error Code) for data integrity verification

Transaction format without PEC:

[S] [ADDR+W] [A] [CMD] [A] [Data Byte 0] [A] [Data Byte 1] [A] ...
     ... [Data Byte 2] [A] [Data Byte 3] [A] [Data Byte 4] [A] [Data Byte 5] [A] ...
     ... [Data Byte 6] [A] [Data Byte 7] [A] [P] 

Transaction format with PEC:

[S] [ADDR+W] [A] [CMD] [A] [Data Byte 0] [A] [Data Byte 1] [A] ...
     ... [Data Byte 2] [A] [Data Byte 3] [A] [Data Byte 4] [A] [Data Byte 5] [A] ...
     ... [Data Byte 6] [A] [Data Byte 7] [A] [PEC] [A] [P] 

Where: S=Start, P=Stop, A=ACK, W=Write bit

Parameters

inst	The pointer to the PMBus controller instance structure.
addr	Target device 7-bit I2C address (0x00 to 0x7F). The function automatically handles the R/W bit.
cmd_code	Command code to send.
data	The pointer to an 8-byte array containing data to write. Must point to valid memory with at least 8 bytes.
pec	Enable (true) or disable (false) Packet Error Code calculation and transmission. When enabled, adds CRC-8 checksum for error detection.

Returns

mtb_pmbus_ctrl_status_t Status of the operation:

• MTB_PMBUS_CTRL_STATUS_SUCCESS: Transaction initiated successfully
• MTB_PMBUS_CTRL_STATUS_BAD_PARAM: Invalid parameters (NULL pointers)
• MTB_PMBUS_CTRL_STATUS_BUS_IS_BUSY: I2C bus is currently busy
• Other error codes as defined in mtb_pmbus_ctrl_status_t

Note

This function is non-blocking. Use mtb_pmbus_ctrl_wait_cmpl() to determine when the transaction completes.

The data parameter must remain valid until the transaction completes.

mtb_pmbus_ctrl_ex_read_32()

mtb_pmbus_ctrl_status_t mtb_pmbus_ctrl_ex_read_32	(	mtb_pmbus_ctrl_stc_t *	inst,
		uint8_t	addr,
		uint32_t	cmd_code,
		uint8_t *	data,
		bool	pec )

Execute SMBus Read 32 protocol.

This function performs the SMBus Read 32 protocol, which sends a command code to the target device and then reads 4 bytes of data from it.

The function constructs a complete transaction packet including:

• Command code (1 byte)
• Data payload reception (4 bytes)
• Optional PEC (Packet Error Code) for data integrity verification

Transaction format without PEC:

[S] [ADDR+W] [A] [CMD] [A] [Sr] [ADDR+R] [A] [Data Byte 0] [A] ...
     ... [Data Byte 1] [A] [Data Byte 2] [A] [Data Byte 3] [N] [P] 

Transaction format with PEC:

[S] [ADDR+W] [A] [CMD] [A] [Sr] [ADDR+R] [A] [Data Byte 0] [A] ...
     ... [Data Byte 1] [A] [Data Byte 2] [A] [Data Byte 3] [A] [PEC] [N] [P] 

Where: S=Start, Sr=Repeated Start, P=Stop, A=ACK, N=NACK, W=Write bit, R=Read bit

Parameters

inst	The pointer to the PMBus controller instance structure.
addr	Target device 7-bit I2C address (0x00 to 0x7F). The function automatically handles the R/W bit.
cmd_code	Command code to send.
data	The pointer to the 4-byte buffer to store the read data. Must point to valid memory with at least 4 bytes.
pec	Enable (true) or disable (false) Packet Error Code calculation and verification. When enabled, verifies CRC-8 checksum for error detection.

Returns

mtb_pmbus_ctrl_status_t Status of the operation:

• MTB_PMBUS_CTRL_STATUS_SUCCESS: Transaction initiated successfully
• MTB_PMBUS_CTRL_STATUS_BAD_PARAM: Invalid parameters (NULL pointers)
• MTB_PMBUS_CTRL_STATUS_BUS_IS_BUSY: I2C bus is currently busy
• Other error code as defined in mtb_pmbus_ctrl_status_t

Note

This function is non-blocking. Use mtb_pmbus_ctrl_wait_cmpl() to determine when the transaction completes.

The data parameter must remain valid until the transaction completes.

mtb_pmbus_ctrl_ex_read_64()

mtb_pmbus_ctrl_status_t mtb_pmbus_ctrl_ex_read_64	(	mtb_pmbus_ctrl_stc_t *	inst,
		uint8_t	addr,
		uint32_t	cmd_code,
		uint8_t *	data,
		bool	pec )

Execute PMBus Read 64 protocol.

This function performs the PMBus Read 64 protocol, which sends command code to the target device and then reads 8 bytes of data from it.

The function constructs the complete transaction packet including:

• Command code (1 byte)
• Data payload reception (8 bytes)
• Optional PEC (Packet Error Code) for data integrity verification

Transaction format without PEC:

[S] [ADDR+W] [A] [CMD] [A] [Sr] [ADDR+R] [A] [Data Byte 0] [A] ...
     ... [Data Byte 1] [A] [Data Byte 2] [A] [Data Byte 3] [A] [Data Byte 4] [A] ...
     ... [Data Byte 5] [A] [Data Byte 6] [A] [Data Byte 7] [N] [P] 

Transaction format with PEC:

[S] [ADDR+W] [A] [CMD] [A] [Sr] [ADDR+R] [A] [Data Byte 0] [A] ...
     ... [Data Byte 1] [A] [Data Byte 2] [A] [Data Byte 3] [A] [Data Byte 4] [A] ...
     ... [Data Byte 5] [A] [Data Byte 6] [A] [Data Byte 7] [A] [PEC] [N] [P] 

Where: S=Start, Sr=Repeated Start, P=Stop, A=ACK, N=NACK, W=Write bit, R=Read bit

Parameters

inst	The pointer to the PMBus controller instance structure.
addr	Target device 7-bit I2C address (0x00 to 0x7F). The function automatically handles the R/W bit.
cmd_code	Command code to send.
data	The pointer to the 8-byte buffer to store read data. Must point to valid memory with at least 8 bytes.
pec	Enable (true) or disable (false) Packet Error Code calculation and verification. When enabled, verifies CRC-8 checksum for the error detection.

Returns

mtb_pmbus_ctrl_status_t The status of the operation:

• MTB_PMBUS_CTRL_STATUS_SUCCESS: Transaction initiated successfully
• MTB_PMBUS_CTRL_STATUS_BAD_PARAM: Invalid parameters (NULL pointers)
• MTB_PMBUS_CTRL_STATUS_BUS_IS_BUSY: I2C bus is currently busy
• Other error codes as defined in mtb_pmbus_ctrl_status_t

Note

This function is non-blocking. Use mtb_pmbus_ctrl_wait_cmpl() to determine when the transaction completes.

The data parameter must remain valid until the transaction completes.