CAT2 Peripheral Driver Library
Modules | Macros
Macros
WDC (Watchdog Counters)

Modules

 Cascading Masks
 The WDC cascading settings.
 

Macros

#define CY_WDC_DRV_VERSION_MAJOR   1
 Driver major version.
 
#define CY_WDC_DRV_VERSION_MINOR   0
 Driver minor version.
 
#define CY_WDC_ID   CY_PDL_DRV_ID(0x35u)
 WDC PDL ID.
 
#define CY_WDC_COUNTER0_Msk   (1UL << CY_WDC_CTR0_Pos)
 Counter 0 mask. More...
 
#define CY_WDC_COUNTER1_Msk   (1UL << CY_WDC_CTR1_Pos)
 Counter 1 mask. More...
 
#define CY_WDC_COUNTER2_Msk   (1UL << CY_WDC_CTR2_Pos)
 Counter 2 mask. More...
 
#define CY_WDC_COUNTERS_Msk
 The mask for all counters. More...
 
#define CY_WDC_CLK_ILO_CYCLE_US   (63U)
 One ILO cycle delay value in microseconds. More...
 
#define CY_WDC_CLK_WCO_CYCLE_US   (31U)
 One WCO cycle delay value in microseconds. More...
 
#define CY_WDC_CLK_ILO_3CYCLES_US   (3U * CY_WDC_CLK_ILO_CYCLE_US)
 Three ILO cycles delay value in microseconds. More...
 
#define CY_WDC_CLK_WCO_3CYCLES_US   (3U * CY_WDC_CLK_WCO_CYCLE_US)
 Three WCO cycles delay value in microseconds. More...
 
#define CY_WDC_CLK_ILO_4CYCLES_US   (4U * CY_WDC_CLK_ILO_CYCLE_US)
 Three ILO cycles delay value in microseconds. More...
 
#define CY_WDC_CLK_WCO_4CYCLES_US   (4U * CY_WDC_CLK_WCO_CYCLE_US)
 Three WCO cycles delay value in microseconds. More...
 

Detailed Description

Macro Definition Documentation

◆ CY_WDC_COUNTER0_Msk

#define CY_WDC_COUNTER0_Msk   (1UL << CY_WDC_CTR0_Pos)

Counter 0 mask.

This macro is used with functions that handle multiple counters, including Cy_WDC_Enable(), Cy_WDC_Disable(), Cy_WDC_ClearInterrupt() and Cy_WDC_ResetCounters().

◆ CY_WDC_COUNTER1_Msk

#define CY_WDC_COUNTER1_Msk   (1UL << CY_WDC_CTR1_Pos)

Counter 1 mask.

This macro is used with functions that handle multiple counters, including Cy_WDC_Enable(), Cy_WDC_Disable(), Cy_WDC_ClearInterrupt() and Cy_WDC_ResetCounters().

◆ CY_WDC_COUNTER2_Msk

#define CY_WDC_COUNTER2_Msk   (1UL << CY_WDC_CTR2_Pos)

Counter 2 mask.

This macro is used with functions that handle multiple counters, including Cy_WDC_Enable(), Cy_WDC_Disable(), Cy_WDC_ClearInterrupt() and Cy_WDC_ResetCounters().

◆ CY_WDC_COUNTERS_Msk

#define CY_WDC_COUNTERS_Msk
Value:
(CY_WDC_COUNTER0_Msk | \
CY_WDC_COUNTER1_Msk | \
CY_WDC_COUNTER2_Msk)
CY_WDC_COUNTER0_Msk
#define CY_WDC_COUNTER0_Msk
Counter 0 mask.
Definition: cy_wdc.h:255

The mask for all counters.

This macro is used with functions that handle multiple counters, including Cy_WDC_Enable(), Cy_WDC_Disable(), Cy_WDC_ClearInterrupt() and Cy_WDC_ResetCounters().

◆ CY_WDC_CLK_ILO_CYCLE_US

#define CY_WDC_CLK_ILO_CYCLE_US   (63U)

One ILO cycle delay value in microseconds.

Calculated for worst-case scenario: 40KHz -60%

◆ CY_WDC_CLK_WCO_CYCLE_US

#define CY_WDC_CLK_WCO_CYCLE_US   (31U)

One WCO cycle delay value in microseconds.

Calculated for 32.768KHz WCO.

◆ CY_WDC_CLK_ILO_3CYCLES_US

#define CY_WDC_CLK_ILO_3CYCLES_US   (3U * CY_WDC_CLK_ILO_CYCLE_US)

Three ILO cycles delay value in microseconds.

◆ CY_WDC_CLK_WCO_3CYCLES_US

#define CY_WDC_CLK_WCO_3CYCLES_US   (3U * CY_WDC_CLK_WCO_CYCLE_US)

Three WCO cycles delay value in microseconds.

◆ CY_WDC_CLK_ILO_4CYCLES_US

#define CY_WDC_CLK_ILO_4CYCLES_US   (4U * CY_WDC_CLK_ILO_CYCLE_US)

Three ILO cycles delay value in microseconds.

◆ CY_WDC_CLK_WCO_4CYCLES_US

#define CY_WDC_CLK_WCO_4CYCLES_US   (4U * CY_WDC_CLK_WCO_CYCLE_US)

Three WCO cycles delay value in microseconds.