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CAT2 Peripheral Driver Library
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CAT2 Peripheral Driver Library
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Mask definitions of SARMUX switches that can be controlled by the SARSEQ. More...
Macros | |
| #define | CY_SAR_MUX_HW_CTRL_P0 (SAR_MUX_SWITCH_HW_CTRL_MUX_HW_CTRL_P0_Msk) |
| Enable SARSEQ control of Pin 0 switches (for Vplus and Vminus) of SARMUX dedicated port. | |
| #define | CY_SAR_MUX_HW_CTRL_P1 (SAR_MUX_SWITCH_HW_CTRL_MUX_HW_CTRL_P1_Msk) |
| Enable SARSEQ control of Pin 1 switches (for Vplus and Vminus) of SARMUX dedicated port. | |
| #define | CY_SAR_MUX_HW_CTRL_P2 (SAR_MUX_SWITCH_HW_CTRL_MUX_HW_CTRL_P2_Msk) |
| Enable SARSEQ control of Pin 2 switches (for Vplus and Vminus) of SARMUX dedicated port. | |
| #define | CY_SAR_MUX_HW_CTRL_P3 (SAR_MUX_SWITCH_HW_CTRL_MUX_HW_CTRL_P3_Msk) |
| Enable SARSEQ control of Pin 3 switches (for Vplus and Vminus) of SARMUX dedicated port. | |
| #define | CY_SAR_MUX_HW_CTRL_P4 (SAR_MUX_SWITCH_HW_CTRL_MUX_HW_CTRL_P4_Msk) |
| Enable SARSEQ control of Pin 4 switches (for Vplus and Vminus) of SARMUX dedicated port. | |
| #define | CY_SAR_MUX_HW_CTRL_P5 (SAR_MUX_SWITCH_HW_CTRL_MUX_HW_CTRL_P5_Msk) |
| Enable SARSEQ control of Pin 5 switches (for Vplus and Vminus) of SARMUX dedicated port. | |
| #define | CY_SAR_MUX_HW_CTRL_P6 (SAR_MUX_SWITCH_HW_CTRL_MUX_HW_CTRL_P6_Msk) |
| Enable SARSEQ control of Pin 6 switches (for Vplus and Vminus) of SARMUX dedicated port. | |
| #define | CY_SAR_MUX_HW_CTRL_P7 (SAR_MUX_SWITCH_HW_CTRL_MUX_HW_CTRL_P7_Msk) |
| Enable SARSEQ control of Pin 7 switches (for Vplus and Vminus) of SARMUX dedicated port. | |
| #define | CY_SAR_MUX_HW_CTRL_VSSA (SAR_MUX_SWITCH_HW_CTRL_MUX_HW_CTRL_VSSA_Msk) |
| Enable SARSEQ control of the switch between VSSA and Vminus. | |
| #define | CY_SAR_MUX_HW_CTRL_TEMP (SAR_MUX_SWITCH_HW_CTRL_MUX_HW_CTRL_TEMP_Msk) |
| Enable SARSEQ control of the switch between DieTemp and Vplus. | |
| #define | CY_SAR_MUX_HW_CTRL_AMUXBUSA (SAR_MUX_SWITCH_HW_CTRL_MUX_HW_CTRL_AMUXBUSA_Msk) |
| Enable SARSEQ control of AMUXBUSA switches (for Vplus and Vminus) | |
| #define | CY_SAR_MUX_HW_CTRL_AMUXBUSB (SAR_MUX_SWITCH_HW_CTRL_MUX_HW_CTRL_AMUXBUSB_Msk) |
| Enable SARSEQ control of AMUXBUSB switches (for Vplus and Vminus) | |
| #define | CY_SAR_MUX_HW_CTRL_SARBUS0 (SAR_MUX_SWITCH_HW_CTRL_MUX_HW_CTRL_SARBUS0_Msk) |
| Enable SARSEQ control of SARBUS0 switches (for Vplus and Vminus) | |
| #define | CY_SAR_MUX_HW_CTRL_SARBUS1 (SAR_MUX_SWITCH_HW_CTRL_MUX_HW_CTRL_SARBUS1_Msk) |
| Enable SARSEQ control of SARBUS1 switches (for Vplus and Vminus) | |
| #define | CY_SAR_MUX_FW_P0_VPLUS (SAR_MUX_SWITCH0_MUX_FW_P0_VPLUS_Msk) |
| Switch between Pin 0 of SARMUX and Vplus of SARADC. | |
| #define | CY_SAR_MUX_FW_P1_VPLUS (SAR_MUX_SWITCH0_MUX_FW_P1_VPLUS_Msk) |
| Switch between Pin 1 of SARMUX and Vplus of SARADC. | |
| #define | CY_SAR_MUX_FW_P2_VPLUS (SAR_MUX_SWITCH0_MUX_FW_P2_VPLUS_Msk) |
| Switch between Pin 2 of SARMUX and Vplus of SARADC. | |
| #define | CY_SAR_MUX_FW_P3_VPLUS (SAR_MUX_SWITCH0_MUX_FW_P3_VPLUS_Msk) |
| Switch between Pin 3 of SARMUX and Vplus of SARADC. | |
| #define | CY_SAR_MUX_FW_P4_VPLUS (SAR_MUX_SWITCH0_MUX_FW_P4_VPLUS_Msk) |
| Switch between Pin 4 of SARMUX and Vplus of SARADC. | |
| #define | CY_SAR_MUX_FW_P5_VPLUS (SAR_MUX_SWITCH0_MUX_FW_P5_VPLUS_Msk) |
| Switch between Pin 5 of SARMUX and Vplus of SARADC. | |
| #define | CY_SAR_MUX_FW_P6_VPLUS (SAR_MUX_SWITCH0_MUX_FW_P6_VPLUS_Msk) |
| Switch between Pin 6 of SARMUX and Vplus of SARADC. | |
| #define | CY_SAR_MUX_FW_P7_VPLUS (SAR_MUX_SWITCH0_MUX_FW_P7_VPLUS_Msk) |
| Switch between Pin 7 of SARMUX and Vplus of SARADC. | |
| #define | CY_SAR_MUX_FW_P0_VMINUS (SAR_MUX_SWITCH0_MUX_FW_P0_VMINUS_Msk) |
| Switch between Pin 0 of SARMUX and Vminus of SARADC. | |
| #define | CY_SAR_MUX_FW_P1_VMINUS (SAR_MUX_SWITCH0_MUX_FW_P1_VMINUS_Msk) |
| Switch between Pin 1 of SARMUX and Vminus of SARADC. | |
| #define | CY_SAR_MUX_FW_P2_VMINUS (SAR_MUX_SWITCH0_MUX_FW_P2_VMINUS_Msk) |
| Switch between Pin 2 of SARMUX and Vminus of SARADC. | |
| #define | CY_SAR_MUX_FW_P3_VMINUS (SAR_MUX_SWITCH0_MUX_FW_P3_VMINUS_Msk) |
| Switch between Pin 3 of SARMUX and Vminus of SARADC. | |
| #define | CY_SAR_MUX_FW_P4_VMINUS (SAR_MUX_SWITCH0_MUX_FW_P4_VMINUS_Msk) |
| Switch between Pin 4 of SARMUX and Vminus of SARADC. | |
| #define | CY_SAR_MUX_FW_P5_VMINUS (SAR_MUX_SWITCH0_MUX_FW_P5_VMINUS_Msk) |
| Switch between Pin 5 of SARMUX and Vminus of SARADC. | |
| #define | CY_SAR_MUX_FW_P6_VMINUS (SAR_MUX_SWITCH0_MUX_FW_P6_VMINUS_Msk) |
| Switch between Pin 6 of SARMUX and Vminus of SARADC. | |
| #define | CY_SAR_MUX_FW_P7_VMINUS (SAR_MUX_SWITCH0_MUX_FW_P7_VMINUS_Msk) |
| Switch between Pin 7 of SARMUX and Vminus of SARADC. | |
| #define | CY_SAR_MUX_FW_VSSA_VMINUS (SAR_MUX_SWITCH0_MUX_FW_VSSA_VMINUS_Msk) |
| Switch between VSSA and Vminus of SARADC. | |
| #define | CY_SAR_MUX_FW_TEMP_VPLUS (SAR_MUX_SWITCH0_MUX_FW_TEMP_VPLUS_Msk) |
| Switch between the DieTemp sensor and vplus of SARADC. | |
| #define | CY_SAR_MUX_FW_AMUXBUSA_VPLUS (SAR_MUX_SWITCH0_MUX_FW_AMUXBUSA_VPLUS_Msk) |
| Switch between AMUXBUSA and vplus of SARADC. | |
| #define | CY_SAR_MUX_FW_AMUXBUSB_VPLUS (SAR_MUX_SWITCH0_MUX_FW_AMUXBUSB_VPLUS_Msk) |
| Switch between AMUXBUSB and vplus of SARADC. | |
| #define | CY_SAR_MUX_FW_AMUXBUSA_VMINUS (SAR_MUX_SWITCH0_MUX_FW_AMUXBUSA_VMINUS_Msk) |
| Switch between AMUXBUSA and vminus of SARADC. | |
| #define | CY_SAR_MUX_FW_AMUXBUSB_VMINUS (SAR_MUX_SWITCH0_MUX_FW_AMUXBUSB_VMINUS_Msk) |
| Switch between AMUXBUSB and vminus of SARADC. | |
| #define | CY_SAR_MUX_FW_SARBUS0_VPLUS (SAR_MUX_SWITCH0_MUX_FW_SARBUS0_VPLUS_Msk) |
| Switch between SARBUS0 and vplus of SARADC. | |
| #define | CY_SAR_MUX_FW_SARBUS1_VPLUS (SAR_MUX_SWITCH0_MUX_FW_SARBUS1_VPLUS_Msk) |
| Switch between SARBUS1 and vplus of SARADC. | |
| #define | CY_SAR_MUX_FW_SARBUS0_VMINUS (SAR_MUX_SWITCH0_MUX_FW_SARBUS0_VMINUS_Msk) |
| Switch between SARBUS0 and vminus of SARADC. | |
| #define | CY_SAR_MUX_FW_SARBUS1_VMINUS (SAR_MUX_SWITCH0_MUX_FW_SARBUS1_VMINUS_Msk) |
| Switch between SARBUS1 and vminus of SARADC. | |
| #define | CY_SAR_MUX_FW_P4_COREIO0 (SAR_MUX_SWITCH0_MUX_FW_P4_COREIO0_Msk) |
| Switch between Pin 4 of SARMUX and coreio0, if present. | |
| #define | CY_SAR_MUX_FW_P5_COREIO1 (SAR_MUX_SWITCH0_MUX_FW_P5_COREIO1_Msk) |
| Switch between Pin 5 of SARMUX and coreio1, if present. | |
| #define | CY_SAR_MUX_FW_P6_COREIO2 (SAR_MUX_SWITCH0_MUX_FW_P6_COREIO2_Msk) |
| Switch between Pin 6 of SARMUX and coreio2, if present. | |
| #define | CY_SAR_MUX_FW_P7_COREIO3 (SAR_MUX_SWITCH0_MUX_FW_P7_COREIO3_Msk) |
| Switch between Pin 7 of SARMUX and coreio3, if present. | |
Mask definitions of SARMUX switches that can be controlled by the SARSEQ.
To enable the sequencer control of multiple switches, "OR" the values together.