This set of enumerations aids in configuring the SAR CHAN_CONFIG and INJ_CHAN_CONFIG registers. More...

Enumerations
enum	cy_en_sar_chan_config_port_pin_addr_t { CY_SAR_ADDR_SARMUX_0 = 0x0UL, CY_SAR_ADDR_SARMUX_1 = 0x1UL, CY_SAR_ADDR_SARMUX_2 = 0x2UL, CY_SAR_ADDR_SARMUX_3 = 0x3UL, CY_SAR_ADDR_SARMUX_4 = 0x4UL, CY_SAR_ADDR_SARMUX_5 = 0x5UL, CY_SAR_ADDR_SARMUX_6 = 0x6UL, CY_SAR_ADDR_SARMUX_7 = 0x7UL, CY_SAR_ADDR_CTB0_OA0 = 0x12UL, CY_SAR_ADDR_CTB0_OA1 = 0x13UL, CY_SAR_ADDR_CTB1_OA0 = 0x22UL, CY_SAR_ADDR_CTB1_OA1 = 0x23UL, CY_SAR_ADDR_CTB2_OA0 = 0x32UL, CY_SAR_ADDR_CTB2_OA1 = 0x33UL, CY_SAR_ADDR_CTB3_OA0 = 0x42UL, CY_SAR_ADDR_CTB3_OA1 = 0x43UL, CY_SAR_ADDR_EXPMUX_0 = 0x50UL, CY_SAR_ADDR_EXPMUX_1 = 0x51UL, CY_SAR_ADDR_EXPMUX_2 = 0x52UL, CY_SAR_ADDR_EXPMUX_3 = 0x53UL, CY_SAR_ADDR_EXPMUX_4 = 0x54UL, CY_SAR_ADDR_EXPMUX_5 = 0x55UL, CY_SAR_ADDR_EXPMUX_6 = 0x56UL, CY_SAR_ADDR_EXPMUX_7 = 0x57UL, CY_SAR_ADDR_DIAG_GND = 0x60UL, CY_SAR_ADDR_DIAG_SRSS_BGR = 0x61UL, CY_SAR_ADDR_DIAG_VBAT_DIV_24 = 0x63UL, CY_SAR_ADDR_DIAG_VCC_DIV_2 = 0x66UL, CY_SAR_ADDR_DIAG_VDD_DIV_6 = 0x67UL, CY_SAR_ADDR_SARMUX_DIE_TEMP = 0x70UL, CY_SAR_ADDR_SARMUX_AMUXBUS_A = 0x72UL, CY_SAR_ADDR_SARMUX_AMUXBUS_B = 0x73UL }
	Configure the input mode of the channel. More...

enum	cy_en_sar_chan_config_neg_port_pin_addr_t { CY_SAR_NEG_ADDR_SARMUX_0 = 0x0UL, CY_SAR_NEG_ADDR_SARMUX_1 = 0x1UL, CY_SAR_NEG_ADDR_SARMUX_2 = 0x2UL, CY_SAR_NEG_ADDR_SARMUX_3 = 0x3UL, CY_SAR_NEG_ADDR_SARMUX_4 = 0x4UL, CY_SAR_NEG_ADDR_SARMUX_5 = 0x5UL, CY_SAR_NEG_ADDR_SARMUX_6 = 0x6UL, CY_SAR_NEG_ADDR_SARMUX_7 = 0x7UL, CY_SAR_NEG_ADDR_EXPMUX_0 = 0x50UL, CY_SAR_NEG_ADDR_EXPMUX_1 = 0x51UL, CY_SAR_NEG_ADDR_EXPMUX_2 = 0x52UL, CY_SAR_NEG_ADDR_EXPMUX_3 = 0x53UL, CY_SAR_NEG_ADDR_EXPMUX_4 = 0x54UL, CY_SAR_NEG_ADDR_EXPMUX_5 = 0x55UL, CY_SAR_NEG_ADDR_EXPMUX_6 = 0x56UL, CY_SAR_NEG_ADDR_EXPMUX_7 = 0x57UL, CY_SAR_NEG_ADDR_DIAG_VSSA = 0x60UL, CY_SAR_NEG_ADDR_DIAG_VSSD = 0x61UL, CY_SAR_NEG_ADDR_SARMUX_AMUXBUS_A = 0x72UL, CY_SAR_NEG_ADDR_SARMUX_AMUXBUS_B = 0x73UL }
	Configure the address of the port and the pin connected to the Vminus terminal of the SARADC. More...

enum	cy_en_sar_channel_ctrl_resolution_t { CY_SAR_MAX_RES = 0UL, CY_SAR_SUB_RES = 1UL }
	Resolution. More...

enum	cy_en_sar_channel_sampletime_t { CY_SAR_SAMPLE_TIME_0 = 0, CY_SAR_SAMPLE_TIME_1 = 1, CY_SAR_SAMPLE_TIME_2 = 2, CY_SAR_SAMPLE_TIME_3 = 3 }
	Sampling Timer selection. More...

Detailed Description

This set of enumerations aids in configuring the SAR CHAN_CONFIG and INJ_CHAN_CONFIG registers.

Enumeration Type Documentation

◆ cy_en_sar_chan_config_port_pin_addr_t

enum cy_en_sar_chan_config_port_pin_addr_t

Configure the input mode of the channel.

Single ended channel: the cy_en_sar_ctrl_neg_sel_t selection in the group_sar_init_struct_ctrl register determines what drives the Vminus pin
Differential: Vplus and Vminus are a pair. Bit 0 of cy_en_sar_chan_config_port_pin_addr_t is ignored and considered to be 0. In other words, cy_en_sar_chan_config_port_pin_addr_t points to the even pin of a pin pair. The even pin is connected to Vplus and the next odd pin is connected to Vminus.
Extended differential: the cy_en_sar_chan_config_neg_port_pin_addr_t selection determines what drives the Vminus pin (if NEG_ADDR_EN =1) Configure address of the port and the pin connected to the Vplus terminal of the SARADC See the SARMUX and SARSEQ section for more guidance.

Enumerator
CY_SAR_ADDR_SARMUX_0	Dedicated SARMUX pin 0.
CY_SAR_ADDR_SARMUX_1	Dedicated SARMUX pin 1, valid for single ended channels only.
CY_SAR_ADDR_SARMUX_2	Dedicated SARMUX pin 2.
CY_SAR_ADDR_SARMUX_3	Dedicated SARMUX pin 3, valid for single ended channels only.
CY_SAR_ADDR_SARMUX_4	Dedicated SARMUX pin 4.
CY_SAR_ADDR_SARMUX_5	Dedicated SARMUX pin 5, valid for single ended channels only.
CY_SAR_ADDR_SARMUX_6	Dedicated SARMUX pin 6.
CY_SAR_ADDR_SARMUX_7	Dedicated SARMUX pin 7, valid for single ended channels only.
CY_SAR_ADDR_CTB0_OA0	CTB0 OA0 output, if present.
CY_SAR_ADDR_CTB0_OA1	CTB0 OA1 output, if present.
CY_SAR_ADDR_CTB1_OA0	CTB1 OA0 output, if present.
CY_SAR_ADDR_CTB1_OA1	CTB1 OA1 output, if present.
CY_SAR_ADDR_CTB2_OA0	CTB2 OA0 output, if present.
CY_SAR_ADDR_CTB2_OA1	CTB2 OA1 output, if present.
CY_SAR_ADDR_CTB3_OA0	CTB3 OA0 output, if present.
CY_SAR_ADDR_CTB3_OA1	CTB3 OA1 output, if present.
CY_SAR_ADDR_EXPMUX_0	GPIO Expansion Mux pin 0, if present.
CY_SAR_ADDR_EXPMUX_1	GPIO Expansion Mux pin 1, if present.
CY_SAR_ADDR_EXPMUX_2	GPIO Expansion Mux pin 2, if present.
CY_SAR_ADDR_EXPMUX_3	GPIO Expansion Mux pin 3, if present.
CY_SAR_ADDR_EXPMUX_4	GPIO Expansion Mux pin 4, if present.
CY_SAR_ADDR_EXPMUX_5	GPIO Expansion Mux pin 5, if present.
CY_SAR_ADDR_EXPMUX_6	GPIO Expansion Mux pin 6, if present.
CY_SAR_ADDR_EXPMUX_7	GPIO Expansion Mux pin 7, if present.
CY_SAR_ADDR_DIAG_GND	Diagnostic Mux VSSA, if present.
CY_SAR_ADDR_DIAG_SRSS_BGR	Diagnostic Mux SRSS bandgap voltage, if present.
CY_SAR_ADDR_DIAG_VBAT_DIV_24	Diagnostic Mux VBAT/24 from HVDIV, if present.
CY_SAR_ADDR_DIAG_VCC_DIV_2	Diagnostic Mux VCC/2, if present.
CY_SAR_ADDR_DIAG_VDD_DIV_6	Diagnostic Mux VDD/6, if present.
CY_SAR_ADDR_SARMUX_DIE_TEMP	SARMUX virtual port for DieTemp.
CY_SAR_ADDR_SARMUX_AMUXBUS_A	SARMUX virtual port for AMUXBUSA.
CY_SAR_ADDR_SARMUX_AMUXBUS_B	SARMUX virtual port for AMUXBUSB.

◆ cy_en_sar_chan_config_neg_port_pin_addr_t

enum cy_en_sar_chan_config_neg_port_pin_addr_t

Configure the address of the port and the pin connected to the Vminus terminal of the SARADC.

See the SARMUX and SARSEQ section for more guidance.

Enumerator
CY_SAR_NEG_ADDR_SARMUX_0	Dedicated SARMUX pin 0.
CY_SAR_NEG_ADDR_SARMUX_1	Dedicated SARMUX pin 1.
CY_SAR_NEG_ADDR_SARMUX_2	Dedicated SARMUX pin 2.
CY_SAR_NEG_ADDR_SARMUX_3	Dedicated SARMUX pin 3.
CY_SAR_NEG_ADDR_SARMUX_4	Dedicated SARMUX pin 4.
CY_SAR_NEG_ADDR_SARMUX_5	Dedicated SARMUX pin 5.
CY_SAR_NEG_ADDR_SARMUX_6	Dedicated SARMUX pin 6.
CY_SAR_NEG_ADDR_SARMUX_7	Dedicated SARMUX pin 7.
CY_SAR_NEG_ADDR_EXPMUX_0	GPIO Expansion Mux pin 0, if present.
CY_SAR_NEG_ADDR_EXPMUX_1	GPIO Expansion Mux pin 1, if present.
CY_SAR_NEG_ADDR_EXPMUX_2	GPIO Expansion Mux pin 2, if present.
CY_SAR_NEG_ADDR_EXPMUX_3	GPIO Expansion Mux pin 3, if present.
CY_SAR_NEG_ADDR_EXPMUX_4	GPIO Expansion Mux pin 4, if present.
CY_SAR_NEG_ADDR_EXPMUX_5	GPIO Expansion Mux pin 5, if present.
CY_SAR_NEG_ADDR_EXPMUX_6	GPIO Expansion Mux pin 6, if present.
CY_SAR_NEG_ADDR_EXPMUX_7	GPIO Expansion Mux pin 7, if present.
CY_SAR_NEG_ADDR_DIAG_VSSA	Diagnostic Mux VSSA.
CY_SAR_NEG_ADDR_DIAG_VSSD	Diagnostic Mux VSSD.
CY_SAR_NEG_ADDR_SARMUX_AMUXBUS_A	SARMUX virtual port for AMUXBUS-A.
CY_SAR_NEG_ADDR_SARMUX_AMUXBUS_B	SARMUX virtual port for AMUXBUS-B.

◆ cy_en_sar_channel_ctrl_resolution_t

enum cy_en_sar_channel_ctrl_resolution_t

Resolution.

Enumerator
CY_SAR_MAX_RES	Maximum 12b resolution.
CY_SAR_SUB_RES	Reduced resolution, defined by cy_en_sar_sample_ctrl_sub_resolution_t.

◆ cy_en_sar_channel_sampletime_t

enum cy_en_sar_channel_sampletime_t

Sampling Timer selection.