Functions

Functions
cy_en_flashdrv_status_t	Cy_Flash_WriteRow (uint32_t rowAddr, const uint32_t *data)
	Erases a row of Flash or Supervisory Flash and programs it with the new data. More...
cy_en_flashdrv_status_t	Cy_Flash_StartWrite (uint32_t rowAddr, const uint32_t *data)
	Initiates a write to a row of Flash. More...
cy_en_flashdrv_status_t	Cy_Flash_ResumeWrite (void)
	The non-blocking write row API Cy_Flash_StartWrite() requires that this function be called 3 times to complete the write. More...
cy_en_flashdrv_status_t	Cy_Flash_IsOperationComplete (void)
	Returns the current status of the Flash write operation. More...
cy_en_flashdrv_status_t	Cy_Flash_RowChecksum (uint32_t rowAddr, uint32_t *checksumPtr)
	Returns a checksum value of the specified Flash or Supervisory Flash row. More...
cy_en_flashdrv_status_t	Cy_Flash_SetProtection (const uint32_t bitField)
	Controls protection against the program/erase operation of the flash. More...
cy_en_flashdrv_status_t	Cy_Flash_GetProtectionStatus (uint32_t *statusPtr)
	Gets the flash protection status of the specified flash. More...
cy_en_flashdrv_status_t	Cy_Flash_SetupEccInjection (const uint32_t address, const uint8_t parity)
	Set CPUSS_FLASHC_ECC_CTL register to setup ECC error injection. More...
void	Cy_Flash_EnableEccInjection (void)
	Set CPUSS_FLASH_CTL register to enable ECC injection. More...
void	Cy_Flash_DisableEccInjection (void)
	Set CPUSS_FLASH_CTL register to disable ECC injection. More...
bool	Cy_Flash_IsEccInjectionEnabled (void)
	Check whether the ECC error injection of data flash is enabled. More...

Detailed Description

Function Documentation

Cy_Flash_WriteRow()

cy_en_flashdrv_status_t Cy_Flash_WriteRow	(	uint32_t	rowAddr,
		const uint32_t *	data
	)

Erases a row of Flash or Supervisory Flash and programs it with the new data.

Does not return until the write operation is complete. Refer to the device datasheet for the details.

This API will automatically enable IMO and modify the clock settings for the device. Writing to Flash requires 48 MHz IMO and changes be made to the HFCLK settings. The configuration is restored before returning. HFCLK will have several frequency changes during the operation of this API between a minimum frequency of the current IMO frequency divided by 8 and a maximum frequency of 12 MHz. This will impact the operation of most of the hardware in the device.

Parameters

rowAddr	Address of the Flash or Supervisory Flash row to which the data needs to be written. The address shall be aligned to the beginning of the row.
data	Array of bytes to write. The size of the array must be equal to the Flash row size defined by CY_FLASH_SIZEOF_ROW.

Returns

Enumerated Types

Function Usage

    /* Define and initialize data to write */
    uint32_t data[CY_FLASH_SIZEOF_ROW / sizeof(uint32_t)];

    cy_en_flashdrv_status_t status;

    /* Initialize data */
    memset(data, 0x5A, CY_FLASH_SIZEOF_ROW);

    /* Write data at the specified row address */
    status = Cy_Flash_WriteRow(0x00020000UL, data);
    if (CY_FLASH_DRV_SUCCESS != status)
    {
        /* Handle error here */
    }

Cy_Flash_StartWrite()

cy_en_flashdrv_status_t Cy_Flash_StartWrite	(	uint32_t	rowAddr,
		const uint32_t *	data
	)

Initiates a write to a row of Flash.

A call to this API is non-blocking. Use Cy_Flash_ResumeWrite() to resume Flash writes and Cy_Flash_IsOperationComplete() to ascertain status of the write operation. Supervisory Flash does not support non-blocking write.

This API will automatically enable IMO and modify the clock settings for the device. Writing to Flash requires 48 MHz IMO and changes be made to the HFCLK settings. The configuration is restored to original configuration by calling Cy_Flash_IsOperationComplete(). HFCLK will have several frequency changes during the operation of these API between a minimum frequency of the current IMO frequency divided by 8 and a maximum frequency of 12 MHz. This will impact the operation of most of the hardware in the device.

This API will automatically enable IMO and modify the clock settings for the device. Writing to Flash requires 48 MHz IMO and changes be made to the HFCLK settings. The configuration is restored to original configuration by calling Cy_Flash_IsOperationComplete(). HFCLK will have several frequency changes during the operation of this API and Cy_Flash_IsOperationComplete() API between a minimum frequency of the current IMO frequency divided by 8 and a maximum frequency of 12 MHz. This will impact the operation of most of the hardware in the device.

The devices require HFCLK to be sourced by 48 MHz IMO during Flash write. The IMO must be enabled before calling this function. This API will modify IMO configuration; it can be later restored to original configuration by calling Cy_Flash_IsOperationComplete().

The non-blocking write row API Cy_Flash_StartWrite() requires Cy_Flash_ResumeWrite() to be called 3 times to complete the write. This can be done by configuring SPCIF interrupt and placing a call to this API.

For Cortex-M0+ based devices, if the user wants to keep the vector table in Flash when performing non-blocking Flash write then they need to make sure the vector table is placed in the Flash macro which is not getting programmed by configuring the VTOR register.

Parameters

rowAddr	Address of the Flash row to which the data needs to be written. The address shall be aligned to the beginning of the row. Supervisory Flash is not supported.
data	Array of bytes to write. The size of the array must be equal to the Flash row size. The Flash row size for the selected device is defined by the CY_FLASH_SIZEOF_ROW macro. Refer to the device datasheet for the details.

Returns

Enumerated Types. Returns CY_FLASH_DRV_OPERATION_STARTED in case of successful start.

Note

The non-blocking operation does not return success status CY_FLASH_DRV_SUCCESS until the last Cy_Flash_ResumeWrite() API is complete. The CPUSS_SYSARG register will be reflecting the SRAM address during an ongoing non-blocking operation.

Function Usage

    /* Define and initialize data to write */
    uint32_t data[CY_FLASH_SIZEOF_ROW / sizeof(uint32_t)];

    /* Store number of the Flash interrupts */
    uint32_t intCount = 0U;

    /* Define flash interrupt configuration structure */
    cy_stc_sysint_t int_cfg = {
        .intrSrc = cpuss_interrupt_spcif_IRQn,
        .intrPriority = 0u
    };

    /* Flash interrupt handler */
    void flash_isr(void)
    {
        /* The function returns the SRAM address if API execution is successful.
        *  The actual status returned only for call to complete the last operation.
        */
        (void) Cy_Flash_ResumeWrite();
        intCount++;
    }

    cy_en_flashdrv_status_t status;

    /* Initialize data */
    memset(data, 0x5A, CY_FLASH_SIZEOF_ROW);

    /* Configure Flash interrupt */
    Cy_SysInt_Init(&int_cfg, &flash_isr);
    NVIC_EnableIRQ(int_cfg.intrSrc);

    /* Initiate non-blocking flash write (system clocks are updated) */
    status = Cy_Flash_StartWrite(0x00020000UL, data);
    if (CY_FLASH_DRV_OPERATION_STARTED != status)
    {
        /* Handle error here */
    }

    while (intCount < 3U)
    {
        /* Do something else while 3 flash interrupts are processed */
    }

    /* Check status and restore system clocks */
    status = Cy_Flash_IsOperationComplete();
    if (CY_FLASH_DRV_SUCCESS != status)
    {
        /* Handle error here */
    }

Cy_Flash_ResumeWrite()

cy_en_flashdrv_status_t Cy_Flash_ResumeWrite

(

void

)

The non-blocking write row API Cy_Flash_StartWrite() requires that this function be called 3 times to complete the write.

This can be done by configuring SPCIF interrupt and placing a call to this API.

It is advised not to prolong calling this API for more than 25 ms.

Note

The non-blocking operation does not return success status CY_FLASH_DRV_SUCCESS until the last Resume API is complete. The CPUSS_SYSARG register will be reflecting the SRAM address during an ongoing non-blocking operation.

Returns

Enumerated Types

Cy_Flash_IsOperationComplete()

cy_en_flashdrv_status_t Cy_Flash_IsOperationComplete

(

void

)

Returns the current status of the Flash write operation.

Note

The non-blocking operation does not return success status CY_FLASH_DRV_SUCCESS until the last Cy_Flash_ResumeWrite() is complete. The CPUSS_SYSARG register will be reflecting the SRAM address during an ongoing non-blocking operation.

Calling this API before starting a non-blocking write row operation using the Cy_Flash_StartWrite API will cause improper operation.

Returns

cy_en_flashdrv_status_t

Cy_Flash_RowChecksum()

cy_en_flashdrv_status_t Cy_Flash_RowChecksum	(	uint32_t	rowAddr,
		uint32_t *	checksumPtr
	)

Returns a checksum value of the specified Flash or Supervisory Flash row.

Parameters

rowAddr	The address of the row. The address shall be aligned to the beginning of the row.
checksumPtr	The pointer to the address where checksum is to be stored.

Returns

cy_en_flashdrv_status_t

Function Usage

    cy_en_flashdrv_status_t status;
    uint32_t checksum = 0U;

    /* Calculate checksum of the data at the specified row address */
    status = Cy_Flash_RowChecksum(0x00020000UL, &checksum);
    if (CY_FLASH_DRV_SUCCESS != status)
    {
        /* Handle error here */
    }

Cy_Flash_SetProtection()

cy_en_flashdrv_status_t Cy_Flash_SetProtection

(

const uint32_t

bitField

)

Controls protection against the program/erase operation of the flash.

Parameters

bitField

Bitfield value that specify the protection setting of Flash macros.

Returns

Enumerated Types

Function Usage

    uint32_t protection = 0U;

    Cy_Flash_SetProtection(CY_FLASH_PROTECTION_BIT_PARAM_MAX);
    Cy_Flash_GetProtectionStatus(&protection);

Cy_Flash_GetProtectionStatus()

cy_en_flashdrv_status_t Cy_Flash_GetProtectionStatus

(

uint32_t *

statusPtr

)

Gets the flash protection status of the specified flash.

Parameters

statusPtr

The pointer to the area to store the protection status.

Returns

Enumerated Types

Function Usage

    uint32_t protection = 0U;

    Cy_Flash_SetProtection(CY_FLASH_PROTECTION_BIT_PARAM_MAX);
    Cy_Flash_GetProtectionStatus(&protection);

Cy_Flash_SetupEccInjection()

cy_en_flashdrv_status_t Cy_Flash_SetupEccInjection	(	const uint32_t	address,
		const uint8_t	parity
	)

Set CPUSS_FLASHC_ECC_CTL register to setup ECC error injection.

Parameters

[in]	address	Specifies the address where an ECC error will be injected.
[in]	parity	Specifies the parity, which will be injected to the word address.

Returns

Enumerated Types

• Function Usage

      bool isEccEnabled = false;
      const uint8_t parity = 0U;
  
      Cy_Flash_SetupEccInjection(0x0000FFF0UL, parity);
      Cy_Flash_EnableEccInjection();
      /* Inject ECC error here */
  
      /* Check if ECC error because of injection or because of real error */
      isEccEnabled = Cy_Flash_IsEccInjectionEnabled();
  
      Cy_Flash_DisableEccInjection();

  Note

  Set the lowest three bits of the address to zero. For FLASH ECC, the word address WORD_ADDR[23:0] is device address A[26:3].

Cy_Flash_EnableEccInjection()

void Cy_Flash_EnableEccInjection

(

void

)

Set CPUSS_FLASH_CTL register to enable ECC injection.

Returns

None

Function Usage

    bool isEccEnabled = false;
    const uint8_t parity = 0U;

    Cy_Flash_SetupEccInjection(0x0000FFF0UL, parity);
    Cy_Flash_EnableEccInjection();
    /* Inject ECC error here */

    /* Check if ECC error because of injection or because of real error */
    isEccEnabled = Cy_Flash_IsEccInjectionEnabled();

    Cy_Flash_DisableEccInjection();

Cy_Flash_DisableEccInjection()

void Cy_Flash_DisableEccInjection

(

void

)

Set CPUSS_FLASH_CTL register to disable ECC injection.

Returns

None

Function Usage

    bool isEccEnabled = false;
    const uint8_t parity = 0U;

    Cy_Flash_SetupEccInjection(0x0000FFF0UL, parity);
    Cy_Flash_EnableEccInjection();
    /* Inject ECC error here */

    /* Check if ECC error because of injection or because of real error */
    isEccEnabled = Cy_Flash_IsEccInjectionEnabled();

    Cy_Flash_DisableEccInjection();

Cy_Flash_IsEccInjectionEnabled()

bool Cy_Flash_IsEccInjectionEnabled

(

void

)

Check whether the ECC error injection of data flash is enabled.

Returns

TRUE if injection enabled, FALSE - otherwise.

Function Usage

    bool isEccEnabled = false;
    const uint8_t parity = 0U;

    Cy_Flash_SetupEccInjection(0x0000FFF0UL, parity);
    Cy_Flash_EnableEccInjection();
    /* Inject ECC error here */

    /* Check if ECC error because of injection or because of real error */
    isEccEnabled = Cy_Flash_IsEccInjectionEnabled();

    Cy_Flash_DisableEccInjection();