Macros | |
| #define | CY_DSADC_OCD0_INTR_TRIGGER (PACSS_MMIO_INTR_OCD0_TRIGGER_Msk) |
| Interrupt OCD masks. More... | |
| #define | CY_DSADC_OCD0_INTR_UNFILTERED (PACSS_MMIO_INTR_OCD0_UNFILTERED_Msk) |
| Enable unfiltered interrupt for OCD0. | |
| #define | CY_DSADC_OCD0_INTR_FAULT (PACSS_MMIO_INTR_OCD0_FAULT_Msk) |
| Enable fault interrupt for OCD0. | |
| #define | CY_DSADC_OCD1_INTR_TRIGGER (PACSS_MMIO_INTR_OCD1_TRIGGER_Msk) |
| Enable trigger interrupt for OCD1. | |
| #define | CY_DSADC_OCD1_INTR_UNFILTERED (PACSS_MMIO_INTR_OCD1_UNFILTERED_Msk) |
| Enable unfiltered interrupt for OCD1. | |
| #define | CY_DSADC_OCD1_INTR_FAULT (PACSS_MMIO_INTR_OCD1_FAULT_Msk) |
| Enable fault interrupt for OCD1. | |
| #define | CY_DSADC_OCD_INTR_MASK |
| Combined interrupt OCD mask. More... | |
| #define CY_DSADC_OCD0_INTR_TRIGGER (PACSS_MMIO_INTR_OCD0_TRIGGER_Msk) |
Interrupt OCD masks.
Enable trigger interrupt for OCD0
| #define CY_DSADC_OCD_INTR_MASK |
Combined interrupt OCD mask.