Description

Configuration structure of the SAR2 HW block.

Data Fields
uint8_t	preconditionTime
	The number of ADC clock cycles when Preconditioning is done before the sample window starts. More...

uint8_t	powerupTime
	The number of cycles to wait for power up after IDLE_PWRDWN. More...

bool	enableIdlePowerDown
	When idle automatically power is down, the analog if true. More...

cy_en_sar2_msb_stretch_mode_t	msbStretchMode
	When the set uses 2 cycles for the Most Significant Bit (MSB), see cy_en_sar2_msb_stretch_mode_t.

bool	enableHalfLsbConv
	When true takes an extra cycle to convert the half LSB and add it to the 12-bit result for Missing Code Recovery.

bool	sarMuxEnable
	Enable the SARMUX (only valid if sarIpEnable = true). More...

bool	adcEnable
	Enable the SAR ADC and SAR sequencer (only valid if sarIpEnable = true). More...

bool	sarIpEnable
	Enable the SAR IP. More...

cy_stc_sar2_channel_config_t *	channelConfig [CY_SAR2_NUM_CHANNELS]
	Channel configuration pointer array. More...

Field Documentation

uint8_t cy_stc_sar2_config_t::preconditionTime

The number of ADC clock cycles when Preconditioning is done before the sample window starts.

uint8_t cy_stc_sar2_config_t::powerupTime

The number of cycles to wait for power up after IDLE_PWRDWN.

bool cy_stc_sar2_config_t::enableIdlePowerDown

When idle automatically power is down, the analog if true.

bool cy_stc_sar2_config_t::sarMuxEnable

Enable the SARMUX (only valid if sarIpEnable = true).

bool cy_stc_sar2_config_t::adcEnable

Enable the SAR ADC and SAR sequencer (only valid if sarIpEnable = true).

bool cy_stc_sar2_config_t::sarIpEnable

Enable the SAR IP.

Channel configuration pointer array.