MTB CAT1 Peripheral driver library
API Reference
Startup CAT1B
Startup

General Description

Provides device startup, system configuration, and linker script files.

The system startup provides the followings features:

Configuration Considerations

Device Memory Definition

Allocation of different types of memory such as the ROM, flash and RAM etc. for the CPU is defined by the linker scripts.

Note
The linker files provided with the PDL are generic and handle all common use cases. Your project may not use every section defined in the linker files. In that case you may see warnings during the build process. To eliminate build warnings in your project, you can simply comment out or remove the relevant code in the linker file.

For CYW20829

ARM GCC
The ROM, flash and RAM sections for the CPU are defined in the linker file: 'cyw20829_ns_flash_cbus.ld', where 'ns' indicates that the linker script file is for non-secure image. For devices without security extension, there will be only one linker file and it is always non-secure.

Memory sections are for the GNU GCC ARM tool set is defined in the linker file cyw20829_ns_flash_cbus.ld. Following are the important memory sections for the User/Application image.

Memory sections are for the GNU GCC ARM tool set is defined in the linker file <device>_ns.sct. Following are the important memory sections for the User/Application image.

code (rx) : ORIGIN = CODE_VMA, LENGTH = CODE_BS_SIZE Starting address and the size of Non-secure bootstrap code
bsData (rwx) : ORIGIN = DATA_BS_VMA, LENGTH = DATA_BS_SIZE Starting address and the size of Non-secure bootstrap data
appCodeRam (rx) : ORIGIN = DATA_CBUS_VMA, LENGTH = DATA_SIZE Starting address and the size of Non-secure application ram functions
data (rwx) : ORIGIN = DATA_VMA, LENGTH = DATA_SIZE Starting address and the size of Non-secure application data
xip (rx) : ORIGIN = XIP_VMA, LENGTH = XIP_SIZE Starting address and the size of Non-secure application code
Note
In CYW20829, the Bootstrap memory is used to place the startup code along with SMIF driver in the ram area. The size requirement for Bootstrap may vary depending on the number of functions that are linked from SMIF driver. When more functions are linked, you may see linker error. In order to fix this you need to increase Bootstarp memory size in the ram by modifying the value of BOOTSTRAP_OFFSET_RAM.
E.g. if linker error suggests to increase by 8192 bytes, then you need to move the starting address of the bootstrap memory up by 8192 bytes as shown below
BOOTSTRAP_OFFSET_RAM = 0x0001E000; Old value
BOOTSTRAP_OFFSET_RAM = 0x0001C000; New value
Because of the change in the bootstrap size, you may also need to move the application start address in the flash. If you see a linker error after above change, then you need to modify the application code offset APPCODE_OFFSET_FLASH in the flash.
E.g. if linker error suggests 256 bytes overlap of .appText LMA with .bootstrapText LMA, you need to move the application start offset in the flash down by 256 bytes as shown below
APPCODE_OFFSET_FLASH = 0x00002200; Old value
APPCODE_OFFSET_FLASH = 0x00002300; New value

ARM Compiler
The ROM, flash and RAM sections for the CPU are defined in the linker file: 'cyw20829_ns_flash_cbus.sct', where 'ns' indicates that the linker script file is for non-secure image. For devices without security extension, there will be only one linker file and it is always non-secure.

Memory sections are for the GNU GCC ARM tool set is defined in the linker file cyw20829_ns_flash_cbus.sct. Following are the important memory sections for the User/Application image.

bootstrapText_vma Starting address of bootstrap code
bootstrapText_size Size of memory reserved for Bootstrap code
bootstrapData_vma Starting address of Bootstrap data
appText_vma Stating address of application code
appData_vma Stating address of application data

IAR
The ROM, flash and RAM sections for the CPU are defined in the linker file: 'cyw20829_ns_flash_cbus.icf', where 'ns' indicates that the linker script file is for non-secure image. For devices without security extension, there will be only one linker file and it is always non-secure.

Memory sections are for the GNU GCC ARM tool set is defined in the linker file cyw20829_ns_flash_cbus.icf. Following are the important memory sections for the User/Application image.

define region CODE_region = mem:[from CODE_VMA size CODE_BS_SIZE]; Bootstrap code region and size
define region DATA_BS_region = mem:[from DATA_BS_VMA size DATA_BS_SIZE]; Bootstrap data region and size
define region DATA_region = mem:[from DATA_VMA size DATA_SIZE]; Application data region and size
define region XIP_region = mem:[from XIP_VMA size XIP_SIZE]; Application code (xip) region and size

Device Initialization

CM33 Without ARM TrustZone Support:
Below MSC describes the simplified startup sequence starting from reset release of the core. As soon as the reset is released, the execution starts form the ROM interrupt vector table reset vector. The ROM code initializes the basic clock needed to access and configure MMIO registers and then sets up debug port so that the debugger can be attached. After it finishes all the necessary initialization, it reads the bootstrap (part of non secure application image) location, size from TOC2 header and loads the bootstrap code into SRAM.

Before switching execution to the non-secure application code, the ROM code needs to initialize the stack pointer MSP_NS for the non-secure code. This value is picked form the first entry in the non-secure bootstrap's vector table __ns_vector_table. Once the non-secure stack is initialized, the ROM code will call the non-secure code entry point which is nothing but the Reset_Handler. Address of this function is picked form the second entry in the non-secure vector table __ns_vector_table and type casting it to function pointer.

In the non-secure Reset_Handler, the vector table is copied to RAM area and then the address of the vector table is set to VTOR register. This calls SystemInit function which internally calls Cy_PDL_Init, Cy_SystemInit and SystemCoreClockUpdate functions. Then it calls C runtime initialization function which calls main function of the application code.

Below sequence diagram captures the initialization process in the startup code.

cm33_ns_startup.png

Heap and Stack Configuration

By default, the stack size is set to 0x00001000 and the entire remaining ram is used for the heap

ARM GCC

Note
Correct operation of malloc and related functions depends on the working implementation of the 'sbrk' function. Newlib-nano (default C runtime library used by the GNU Arm Embedded toolchain) provides weak 'sbrk' implementation that doesn't check for heap and stack collisions during excessive memory allocations. To ensure the heap always remains within the range defined by __HeapBase and __HeapLimit linker symbols, provide a strong override for the 'sbrk' function:
void * _sbrk(uint32_t incr)
{
extern uint8_t __HeapBase, __HeapLimit;
static uint8_t *heapBrk = &__HeapBase;
uint8_t *prevBrk = heapBrk;
if (incr > (uint32_t)(&__HeapLimit - heapBrk))
{
errno = ENOMEM;
CY_HALT();
}
heapBrk += incr;
return prevBrk;
}
For FreeRTOS-enabled multi-threaded applications, it is sufficient to include clib-support library that provides newlib-compatible implementations of 'sbrk', '__malloc_lock' and '__malloc_unlock':
https://github.com/Infineon/clib-support.

ARM Compiler

IAR

Default Interrupt Handlers Definition

The default interrupt handler functions are dummy handler in the startup file.
Below is the default handler for the non-secure interrupts:

interrupt_type void InterruptHandler(void) {
while(1);
}

Vectors Table Copy from ROM/Flash to RAM

This process uses memory sections defined in the linker script. The startup code copies the default vector table contents to the non-secure SRAM region specified by the linker script. APIs are provided in the sysint driver to hook user implemented handler replacing the default handler for the corresponding interrupt.

Following tables provide the address of the default and non-secure SRAM interrupt vector table for different supported compilers.

ARM GCC

The linker script file is 'cyw20829_ns_flash_cbus.ld'. For non-secure world, it uses the following variable.
Copy interrupt vectors from ROM/flash to RAM:
From:

__ns_vector_table

To:

__ns_vector_table_rw

The vector table address (and the vector table itself) are defined in the ns_start_<device>.c startup file corresponding to non-secure world. The code in these files copies the vector table from ROM/Flash to RAM.

ARM Compiler

The linker script file is 'cyw20829_ns_flash_cbus.sct'. For non-secure world, it uses the following variable.
Copy interrupt vectors from ROM/flash to RAM:
From:

__ns_vector_table

To:

__ns_vector_table_rw

The vector table address (and the vector table itself) are defined in the ns_start_<device>.c startup file corresponding to non-secure world. The code in these files copies the vector table from ROM/Flash to RAM.

IAR

The linker script file is 'cyw20829_ns_flash_cbus.icf'. For non-secure world, it uses the following variable.
Copy interrupt vectors from ROM/flash to RAM:
From:

__ns_vector_table

To:

__ns_vector_table_rw

The vector table address (and the vector table itself) are defined in the ns_start_<device>.c startup file corresponding to non-secure worlds. The code in these files copies the vector table from ROM/Flash to RAM.

Changelog

Version Changes Reason for Change
1.2 Added new internal functions. Added support for DSRAM Setup for CAT1B devices.
1.1 Restructured documentation and internal function behaviour. User experience enhancement.
1.0 Initial version

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