Enumerated Types

General Description

Enumerations
enum	cy_en_sysanalog_status_t {   CY_SYSANALOG_SUCCESS = 0x00UL,   CY_SYSANALOG_BAD_PARAM = CY_SYSANALOG_ID | CY_PDL_STATUS_ERROR | 0x01UL,   CY_SYSANALOG_UNSUPPORTED = CY_SYSANALOG_ID | CY_PDL_STATUS_ERROR | 0x02UL }
	The AREF status/error code definitions. More...
enum	cy_en_sysanalog_vref_source_t {   CY_SYSANALOG_VREF_SOURCE_SRSS = 0UL,   CY_SYSANALOG_VREF_SOURCE_LOCAL_1_2V = 1UL << PASS_AREF_AREF_CTRL_VREF_SEL_Pos,   CY_SYSANALOG_VREF_SOURCE_EXTERNAL = 2UL << PASS_AREF_AREF_CTRL_VREF_SEL_Pos }
	AREF voltage reference sources. More...
enum	cy_en_sysanalog_iztat_source_t {   CY_SYSANALOG_IZTAT_SOURCE_SRSS = 0UL,   CY_SYSANALOG_IZTAT_SOURCE_LOCAL = 1UL << PASS_AREF_AREF_CTRL_IZTAT_SEL_Pos }
	AREF IZTAT sources. More...
enum	cy_en_sysanalog_deep_sleep_t {   CY_SYSANALOG_DEEPSLEEP_DISABLE = 0UL,   CY_SYSANALOG_DEEPSLEEP_IPTAT_1,   CY_SYSANALOG_DEEPSLEEP_IPTAT_2,   CY_SYSANALOG_DEEPSLEEP_IPTAT_IZTAT_VREF }
	AREF Deep Sleep mode. More...
enum	cy_en_sysanalog_intr_cause_t {   CY_SYSANALOG_INTR_CAUSE_CTB0 = PASS_INTR_CAUSE_CTB0_INT_Msk,   CY_SYSANALOG_INTR_CAUSE_CTB1 = PASS_INTR_CAUSE_CTB1_INT_Msk,   CY_SYSANALOG_INTR_CAUSE_CTB2 = PASS_INTR_CAUSE_CTB2_INT_Msk,   CY_SYSANALOG_INTR_CAUSE_CTB3 = PASS_INTR_CAUSE_CTB3_INT_Msk,   CY_SYSANALOG_INTR_CAUSE_CTDAC0 = PASS_INTR_CAUSE_CTDAC0_INT_Msk,   CY_SYSANALOG_INTR_CAUSE_CTDAC1 = PASS_INTR_CAUSE_CTDAC1_INT_Msk,   CY_SYSANALOG_INTR_CAUSE_CTDAC2 = PASS_INTR_CAUSE_CTDAC2_INT_Msk,   CY_SYSANALOG_INTR_CAUSE_CTDAC3 = PASS_INTR_CAUSE_CTDAC3_INT_Msk,   CY_SYSANALOG_INTR_CAUSE_SAR0 = PASS_V2_INTR_CAUSE_SAR0_INT_Msk,   CY_SYSANALOG_INTR_CAUSE_SAR1 = PASS_V2_INTR_CAUSE_SAR1_INT_Msk,   CY_SYSANALOG_INTR_CAUSE_SAR2 = PASS_V2_INTR_CAUSE_SAR2_INT_Msk,   CY_SYSANALOG_INTR_CAUSE_SAR3 = PASS_V2_INTR_CAUSE_SAR3_INT_Msk,   CY_SYSANALOG_INTR_CAUSE_FIFO0 = PASS_V2_INTR_CAUSE_FIFO0_INT_Msk,   CY_SYSANALOG_INTR_CAUSE_FIFO1 = PASS_V2_INTR_CAUSE_FIFO1_INT_Msk,   CY_SYSANALOG_INTR_CAUSE_FIFO2 = PASS_V2_INTR_CAUSE_FIFO2_INT_Msk,   CY_SYSANALOG_INTR_CAUSE_FIFO3 = PASS_V2_INTR_CAUSE_FIFO3_INT_Msk }
	Interrupt cause sources. More...
enum	cy_en_sysanalog_deep_sleep_clock_sel_t {   CY_SYSANALOG_DEEPSLEEP_SRC_LPOSC = 0UL,   CY_SYSANALOG_DEEPSLEEP_SRC_CLK_MF = 1UL }
	Deep Sleep Clock selection. More...
enum	cy_en_sysanalog_deep_sleep_clock_div_t {   CY_SYSANALOG_DEEPSLEEP_CLK_NO_DIV = 0UL,   CY_SYSANALOG_DEEPSLEEP_CLK_DIV_BY_2 = 1UL,   CY_SYSANALOG_DEEPSLEEP_CLK_DIV_BY_4 = 2UL,   CY_SYSANALOG_DEEPSLEEP_CLK_DIV_BY_8 = 3UL,   CY_SYSANALOG_DEEPSLEEP_CLK_DIV_BY_16 = 4UL }
	Deep Sleep clock divider. More...
enum	cy_en_sysanalog_lposc_deep_sleep_mode_t {   CY_SYSANALOG_LPOSC_DUTY_CYCLED = 0UL,   CY_SYSANALOG_LPOSC_ALWAYS_ON = 1UL }
	Low Power Oscillator (LPOSC) modes. More...
enum	cy_en_sysanalog_timer_clock_t {   CY_SYSANALOG_TIMER_CLK_PERI = 0UL,   CY_SYSANALOG_TIMER_CLK_DEEPSLEEP = 1UL,   CY_SYSANALOG_TIMER_CLK_LF = 2UL }
	Timer clock. More...

Enumeration Type Documentation

cy_en_sysanalog_status_t

enum cy_en_sysanalog_status_t

The AREF status/error code definitions.

Enumerator
CY_SYSANALOG_SUCCESS	Successful.
CY_SYSANALOG_BAD_PARAM	Invalid input parameters.
CY_SYSANALOG_UNSUPPORTED	Unsupported feature.

cy_en_sysanalog_vref_source_t

enum cy_en_sysanalog_vref_source_t

AREF voltage reference sources.

The voltage reference can come from three sources:

• the locally generated 1.2 V reference
• the SRSS which provides a 0.8 V reference (not available in Deep Sleep mode)
• an external device pin

Enumerator
CY_SYSANALOG_VREF_SOURCE_SRSS	Use 0.8 V Vref from SRSS. Low accuracy high noise source that is not intended for analog subsystems.
CY_SYSANALOG_VREF_SOURCE_LOCAL_1_2V	Use locally generated 1.2 V Vref.
CY_SYSANALOG_VREF_SOURCE_EXTERNAL	Use externally supplied Vref.

cy_en_sysanalog_iztat_source_t

enum cy_en_sysanalog_iztat_source_t

AREF IZTAT sources.

The AREF generates a 1 uA "Zero dependency To Absolute Temperature" (IZTAT) current reference that is independent of temperature variations. It can come from one of two sources:

• Local reference (1 uA)
• Reference from the SRSS (250 nA that is gained by 4. Not available in Deep Sleep mode)

Enumerator
CY_SYSANALOG_IZTAT_SOURCE_SRSS	Use 250 nA IZTAT from SRSS and gain by 4 to output 1 uA.
CY_SYSANALOG_IZTAT_SOURCE_LOCAL	Use locally generated 1 uA IZTAT.

cy_en_sysanalog_deep_sleep_t

enum cy_en_sysanalog_deep_sleep_t

AREF Deep Sleep mode.

Configure what part of the AREF block is enabled in Deep Sleep mode.

• Disable AREF IP block
• Enable IPTAT generator for fast wakeup from Deep Sleep mode. IPTAT outputs for CTBs are disabled.
• Enable IPTAT generator and IPTAT outputs for CTB
• Enable all generators and outputs: IPTAT, IZTAT, and VREF

Enumerator
CY_SYSANALOG_DEEPSLEEP_DISABLE	Disable AREF IP block.
CY_SYSANALOG_DEEPSLEEP_IPTAT_1	Enable IPTAT generator for fast wakeup from Deep Sleep mode IPTAT outputs for CTBs are disabled.
CY_SYSANALOG_DEEPSLEEP_IPTAT_2	Enable IPTAT generator and IPTAT outputs for CTB.
CY_SYSANALOG_DEEPSLEEP_IPTAT_IZTAT_VREF	Enable all generators and outputs: IPTAT, IZTAT, and VREF.

cy_en_sysanalog_intr_cause_t

enum cy_en_sysanalog_intr_cause_t

Interrupt cause sources.

Depending on the device, there may be interrupts from these PASS blocks:

1. CTDAC (up to 4 instances)
2. CTB(m) (up to 4 instances)
3. SAR (up to 4 instances)
4. FIFO (up to 4 instances)

A device could potentially have more than one instance of CTB or CTDAC blocks. To find out which instance caused the interrupt, call Cy_SysAnalog_GetIntrCauseExtended and compare the returned result with one of these enum values.

Enumerator
CY_SYSANALOG_INTR_CAUSE_CTB0	Interrupt cause mask for CTB0.
CY_SYSANALOG_INTR_CAUSE_CTB1	Interrupt cause mask for CTB1.
CY_SYSANALOG_INTR_CAUSE_CTB2	Interrupt cause mask for CTB2.
CY_SYSANALOG_INTR_CAUSE_CTB3	Interrupt cause mask for CTB3.
CY_SYSANALOG_INTR_CAUSE_CTDAC0	Interrupt cause mask for CTDAC0.
CY_SYSANALOG_INTR_CAUSE_CTDAC1	Interrupt cause mask for CTDAC1.
CY_SYSANALOG_INTR_CAUSE_CTDAC2	Interrupt cause mask for CTDAC2.
CY_SYSANALOG_INTR_CAUSE_CTDAC3	Interrupt cause mask for CTDAC3.
CY_SYSANALOG_INTR_CAUSE_SAR0	Interrupt cause mask for SAR0. Available only for PASS_ver2.
CY_SYSANALOG_INTR_CAUSE_SAR1	Interrupt cause mask for SAR1. Available only for PASS_ver2.
CY_SYSANALOG_INTR_CAUSE_SAR2	Interrupt cause mask for SAR2. Available only for PASS_ver2.
CY_SYSANALOG_INTR_CAUSE_SAR3	Interrupt cause mask for SAR3. Available only for PASS_ver2.
CY_SYSANALOG_INTR_CAUSE_FIFO0	Interrupt cause mask for FIFO0. Available only for PASS_ver2.
CY_SYSANALOG_INTR_CAUSE_FIFO1	Interrupt cause mask for FIFO1. Available only for PASS_ver2.
CY_SYSANALOG_INTR_CAUSE_FIFO2	Interrupt cause mask for FIFO2. Available only for PASS_ver2.
CY_SYSANALOG_INTR_CAUSE_FIFO3	Interrupt cause mask for FIFO3. Available only for PASS_ver2.

cy_en_sysanalog_deep_sleep_clock_sel_t

enum cy_en_sysanalog_deep_sleep_clock_sel_t

Deep Sleep Clock selection.

Specifies Deep Sleep Clock source:

• DSCLK is set to LPOSC
• DSCLK is set to CLK_MF

Enumerator
CY_SYSANALOG_DEEPSLEEP_SRC_LPOSC	DSCLK is set to LPOSC.
CY_SYSANALOG_DEEPSLEEP_SRC_CLK_MF	DSCLK is set to CLK_MF.

cy_en_sysanalog_deep_sleep_clock_div_t

enum cy_en_sysanalog_deep_sleep_clock_div_t

Deep Sleep clock divider.

Specifies Deep Sleep Clock divider.

• Transparent mode, feed through selected clock source w/o dividing
• Divide selected clock source by 2
• Divide selected clock source by 4
• Divide selected clock source by 8
• Divide selected clock source by 16

Enumerator
CY_SYSANALOG_DEEPSLEEP_CLK_NO_DIV	Transparent mode, feed through selected clock source w/o dividing.
CY_SYSANALOG_DEEPSLEEP_CLK_DIV_BY_2	Divide selected clock source by 2.
CY_SYSANALOG_DEEPSLEEP_CLK_DIV_BY_4	Divide selected clock source by 4.
CY_SYSANALOG_DEEPSLEEP_CLK_DIV_BY_8	Divide selected clock source by 8.
CY_SYSANALOG_DEEPSLEEP_CLK_DIV_BY_16	Divide selected clock source by 16.

cy_en_sysanalog_lposc_deep_sleep_mode_t

enum cy_en_sysanalog_lposc_deep_sleep_mode_t

Low Power Oscillator (LPOSC) modes.

Configures Low Power Oscillator mode in Deep Sleep.

• LPOSC enabled by TIMER trigger
• LPOSC always on in Deep Sleep

Enumerator
CY_SYSANALOG_LPOSC_DUTY_CYCLED	LPOSC enabled by TIMER trigger.
CY_SYSANALOG_LPOSC_ALWAYS_ON	LPOSC always on in Deep Sleep.

cy_en_sysanalog_timer_clock_t

enum cy_en_sysanalog_timer_clock_t

Timer clock.

Enumerator
CY_SYSANALOG_TIMER_CLK_PERI	Timer clocked from CLK_PERI.
CY_SYSANALOG_TIMER_CLK_DEEPSLEEP	Timer clocked from CLK_DPSLP.
CY_SYSANALOG_TIMER_CLK_LF	Timer clocked from CLK_LF.