MTB CAT1 Peripheral driver library
Global Variables

General Description

Variables

uint32_t SystemCoreClock
 For CAT1A: More...
 
uint32_t cy_Hfclk0FreqHz
 Holds the HFClk0 clock frequency. More...
 
uint32_t cy_PeriClkFreqHz
 Holds the PeriClk clock frequency. More...
 

Variable Documentation

◆ SystemCoreClock

uint32_t SystemCoreClock

For CAT1A:

Holds the SlowClk (Cortex®-M0+) or FastClk (Cortex®-M4) system core clock, which is the system clock frequency supplied to the SysTick timer and the processor core clock. This variable implements CMSIS Core global variable. Refer to the CMSIS documentation for more details. This variable can be used by debuggers to query the frequency of the debug timer or to configure the trace clock speed.

Attention
Compilers must be configured to avoid removing this variable in case the application program is not using it. Debugging systems require the variable to be physically present in memory so that it can be examined to configure the debugger.

For CAT1B:

Holds the CLK_HF0 system core clock.

For CAT1C:

Holds the CLK_SLOW(Cortex®-M0+) or CLK_FAST0(Cortex®-M7_0) or CLK_FAST(Cortex®-M7_1) system core clock.

◆ cy_Hfclk0FreqHz

uint32_t cy_Hfclk0FreqHz

Holds the HFClk0 clock frequency.

Updated by SystemCoreClockUpdate().

◆ cy_PeriClkFreqHz

uint32_t cy_PeriClkFreqHz

Holds the PeriClk clock frequency.

Updated by SystemCoreClockUpdate().