UART Receive Statuses

General Description

Macros to check current UART receive status returned by Cy_SCB_UART_GetReceiveStatus function.

Each UART receive status is encoded in a separate bit, therefore multiple bits may be set to indicate the current status.

Macros
#define	CY_SCB_UART_RECEIVE_ACTIVE   (0x01UL)
	The receive operation started by Cy_SCB_UART_Receive is in progress.
#define	CY_SCB_UART_RECEIVE_OVERFLOW   (SCB_INTR_RX_OVERFLOW_Msk)
	The hardware RX FIFO was full and there was an attempt to write to it. More...
#define	CY_SCB_UART_RECEIVE_ERR_FRAME   (SCB_INTR_RX_FRAME_ERROR_Msk)
	The receive hardware detected a frame error, either a start or stop bit error.
#define	CY_SCB_UART_RECEIVE_ERR_PARITY   (SCB_INTR_RX_PARITY_ERROR_Msk)
	The receive hardware detected a parity error.
#define	CY_SCB_UART_RECEIVE_BREAK_DETECT   (SCB_INTR_RX_BREAK_DETECT_Msk)
	The receive hardware detected a break transmission from transmitter.

Macro Definition Documentation

CY_SCB_UART_RECEIVE_OVERFLOW

#define CY_SCB_UART_RECEIVE_OVERFLOW   (SCB_INTR_RX_OVERFLOW_Msk)

The hardware RX FIFO was full and there was an attempt to write to it.

That additional data was dropped.