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MTB CAT1 Peripheral driver library
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MTB CAT1 Peripheral driver library
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This set of enumerations aids in configuring the SAR CTRL register.
Enumerations | |
| enum | cy_en_sar_ctrl_pwr_ctrl_vref_t { CY_SAR_VREF_PWR_100 = 0UL << SAR_CTRL_PWR_CTRL_VREF_Pos, CY_SAR_VREF_PWR_80 = 1UL << SAR_CTRL_PWR_CTRL_VREF_Pos, CY_SAR_VREF_PWR_60 = 2UL << SAR_CTRL_PWR_CTRL_VREF_Pos, CY_SAR_VREF_PWR_50 = 3UL << SAR_CTRL_PWR_CTRL_VREF_Pos, CY_SAR_VREF_PWR_40 = 4UL << SAR_CTRL_PWR_CTRL_VREF_Pos, CY_SAR_VREF_PWR_30 = 5UL << SAR_CTRL_PWR_CTRL_VREF_Pos, CY_SAR_VREF_PWR_20 = 6UL << SAR_CTRL_PWR_CTRL_VREF_Pos, CY_SAR_VREF_PWR_10 = 7UL << SAR_CTRL_PWR_CTRL_VREF_Pos } |
| Reference voltage buffer power mode definitions. More... | |
| enum | cy_en_sar_ctrl_vref_sel_t { CY_SAR_VREF_SEL_BGR = 4UL << SAR_CTRL_VREF_SEL_Pos, CY_SAR_VREF_SEL_EXT = 5UL << SAR_CTRL_VREF_SEL_Pos, CY_SAR_VREF_SEL_VDDA_DIV_2 = 6UL << SAR_CTRL_VREF_SEL_Pos, CY_SAR_VREF_SEL_VDDA = 7UL << SAR_CTRL_VREF_SEL_Pos } |
| Reference voltage selection definitions. More... | |
| enum | cy_en_sar_ctrl_bypass_cap_t { CY_SAR_BYPASS_CAP_DISABLE = 0UL << SAR_CTRL_VREF_BYP_CAP_EN_Pos, CY_SAR_BYPASS_CAP_ENABLE = 1UL << SAR_CTRL_VREF_BYP_CAP_EN_Pos } |
| Vref bypass cap enable. More... | |
| enum | cy_en_sar_ctrl_neg_sel_t { CY_SAR_NEG_SEL_VSSA_KELVIN = 0UL << SAR_CTRL_NEG_SEL_Pos, CY_SAR_NEG_SEL_P1 = 2UL << SAR_CTRL_NEG_SEL_Pos, CY_SAR_NEG_SEL_P3 = 3UL << SAR_CTRL_NEG_SEL_Pos, CY_SAR_NEG_SEL_P5 = 4UL << SAR_CTRL_NEG_SEL_Pos, CY_SAR_NEG_SEL_P7 = 5UL << SAR_CTRL_NEG_SEL_Pos, CY_SAR_NEG_SEL_ACORE = 6UL << SAR_CTRL_NEG_SEL_Pos, CY_SAR_NEG_SEL_VREF = 7UL << SAR_CTRL_NEG_SEL_Pos } |
| Negative terminal (Vminus) selection definitions for single-ended channels. More... | |
| enum | cy_en_sar_ctrl_hw_ctrl_negvref_t { CY_SAR_CTRL_NEGVREF_FW_ONLY = 0UL << SAR_CTRL_SAR_HW_CTRL_NEGVREF_Pos, CY_SAR_CTRL_NEGVREF_HW = 1UL << SAR_CTRL_SAR_HW_CTRL_NEGVREF_Pos } |
| Enable hardware control of the switch between Vref and the Vminus input. More... | |
| enum | cy_en_sar_ctrl_comp_delay_t { CY_SAR_CTRL_COMP_DLY_2P5 = 0UL << SAR_CTRL_COMP_DLY_Pos, CY_SAR_CTRL_COMP_DLY_4 = 1UL << SAR_CTRL_COMP_DLY_Pos, CY_SAR_CTRL_COMP_DLY_10 = 2UL << SAR_CTRL_COMP_DLY_Pos, CY_SAR_CTRL_COMP_DLY_12 = 3UL << SAR_CTRL_COMP_DLY_Pos } |
| Configure the comparator latch delay. More... | |
| enum | cy_en_sar_ctrl_comp_pwr_t { CY_SAR_COMP_PWR_100 = 0UL << SAR_CTRL_COMP_PWR_Pos, CY_SAR_COMP_PWR_80 = 1UL << SAR_CTRL_COMP_PWR_Pos, CY_SAR_COMP_PWR_60 = 2UL << SAR_CTRL_COMP_PWR_Pos, CY_SAR_COMP_PWR_50 = 3UL << SAR_CTRL_COMP_PWR_Pos, CY_SAR_COMP_PWR_40 = 4UL << SAR_CTRL_COMP_PWR_Pos, CY_SAR_COMP_PWR_30 = 5UL << SAR_CTRL_COMP_PWR_Pos, CY_SAR_COMP_PWR_20 = 6UL << SAR_CTRL_COMP_PWR_Pos, CY_SAR_COMP_PWR_10 = 7UL << SAR_CTRL_COMP_PWR_Pos } |
| Configure the comparator power mode. More... | |
| enum | cy_en_sar_ctrl_sarmux_deep_sleep_t { CY_SAR_DEEPSLEEP_SARMUX_OFF = 0UL << SAR_CTRL_DEEPSLEEP_ON_Pos, CY_SAR_DEEPSLEEP_SARMUX_ON = 1UL << SAR_CTRL_DEEPSLEEP_ON_Pos } |
| Enable or disable the SARMUX during Deep Sleep power mode. More... | |
| enum | cy_en_sar_ctrl_sarseq_routing_switches_t { CY_SAR_SARSEQ_SWITCH_ENABLE = 0UL << SAR_CTRL_SWITCH_DISABLE_Pos, CY_SAR_SARSEQ_SWITCH_DISABLE = 1UL << SAR_CTRL_SWITCH_DISABLE_Pos } |
| Enable or disable the SARSEQ control of routing switches. More... | |
Reference voltage selection definitions.
| Enumerator | |
|---|---|
| CY_SAR_VREF_SEL_BGR | System wide bandgap from AREF (Vref buffer on) |
| CY_SAR_VREF_SEL_EXT | External Vref direct from a pin. |
| CY_SAR_VREF_SEL_VDDA_DIV_2 | Vdda/2 (Vref buffer on) |
| CY_SAR_VREF_SEL_VDDA | Vdda. |
Vref bypass cap enable.
When enabled, a bypass capacitor should be connected to the dedicated Vref pin of the device. Refer to the device datasheet for the minimum bypass capacitor value to use.
| Enumerator | |
|---|---|
| CY_SAR_BYPASS_CAP_DISABLE | Disable Vref bypass cap. |
| CY_SAR_BYPASS_CAP_ENABLE | Enable Vref bypass cap. |
Negative terminal (Vminus) selection definitions for single-ended channels.
The Vminus input for single ended channels can be connected to Vref, VSSA, or routed out to an external pin. The options for routing to a pin are through Pin 1, Pin 3, Pin 5, or Pin 7 of the SARMUX dedicated port or an acore wire in AROUTE, if available on the device.
CY_SAR_NEG_SEL_VSSA_KELVIN comes straight from a Vssa pad without any shared branches so as to keep quiet and avoid voltage drops.
Configure the comparator latch delay.
Configure the comparator power mode.