MTB CAT1 Peripheral driver library

General Description

Functions

void Cy_PRA_Init (void)
 Initializes the PRA driver: More...
 
cy_en_pra_status_t Cy_PRA_SendCmd (uint16_t cmd, uint16_t regIndex, uint32_t clearMask, uint32_t setMask)
 Takes the parameters, passes them to the secure Cortex-M0+ via IPC, waits for Cortex-M0+ to finish and reports the status. More...
 
cy_en_pra_pin_prot_type_t Cy_PRA_GetPinProtType (GPIO_PRT_Type *base, uint32_t pinNum)
 Find the matching PORT and PIN number from External clock secure PIN list and returns protection status of the PIN.
 
bool Cy_PRA_IsPortSecure (GPIO_PRT_Type *base)
 Find the matching PORT from External clock secure PIN list and returns protection status of the PORT.
 
uint16_t Cy_PRA_GetPortRegIndex (GPIO_PRT_Type *base, uint16_t subIndex)
 Find the matching PORT and PIN number from External clock secure PIN list and returns port address index. More...
 
uint16_t Cy_PRA_GetHsiomRegIndex (GPIO_PRT_Type *base, uint16_t subIndex)
 Find the matching PORT address from External clock secure PIN list and returns HSIOM port address index. More...
 
cy_en_pra_status_t Cy_PRA_SystemConfig (const cy_stc_pra_system_config_t *devConfig)
 Validates cy_stc_pra_system_config_t and applies the provided settings. More...
 

Function Documentation

◆ Cy_PRA_Init()

void Cy_PRA_Init ( void  )

Initializes the PRA driver:

  • Initializes the register access array with the register addresses (Cortex-M0+)
  • Sets up the IPC communication between CPU cores
  • Checks that the driver versions match on the Cortex-M0+ and Cortex-M4 sides.

Call the function before accessing any protected registers. It is called during a device startup from SystemInit().

◆ Cy_PRA_SendCmd()

cy_en_pra_status_t Cy_PRA_SendCmd ( uint16_t  cmd,
uint16_t  regIndex,
uint32_t  clearMask,
uint32_t  setMask 
)

Takes the parameters, passes them to the secure Cortex-M0+ via IPC, waits for Cortex-M0+ to finish and reports the status.

Parameters
cmdThe command to execute on the secure side. The macros for this parameter are defined in the cy_pra.h file with the CY_PRA_MSG_TYPE_ prefix.
regIndexThe index of the function or register depending on the command parameter. The macros for this parameter are defined in the cy_pra.h file with the CY_PRA_INDX_ prefix.
clearMaskData sent to secure the core.
setMaskAdditional data send to secure the core.
Returns
The command execution status. For the register read command, the read value is returned.

◆ Cy_PRA_GetPortRegIndex()

uint16_t Cy_PRA_GetPortRegIndex ( GPIO_PRT_Type base,
uint16_t  subIndex 
)

Find the matching PORT and PIN number from External clock secure PIN list and returns port address index.

◆ Cy_PRA_GetHsiomRegIndex()

uint16_t Cy_PRA_GetHsiomRegIndex ( GPIO_PRT_Type base,
uint16_t  subIndex 
)

Find the matching PORT address from External clock secure PIN list and returns HSIOM port address index.

◆ Cy_PRA_SystemConfig()

cy_en_pra_status_t Cy_PRA_SystemConfig ( const cy_stc_pra_system_config_t devConfig)

Validates cy_stc_pra_system_config_t and applies the provided settings.

Parameters
devConfigThe device configuration structure initialized with Device Configurator.
Returns
cy_en_pra_status_t
Function Usage
/* Scenario: there is a need to be done in case then PDL is used
* in standalone mode without Board Support Packages
* (that uses Device Configurator utility to provide
* GeneratedSource folder for the initial configuration
* of the device).
*/
{
.powerEnable=true,
.ldoEnable=true,
.pmicEnable=false,
.vBackupVDDDEnable=true,
.ulpEnable=false,
.ecoEnable=false,
.extClkEnable=false,
.iloEnable=true,
.wcoEnable=false,
.fllEnable=false,
.pll0Enable=false,
.pll1Enable=false,
.path0Enable=true,
.path1Enable=false,
.path2Enable=false,
.path3Enable=false,
.path4Enable=false,
.path5Enable=false,
.clkFastEnable=true,
.clkPeriEnable=true,
.clkSlowEnable=true,
.clkHF0Enable=true,
.clkHF1Enable=false,
.clkHF2Enable=false,
.clkHF3Enable=false,
.clkHF4Enable=false,
.clkHF5Enable=false,
.clkPumpEnable=false,
.clkLFEnable=true,
.clkBakEnable=false,
.clkTimerEnable=false,
.clkAltSysTickEnable=false,
.piloEnable=false,
.clkAltHfEnable=false,
.buckVoltage=(cy_en_syspm_buck_voltage1_t)0,
.pwrCurrentModeMin=false,
.ecoFreqHz=0,
.ecoLoad=0,
.ecoEsr=0,
.ecoDriveLevel=0,
.ecoInPort=(GPIO_PRT_Type *)0x0,
.ecoOutPort=(GPIO_PRT_Type *)0x0,
.ecoInPinNum=0,
.ecoOutPinNum=0,
.extClkFreqHz=0,
.extClkPort=(GPIO_PRT_Type *)0x0,
.extClkPinNum=0,
.extClkHsiom=(en_hsiom_sel_t)HSIOM_SEL_GPIO,
.iloHibernateON=true,
.bypassEnable=false,
.wcoInPort=(GPIO_PRT_Type *)0x0,
.wcoOutPort=(GPIO_PRT_Type *)0x0,
.wcoInPinNum=0,
.wcoOutPinNum=0,
.fllOutFreqHz=0,
.fllMult=0,
.fllRefDiv=0,
.enableOutputDiv=false,
.lockTolerance=0,
.igain=0,
.pgain=0,
.settlingCount=0,
.ccoFreq=0,
.pll0OutFreqHz=0,
.pll0FeedbackDiv=0,
.pll0ReferenceDiv=0,
.pll0OutputDiv=0,
.pll0LfMode=false,
.pll1OutFreqHz=0,
.pll1FeedbackDiv=0,
.pll1ReferenceDiv=0,
.pll1OutputDiv=0,
.pll1LfMode=false,
.clkFastDiv=0,
.clkPeriDiv=0,
.clkSlowDiv=0,
.hf0OutFreqMHz=8,
.hf1OutFreqMHz=0,
.hf2OutFreqMHz=0,
.hf3OutFreqMHz=0,
.hf4OutFreqMHz=0,
.hf5OutFreqMHz=0,
.clkTimerDivider=0,
.altHFcLoad=0,
.altHFxtalStartUpTime=0,
.altHFclkFreq=0,
.altHFsysClkDiv=0,
.altHFvoltageReg=0
};
status = CY_PRA_FUNCTION_CALL_RETURN_PARAM(CY_PRA_MSG_TYPE_SYS_CFG_FUNC,
CY_PRA_FUNC_INIT_CYCFG_DEVICE,
&sysConfig);