Macros | |
#define | CY_ADCMIC_FIFO_OVERFLOW (0x01U) |
FIFO overflow status mask. | |
#define | CY_ADCMIC_FIFO_PRG_FULL (0x02U) |
FIFO programmable full status mask. | |
#define | CY_ADCMIC_FIFO_ALMOST_FULL (0x04U) |
FIFO almost full status mask. | |
#define | CY_ADCMIC_FIFO_FULL (0x08U) |
FIFO full status mask. | |
#define | CY_ADCMIC_FIFO_UNDERFLOW (0x10U) |
FIFO underflow status mask. | |
#define | CY_ADCMIC_FIFO_PRG_EMPTY (0x20U) |
FIFO programmable empty status mask. | |
#define | CY_ADCMIC_FIFO_ALMOST_EMPTY (0x40U) |
FIFO almost empty status mask. | |
#define | CY_ADCMIC_FIFO_EMPTY (0x80U) |
FIFO empty status mask. | |