|
| enum | cy_en_adcmic_status_t {
CY_ADCMIC_SUCCESS = 0x00UL,
CY_ADCMIC_BAD_PARAM = CY_ADCMIC_ID | CY_PDL_STATUS_ERROR | 0x01UL,
CY_ADCMIC_TIMEOUT = CY_ADCMIC_ID | CY_PDL_STATUS_ERROR | 0x02UL,
CY_ADCMIC_CONVERSION_NOT_COMPLETE = CY_ADCMIC_ID | CY_PDL_STATUS_INFO | 0x03UL,
CY_ADCMIC_UNKNOWN = CY_ADCMIC_ID | CY_PDL_STATUS_ERROR | 0xFFUL
} |
| | The ADC error codes. More...
|
| |
| enum | cy_en_adcmic_pga_gain_t {
CY_ADCMIC_PGA_GAIN_0 = 0U,
CY_ADCMIC_PGA_GAIN_1 = 1U,
CY_ADCMIC_PGA_GAIN_2 = 2U,
CY_ADCMIC_PGA_GAIN_3 = 3U,
CY_ADCMIC_PGA_GAIN_4 = 4U,
CY_ADCMIC_PGA_GAIN_5 = 5U,
CY_ADCMIC_PGA_GAIN_6 = 6U,
CY_ADCMIC_PGA_GAIN_7 = 7U,
CY_ADCMIC_PGA_GAIN_8 = 8U,
CY_ADCMIC_PGA_GAIN_9 = 9U,
CY_ADCMIC_PGA_GAIN_10 = 10U,
CY_ADCMIC_PGA_GAIN_11 = 11U,
CY_ADCMIC_PGA_GAIN_12 = 12U,
CY_ADCMIC_PGA_GAIN_13 = 13U,
CY_ADCMIC_PGA_GAIN_14 = 14U,
CY_ADCMIC_PGA_GAIN_15 = 15U,
CY_ADCMIC_PGA_GAIN_16 = 16U,
CY_ADCMIC_PGA_GAIN_17 = 17U,
CY_ADCMIC_PGA_GAIN_18 = 18U,
CY_ADCMIC_PGA_GAIN_19 = 19U,
CY_ADCMIC_PGA_GAIN_20 = 20U,
CY_ADCMIC_PGA_GAIN_21 = 21U,
CY_ADCMIC_PGA_GAIN_22 = 22U,
CY_ADCMIC_PGA_GAIN_23 = 23U,
CY_ADCMIC_PGA_GAIN_24 = 24U,
CY_ADCMIC_PGA_GAIN_25 = 25U,
CY_ADCMIC_PGA_GAIN_26 = 26U,
CY_ADCMIC_PGA_GAIN_27 = 27U,
CY_ADCMIC_PGA_GAIN_28 = 28U,
CY_ADCMIC_PGA_GAIN_29 = 29U,
CY_ADCMIC_PGA_GAIN_30 = 30U,
CY_ADCMIC_PGA_GAIN_31 = 31U,
CY_ADCMIC_PGA_GAIN_32 = 32U,
CY_ADCMIC_PGA_GAIN_33 = 33U,
CY_ADCMIC_PGA_GAIN_34 = 34U,
CY_ADCMIC_PGA_GAIN_35 = 35U,
CY_ADCMIC_PGA_GAIN_36 = 36U,
CY_ADCMIC_PGA_GAIN_37 = 37U,
CY_ADCMIC_PGA_GAIN_38 = 38U,
CY_ADCMIC_PGA_GAIN_39 = 39U,
CY_ADCMIC_PGA_GAIN_40 = 40U,
CY_ADCMIC_PGA_GAIN_41 = 41U,
CY_ADCMIC_PGA_GAIN_42 = 42U
} |
| | The PGA gain settings. More...
|
| |
| enum | cy_en_adcmic_mode_t {
CY_ADCMIC_DC = 1U,
CY_ADCMIC_MIC = 3U,
CY_ADCMIC_PDM = 4U
} |
| | The operation mode. More...
|
| |
| enum | cy_en_adcmic_sample_rate_t {
CY_ADCMIC_8KSPS,
CY_ADCMIC_16KSPS
} |
| | The sample rate for MIC and PDM modes. More...
|
| |
| enum | cy_en_adcmic_dc_channel_t {
CY_ADCMIC_REFGND = 0x0FU,
CY_ADCMIC_BGREF = 0x0EU,
CY_ADCMIC_VDDC = 0x0DU,
CY_ADCMIC_VDDIO = 0x0CU,
CY_ADCMIC_GPIO7 = 0x17U,
CY_ADCMIC_GPIO6 = 0x16U,
CY_ADCMIC_GPIO5 = 0x15U,
CY_ADCMIC_GPIO4 = 0x14U,
CY_ADCMIC_GPIO3 = 0x13U,
CY_ADCMIC_GPIO2 = 0x12U,
CY_ADCMIC_GPIO1 = 0x11U,
CY_ADCMIC_GPIO0 = 0x10U
} |
| | The DC channel. More...
|
| |
| enum | cy_en_adcmic_return_mode_t {
CY_ADCMIC_RETURN_STATUS = 0U,
CY_ADCMIC_WAIT_FOR_RESULT = 1U
} |
| | Definitions for the return mode used in Cy_ADCMic_IsEndConversion. More...
|
| |
| enum | cy_en_adcmic_bias_t {
CY_ADCMIC_BIAS_1_12_REF = 0U,
CY_ADCMIC_BIAS_1_14_REF = 1U,
CY_ADCMIC_BIAS_1_17_REF = 2U,
CY_ADCMIC_BIAS_1_10_REF = 3U
} |
| | Definitions for the microphone bias settings. More...
|
| |
| enum | cy_en_adcmic_pga_incm_t {
CY_ADCMIC_INCM_0_4 = 0U,
CY_ADCMIC_INCM_0_45 = 1U,
CY_ADCMIC_INCM_0_35 = 2U
} |
| | Definitions for the PGA input common mode settings. More...
|
| |
| enum | cy_en_adcmic_pga_outcm_t {
CY_ADCMIC_OUTCM_0_6 = 0U,
CY_ADCMIC_OUTCM_0_7 = 1U,
CY_ADCMIC_OUTCM_0_5 = 2U
} |
| | Definitions for the PGA input common mode settings. More...
|
| |
| enum | cy_en_adcmic_dc_range_t {
CY_ADCMIC_DC_RANGE_3_6V = 0U,
CY_ADCMIC_DC_RANGE_1_8V = 1U
} |
| | Definitions for the DC input range settings. More...
|
| |
| enum | cy_en_adcmic_timer_count_input_t {
CY_ADCMIC_TIMER_COUNT_INPUT_CIC_UPDATE = 0U,
CY_ADCMIC_TIMER_COUNT_INPUT_CLK_SYS = 1U
} |
| | Definitions for the timer count input settings. More...
|
| |
