I3C (Improved Inter-Integrated Circuit)

General Description

High level interface for interacting with the Infineon I3C.

The I3C is a MIPI standardized protocol designed to overcome I2C limitations (limited speed, external signals needed for interrupts, no automatic detection of the devices connected to the bus, ...) while remaining power-efficient.

Features

• An industry-standard I3C bus interface
• Supports target, main controller, and secondary controller operation
• SCL frequency up to 12.5MHz (SDR data rate 12.5Mbps, HDR-DDR data rate at 25Mbps)
• In controller mode, number of addressable target devices is 11
• Works in active power mode only

Quick Start

Initialize an I3C instance using the cyhal_i3c_init and provide sda (I3C data) and scl (I3C clock) pins.
By default, this initializes the resource as an I3C controller.
Configure the behavior (controller/secondary controller/target) and the interface (bus frequency, target address) using the cyhal_i3c_configure function.
Attach I2C or I3C targets to the bus using the cyhal_i3c_controller_attach_targets function.

Code Snippets

Snippet 1: Controller: Read or write data from or to I2C(static).

This snippet initializes an I3C resource as controller and read or write data from or to I2C target using static address (7-bit).

Initializing as I3C controller

    // Declare variables
    cy_rslt_t   rslt;
    cyhal_i3c_t i3c_controller_obj;
    cyhal_i3c_device_info_t  dev_list[CYHAL_I3C_MAX_ATTACHED_DEVICES];
 
    // Define frequency
    uint32_t I3C_CONTROLLER_FREQUENCY = 1000000u;
 
    // Define the I3C controller configuration structure
    cyhal_i3c_cfg_t i3c_controller_config =
    {
        CYHAL_I3C_MODE_CONTROLLER,
        CYHAL_I3C_MODE_COMBINED,
        0, // address is not used for controller mode
        I3C_CONTROLLER_FREQUENCY,
        I3C_CONTROLLER_FREQUENCY,
    };
 
    // Initialize I3C controller, set the SDA and SCL pins and assign a new clock
    rslt = cyhal_i3c_init(&i3c_controller_obj, CYBSP_I3C_SDA, CYBSP_I3C_SCL, NULL);
 
    // Configure the I3C resource to be controller
    rslt = cyhal_i3c_configure(&i3c_controller_obj, &i3c_controller_config);
 
    // Declare I2C targets attached to the bus
    // When dynamic address will not use for I2C targets
    dev_list[0].static_address = 0x50;
    dev_list[0].dynamic_address = 0;
    dev_list[0].device_type = CYHAL_I3C_TARGET_TYPE_I2C;
 
    // Configure I2C/I3C targets attached to the bus
    rslt = cyhal_i3c_controller_attach_targets(&i3c_controller_obj, &dev_list[0], 1);
 
    // Perform read/write operations using I2C target's static address
    rslt = cyhal_i3c_controller_write(&i3c_controller_obj, dev_list[0].static_address, &data, size,
                                      timeout);
    rslt = cyhal_i3c_controller_read(&i3c_controller_obj, dev_list[0].static_address, &data, size,
                                     timeout);
 

Snippet 2: Controller: Read or write data from or to I3C(dynamic).

This snippet initializes an I3C resource as controller and read or write data from or to I3C target using dynamic address.

Initializing as I3C controller

    // Declare variables
    cy_rslt_t   rslt;
    cyhal_i3c_t i3c_controller_obj;
    cyhal_i3c_device_info_t  dev_list[CYHAL_I3C_MAX_ATTACHED_DEVICES];
 
    // Define frequency
    uint32_t I3C_CONTROLLER_FREQUENCY = 1000000u;
 
    // Define the I3C controller configuration structure
    cyhal_i3c_cfg_t i3c_controller_config =
    {
        CYHAL_I3C_MODE_CONTROLLER,
        CYHAL_I3C_MODE_COMBINED,
        0, // address is not used for controller mode
        I3C_CONTROLLER_FREQUENCY,
        I3C_CONTROLLER_FREQUENCY,
    };
 
    // Initialize I3C controller, set the SDA and SCL pins and assign a new clock
    rslt = cyhal_i3c_init(&i3c_controller_obj, CYBSP_I3C_SDA, CYBSP_I3C_SCL, NULL);
 
    // Configure the I3C resource to be controller
    rslt = cyhal_i3c_configure(&i3c_controller_obj, &i3c_controller_config);
 
    // Declare I3C targets attached to the bus
    // When dynamic address is set to 0 it will be assigned automatically and updated in this
    // structure
    dev_list[0].static_address = 0x50;
    dev_list[0].dynamic_address = 0;
    dev_list[0].device_type = CYHAL_I3C_TARGET_TYPE_I3C;
 
    // Configure I2C/I3C targets attached to the bus
    rslt = cyhal_i3c_controller_attach_targets(&i3c_controller_obj, &dev_list[0], 1);
 
    // Perform read/write operations using I3C target's dynamic address
    rslt = cyhal_i3c_controller_write(&i3c_controller_obj, dev_list[0].dynamic_address, &data, size,
                                      timeout);
    rslt = cyhal_i3c_controller_read(&i3c_controller_obj, dev_list[0].dynamic_address, &data, size,
                                     timeout);
 

Snippet 3: Use I3C callbacks.

This snippet initializes an I3C resource and describe how to use callbacks.

Initializing as I3C controller

    // Declare variables
    cy_rslt_t   rslt;
    cyhal_i3c_t i3c_target_obj;
 
    // Define the target configuration structure
    cyhal_i3c_cfg_t i3c_target_config =
        { CYHAL_I3C_MODE_TARGET, CYHAL_I3C_MODE_COMBINED, 0x08u, 100000u, 100000u };
 
    // Initialize I2C target, set the SDA and SCL pins and assign a new clock
    rslt = cyhal_i3c_init(&i3c_target_obj, CYBSP_I3C_SDA, CYBSP_I3C_SCL, NULL);
 
    // Configure the I2C resource to be target
    if (CY_RSLT_SUCCESS == rslt)
    {
        rslt = cyhal_i3c_configure(&i3c_target_obj, &i3c_target_config);
    }
 
    if (CY_RSLT_SUCCESS == rslt)
    {
        // Register I3C target event callback
        cyhal_i3c_register_callback(&i3c_target_obj, (cyhal_i3c_event_callback_t)handle_i3c_events,
                                    NULL);
 
        // Enable I3C Events
        cyhal_i3c_enable_event(&i3c_target_obj, (cyhal_i3c_event_t)   \
                               (CYHAL_I3C_TARGET_WR_CMPLT_EVENT \
                                | CYHAL_I3C_TARGET_RD_CMPLT_EVENT \
                                | CYHAL_I3C_TARGET_ERR_EVENT),    \
                               3u, true);
    }
 

API Reference
	Result Codes
	HAL specific return codes definitions for all drivers.

Data Structures
struct	cyhal_i3c_cfg_t
	I3C bus configuration structure. More...
struct	cyhal_i3c_device_info_t
	I3C/I2C device configuration structure. More...

Macros
#define	CYHAL_I3C_MAX_ATTACHED_DEVICES   (CY_I3C_MAX_DEVS)
	Named define for maximum number of the devices attached to the I3C bus.

Typedefs
typedef void(*	cyhal_i3c_event_callback_t) (void *callback_arg, cyhal_i3c_event_t event)
	Handler for I3C Device interrupts.
typedef void(*	cyhal_i3c_ibi_callback_t) (void *callback_arg, cyhal_i3c_ibi_event_t event, uint16_t address)
	Handler for I3C IBI events.

Enumerations
enum	cyhal_i3c_mode_t {   CYHAL_I3C_MODE_TARGET = 0U ,   CYHAL_I3C_MODE_SECONDARY_CONTROLLER = 1U ,   CYHAL_I3C_MODE_CONTROLLER = 2U }
	I3C HAL Operation Modes. More...
enum	cyhal_i3c_bus_mode_t {   CYHAL_I3C_MODE_PURE = 0U ,   CYHAL_I3C_MODE_COMBINED = 1U }
	I3C HAL Bus Modes. More...
enum	cyhal_i3c_target_type_t {   CYHAL_I3C_TARGET_TYPE_I3C = 0U ,   CYHAL_I3C_TARGET_TYPE_I2C = 1U }
	I3C HAL target device types. More...
enum	cyhal_i3c_output_t {   CYHAL_I3C_OUTPUT_TRIGGER_RX_FIFO_LEVEL_REACHED ,   CYHAL_I3C_OUTPUT_TRIGGER_TX_FIFO_LEVEL_REACHED }
	Enum of possible output signals from an I3C. More...
enum	cyhal_i3c_fifo_type_t {   CYHAL_I3C_FIFO_RX ,   CYHAL_I3C_FIFO_TX }
	I3C FIFO type. More...
enum	cyhal_i3c_event_t {   CYHAL_I3C_EVENT_NONE = 0 ,   CYHAL_I3C_TARGET_READ_EVENT = 1 << 1 ,   CYHAL_I3C_TARGET_WRITE_EVENT = 1 << 2 ,   CYHAL_I3C_TARGET_RD_IN_FIFO_EVENT = 1 << 3 ,   CYHAL_I3C_TARGET_RD_BUF_EMPTY_EVENT = 1 << 4 ,   CYHAL_I3C_TARGET_RD_CMPLT_EVENT = 1 << 5 ,   CYHAL_I3C_TARGET_WR_CMPLT_EVENT = 1 << 6 ,   CYHAL_I3C_TARGET_ERR_EVENT = 1 << 7 ,   CYHAL_I3C_CONTROLLER_WR_IN_FIFO_EVENT = 1 << 17 ,   CYHAL_I3C_CONTROLLER_WR_CMPLT_EVENT = 1 << 18 ,   CYHAL_I3C_CONTROLLER_RD_CMPLT_EVENT = 1 << 19 ,   CYHAL_I3C_CONTROLLER_ERR_EVENT = 1 << 20 }
	Enum to enable/disable/report interrupt cause flags. More...
enum	cyhal_i3c_ibi_event_t {   CYHAL_I3C_IBI_NONE = 0 ,   CYHAL_I3C_IBI_HOTJOIN = 1 << 1 ,   CYHAL_I3C_IBI_SIR = 1 << 2 ,   CYHAL_I3C_IBI_CONTROLLER_REQ = 1 << 3 }
	Enum to enable/disable/report interrupt cause flags. More...

Functions
cy_rslt_t	cyhal_i3c_init (cyhal_i3c_t *obj, cyhal_gpio_t sda, cyhal_gpio_t scl, const cyhal_clock_t *clk)
	Initialize the I3C peripheral, and configures its specifieds pins. More...
void	cyhal_i3c_free (cyhal_i3c_t *obj)
	Deinitialize the i3c object. More...
cy_rslt_t	cyhal_i3c_configure (cyhal_i3c_t *obj, const cyhal_i3c_cfg_t *cfg)
	Configure the I3C block. More...
cy_rslt_t	cyhal_i3c_controller_attach_targets (cyhal_i3c_t *obj, cyhal_i3c_device_info_t *dev_list, uint32_t dev_list_size)
	Attach I2C and I3C targets to the bus and assign dynamic addresses for the I3C targets. More...
cy_rslt_t	cyhal_i3c_controller_transfer_async (cyhal_i3c_t *obj, uint16_t address, const void *tx, size_t tx_size, void *rx, size_t rx_size)
	I3C controller asynchronous transfer This function is non blocking. More...
bool	cyhal_i3c_is_busy (cyhal_i3c_t *obj)
	Checks if the specified I3C peripheral is use In use - I3C pheripheral 'actively sending/receiving data'. More...
cy_rslt_t	cyhal_i3c_controller_abort_async (cyhal_i3c_t *obj)
	Abort asynchronous transfer. More...
cy_rslt_t	cyhal_i3c_controller_write (cyhal_i3c_t *obj, uint16_t address, const uint8_t *data, uint16_t size, uint32_t timeout)
	I3C controller blocking write. More...
cy_rslt_t	cyhal_i3c_controller_read (cyhal_i3c_t *obj, uint16_t address, uint8_t *data, uint16_t size, uint32_t timeout)
	I3C controller blocking read. More...
cy_rslt_t	cyhal_i3c_controller_mem_write (cyhal_i3c_t *obj, uint16_t address, uint16_t mem_addr, uint16_t mem_addr_size, const uint8_t *data, uint16_t size, uint32_t timeout)
	Perform an i3c write using a block of data stored at the specified memory location This function is blocking. More...
cy_rslt_t	cyhal_i3c_controller_mem_read (cyhal_i3c_t *obj, uint16_t address, uint16_t mem_addr, uint16_t mem_addr_size, uint8_t *data, uint16_t size, uint32_t timeout)
	Perform an i3c read using a block of data stored at the specified memory location This function is blocking. More...
cy_rslt_t	cyhal_i3c_target_config_write_buffer (cyhal_i3c_t *obj, const uint8_t *data, uint16_t size)
	I3C target config write buffer The user needs to setup a new buffer every time (i.e. More...
cy_rslt_t	cyhal_i3c_target_config_read_buffer (cyhal_i3c_t *obj, uint8_t *data, uint16_t size)
	I3C target config read buffer The user needs to setup a new buffer every time (i.e. More...
void	cyhal_i3c_register_callback (cyhal_i3c_t *obj, cyhal_i3c_event_callback_t callback, void *callback_arg)
	The I3C event callback handler registration. More...
void	cyhal_i3c_register_ibi_callback (cyhal_i3c_t *obj, cyhal_i3c_ibi_callback_t callback, void *callback_arg)
	The I3C IBI callback handler registration. More...
void	cyhal_i3c_enable_event (cyhal_i3c_t *obj, cyhal_i3c_event_t event, uint8_t intr_priority, bool enable)
	Configure and Enable or Disable I3C Interrupt. More...
void	cyhal_i3c_enable_ibi_event (cyhal_i3c_t *obj, cyhal_i3c_ibi_event_t event, uint8_t intr_priority, bool enable)
	Configure and Enable or Disable I3C Interrupt. More...
cy_rslt_t	cyhal_i3c_set_fifo_level (cyhal_i3c_t *obj, cyhal_i3c_fifo_type_t type, uint16_t level)
	Sets a threshold level for a FIFO that will generate an interrupt and a trigger output. More...
cy_rslt_t	cyhal_i3c_enable_output (cyhal_i3c_t *obj, cyhal_i3c_output_t output, cyhal_source_t *source)
	Enables the specified output signal from an I3C. More...
cy_rslt_t	cyhal_i3c_disable_output (cyhal_i3c_t *obj, cyhal_i3c_output_t output)
	Disables the specified output signal from an I3C. More...
cy_rslt_t	cyhal_i3c_init_cfg (cyhal_i3c_t *obj, const cyhal_i3c_configurator_t *cfg)
	Initialize the I3C peripheral using a configurator generated configuration struct. More...
uint32_t	cyhal_i3c_target_readable (cyhal_i3c_t *obj)
	Returns the number of bytes written by the I3C controller. More...
uint32_t	cyhal_i3c_target_writable (cyhal_i3c_t *obj)
	Returns the number of bytes can be read by the I3C controller. More...

---

Data Structure Documentation

cyhal_i3c_cfg_t

struct cyhal_i3c_cfg_t

Data Fields
cyhal_i3c_mode_t	i3c_mode	Specifies the mode of I3C controller operation: Controller, Target or Secondary Controller.
cyhal_i3c_bus_mode_t	i3c_bus_mode	Specifies the mode of I3C bus: Pure or Combined.
uint8_t	target_address	Desired static address for I3C target device.
uint32_t	i2c_data_rate	The desired I2C data Rate in Hz.
uint32_t	i3c_data_rate	The desired I3C data Rate in Hz.

cyhal_i3c_device_info_t

struct cyhal_i3c_device_info_t

Data Fields
uint8_t	static_address	The device 7-bit static address.
uint8_t	dynamic_address	The desired device 7-bit dynamic address.
cyhal_i3c_target_type_t	device_type	Device type: I3C or I2C.

Enumeration Type Documentation

cyhal_i3c_mode_t

enum cyhal_i3c_mode_t

I3C HAL Operation Modes.

Enumerator
CYHAL_I3C_MODE_TARGET	Configures I3C for Target operation.
CYHAL_I3C_MODE_SECONDARY_CONTROLLER	Configures I3C for Secondary Controller-Target operation.
CYHAL_I3C_MODE_CONTROLLER	Configures I3C for Main Controller operation.

cyhal_i3c_bus_mode_t

enum cyhal_i3c_bus_mode_t

I3C HAL Bus Modes.

Enumerator
CYHAL_I3C_MODE_PURE	Indicates only I3C devices are connected to the bus.
CYHAL_I3C_MODE_COMBINED	Indicates I2C and I3C devices are present on the bus.

cyhal_i3c_target_type_t

enum cyhal_i3c_target_type_t

I3C HAL target device types.

Enumerator
CYHAL_I3C_TARGET_TYPE_I3C	Indicates target device is I3C.
CYHAL_I3C_TARGET_TYPE_I2C	Indicates target device is I2C.

cyhal_i3c_output_t

enum cyhal_i3c_output_t

Enum of possible output signals from an I3C.

Enumerator
CYHAL_I3C_OUTPUT_TRIGGER_RX_FIFO_LEVEL_REACHED	Output the RX FIFO signal which is triggered when the receive FIFO has more entries than the configured level.
CYHAL_I3C_OUTPUT_TRIGGER_TX_FIFO_LEVEL_REACHED	Output the TX FIFO signal which is triggered when the transmit FIFO has more empty locations than the configured level.

cyhal_i3c_fifo_type_t

enum cyhal_i3c_fifo_type_t

I3C FIFO type.

Enumerator
CYHAL_I3C_FIFO_RX	Set RX FIFO level.
CYHAL_I3C_FIFO_TX	Set TX FIFO level.

cyhal_i3c_event_t

enum cyhal_i3c_event_t

Enum to enable/disable/report interrupt cause flags.

Enumerator
CYHAL_I3C_EVENT_NONE	No event.
CYHAL_I3C_TARGET_READ_EVENT	Indicates that the target was addressed and the controller wants to read data.
CYHAL_I3C_TARGET_WRITE_EVENT	Indicates that the target was addressed and the controller wants to write data.
CYHAL_I3C_TARGET_RD_IN_FIFO_EVENT	All target data from the configured Read buffer has been loaded into the TX FIFO.
CYHAL_I3C_TARGET_RD_BUF_EMPTY_EVENT	The controller has read all data out of the configured Read buffer.
CYHAL_I3C_TARGET_RD_CMPLT_EVENT	Indicates the controller completed reading from the target (set by the controller NAK or Stop)
CYHAL_I3C_TARGET_WR_CMPLT_EVENT	Indicates the controller completed writing to the target (set by the controller Stop or Restart)
CYHAL_I3C_TARGET_ERR_EVENT	Indicates the I3C hardware detected an error.
CYHAL_I3C_CONTROLLER_WR_IN_FIFO_EVENT	All data has been loaded into the TX FIFO.
CYHAL_I3C_CONTROLLER_WR_CMPLT_EVENT	The controller write is complete.
CYHAL_I3C_CONTROLLER_RD_CMPLT_EVENT	The controller read is complete.
CYHAL_I3C_CONTROLLER_ERR_EVENT	Indicates the I3C hardware has detected an error.

cyhal_i3c_ibi_event_t

enum cyhal_i3c_ibi_event_t

Enum to enable/disable/report interrupt cause flags.

Enumerator
CYHAL_I3C_IBI_NONE	No event.
CYHAL_I3C_IBI_HOTJOIN	IBI Hot join Request
CYHAL_I3C_IBI_SIR	IBI Target Interrupt Request.
CYHAL_I3C_IBI_CONTROLLER_REQ	IBI Controller ownership Request.

Function Documentation

cyhal_i3c_init()

cy_rslt_t cyhal_i3c_init	(	cyhal_i3c_t *	obj,
		cyhal_gpio_t	sda,
		cyhal_gpio_t	scl,
		const cyhal_clock_t *	clk
	)

Initialize the I3C peripheral, and configures its specifieds pins.

NOTE: Controller/Target specific functions only work when the block is configured to be in that mode. Use cyhal_i3c_configure() function to change settings after initialized.

Parameters

[out]	obj	The I3C object
[in]	sda	The sda pin
[in]	scl	The scl pin
[in]	clk	The clock to use can be shared, if not provided a new clock will be allocated

Returns

The status of the init request

cyhal_i3c_free()

void cyhal_i3c_free

(

cyhal_i3c_t *

obj

)

Deinitialize the i3c object.

Parameters

[in,out]

obj

The i3c object

cyhal_i3c_configure()

cy_rslt_t cyhal_i3c_configure	(	cyhal_i3c_t *	obj,
		const cyhal_i3c_cfg_t *	cfg
	)

Configure the I3C block.

Apply user defined configuration. Refer to cyhal_i3c_cfg_t for details. Call only after succesfull cyhal_i3c_init()

Parameters

[in]	obj	The I3C object
[in]	cfg	Configuration settings to apply

Returns

The status of the configure request

cyhal_i3c_controller_attach_targets()

cy_rslt_t cyhal_i3c_controller_attach_targets	(	cyhal_i3c_t *	obj,
		cyhal_i3c_device_info_t *	dev_list,
		uint32_t	dev_list_size
	)

Attach I2C and I3C targets to the bus and assign dynamic addresses for the I3C targets.

Parameters

[in]	obj	The I3C object
[in]	dev_list	The array with I2C and I3C targets configurations
[in]	dev_list_size	The size of dev_list array

Returns

The status of the request

cyhal_i3c_controller_transfer_async()

cy_rslt_t cyhal_i3c_controller_transfer_async	(	cyhal_i3c_t *	obj,
		uint16_t	address,
		const void *	tx,
		size_t	tx_size,
		void *	rx,
		size_t	rx_size
	)

I3C controller asynchronous transfer This function is non blocking.

Use cyhal_i3c_is_busy() API to check status. Execution flow is:

1. If tx_size and rx_size are equal zero or NULL - return error CYHAL_I3C_RSLT_ERR_TX_RX_BUFFERS_ARE_EMPTY
2. If tx_size or rx_size is equal zero or NULL - do separate write or read operation.
3. If tx_size and rx_size are non zero - do write operation, wait for busy clear event and do read operation. When a write transaction is completed (requested number of bytes are written or error occurred)the busy status is cleared and the CYHAL_I3C_CONTROLLER_WR_CMPLT_EVENT event is generated.

When a read transaction is completed (requested number of bytes are read or error occurred) the busy status is cleared and the CYHAL_I3C_CONTROLLER_RD_CMPLT_EVENT event is generated.

Parameters

[in]	obj	The I3C object
[in]	address	device address (7-bit)
[in]	tx	Pointer to the byte-array of the transmit buffer
[in]	tx_size	The number of bytes to transmit
[out]	rx	Pointer to the byte-array of the receive buffer
[in]	rx_size	The number of bytes to receive

Returns

The status of the controller_transfer_async request

cyhal_i3c_is_busy()

bool cyhal_i3c_is_busy

(

cyhal_i3c_t *

obj

)

Checks if the specified I3C peripheral is use In use - I3C pheripheral 'actively sending/receiving data'.

Parameters

[in]

obj

The I3C peripheral to check

Returns

Indication of whether the I3C is still transmitting

cyhal_i3c_controller_abort_async()

cy_rslt_t cyhal_i3c_controller_abort_async

(

cyhal_i3c_t *

obj

)

Abort asynchronous transfer.

This function does not perform any check - that should happen in upper layers.

Parameters

[in]

obj

The I3C object

Returns

The status of the abort_async request

cyhal_i3c_controller_write()

cy_rslt_t cyhal_i3c_controller_write	(	cyhal_i3c_t *	obj,
		uint16_t	address,
		const uint8_t *	data,
		uint16_t	size,
		uint32_t	timeout
	)

I3C controller blocking write.

This will write size bytes of data from the buffer pointed to by data. It will not return until either all of the data has been written, or the timeout has elapsed.

Parameters

[in]	obj	The I3C object
[in]	address	device address (7-bit)
[in]	data	Pointer to the byte-array of data send to the target device
[in]	size	i3c send data size
[in]	timeout	timeout in milisecond, set this value to 0 if you want to wait forever

Returns

The status of the controller_write request

cyhal_i3c_controller_read()

cy_rslt_t cyhal_i3c_controller_read	(	cyhal_i3c_t *	obj,
		uint16_t	address,
		uint8_t *	data,
		uint16_t	size,
		uint32_t	timeout
	)

I3C controller blocking read.

This will read size bytes of data into the buffer pointed to by data. It will not return until either all of the data has been read, or the timeout has elapsed.

Parameters

[in]	obj	The I3C object
[in]	address	device address (7-bit)
[out]	data	Pointer to the byte-array of data receive from the target device
[in]	size	i3c receive data size
[in]	timeout	timeout in milisecond, set this value to 0 if you want to wait forever

Returns

The status of the controller_read request

cyhal_i3c_controller_mem_write()

cy_rslt_t cyhal_i3c_controller_mem_write	(	cyhal_i3c_t *	obj,
		uint16_t	address,
		uint16_t	mem_addr,
		uint16_t	mem_addr_size,
		const uint8_t *	data,
		uint16_t	size,
		uint32_t	timeout
	)

Perform an i3c write using a block of data stored at the specified memory location This function is blocking.

Parameters

[in]	obj	The I3C object
[in]	address	device address (7-bit)
[in]	mem_addr	mem address to store the written data
[in]	mem_addr_size	number of bytes in the mem address
[in]	data	Pointer to the byte-array of data send to the target device
[in]	size	i3c controller send data size
[in]	timeout	timeout in milisecond, set this value to 0 if you want to wait forever

Returns

The status of the write request

cyhal_i3c_controller_mem_read()

cy_rslt_t cyhal_i3c_controller_mem_read	(	cyhal_i3c_t *	obj,
		uint16_t	address,
		uint16_t	mem_addr,
		uint16_t	mem_addr_size,
		uint8_t *	data,
		uint16_t	size,
		uint32_t	timeout
	)

Perform an i3c read using a block of data stored at the specified memory location This function is blocking.

Parameters

[in]	obj	The I3C object
[in]	address	device address (7-bit)
[in]	mem_addr	mem address to store the written data
[in]	mem_addr_size	number of bytes in the mem address
[out]	data	Pointer to the byte-array of data receive from the target device
[in]	size	i3c controller send data size
[in]	timeout	timeout in milisecond, set this value to 0 if you want to wait forever

Returns

The status of the read request

cyhal_i3c_target_config_write_buffer()

cy_rslt_t cyhal_i3c_target_config_write_buffer	(	cyhal_i3c_t *	obj,
		const uint8_t *	data,
		uint16_t	size
	)

I3C target config write buffer The user needs to setup a new buffer every time (i.e.

call cyhal_i3c_target_config_write_buffer and cyhal_i3c_target_config_read_buffer every time the buffer has been used up) Note that after transaction completion the buffer must be configured again. Otherwise, the same buffer is used starting from the point where the controller stopped a previous transaction. For example: The read buffer is configured to be 10 bytes and the controller reads 8 bytes. If the read buffer is not configured again, the next controller read will start from the 9th byte.

Parameters

[in]	obj	The I3C object
[in]	data	Pointer to the byte-array of data send to the controller device
[in]	size	i3c target send data size

Returns

The status of the target_config_write_buff request

cyhal_i3c_target_config_read_buffer()

cy_rslt_t cyhal_i3c_target_config_read_buffer	(	cyhal_i3c_t *	obj,
		uint8_t *	data,
		uint16_t	size
	)

I3C target config read buffer The user needs to setup a new buffer every time (i.e.

call cyhal_i3c_target_config_write_buffer and cyhal_i3c_target_config_read_buffer every time the buffer has been used up) Note that after transaction completion the buffer must be configured again. Otherwise, the same buffer is used starting from the point where the controller stopped a previous transaction. For example: The read buffer is configured to be 10 bytes and the controller reads 8 bytes. If the read buffer is not configured again, the next controller read will start from the 9th byte.

Parameters

[in]	obj	The I3C object
[out]	data	Pointer to the byte-array of data receive from controller device
[in]	size	i3c target receive data size

Returns

The status of the target_config_read_buff request

cyhal_i3c_register_callback()

void cyhal_i3c_register_callback	(	cyhal_i3c_t *	obj,
		cyhal_i3c_event_callback_t	callback,
		void *	callback_arg
	)

The I3C event callback handler registration.

Parameters

[in]	obj	The I3C object
[in]	callback	The callback handler which will be invoked when an event triggers
[in]	callback_arg	Generic argument that will be provided to the callback when called

cyhal_i3c_register_ibi_callback()

void cyhal_i3c_register_ibi_callback	(	cyhal_i3c_t *	obj,
		cyhal_i3c_ibi_callback_t	callback,
		void *	callback_arg
	)

The I3C IBI callback handler registration.

Parameters

[in]	obj	The I3C object
[in]	callback	The callback handler which will be invoked when IBI event triggers
[in]	callback_arg	Generic argument that will be provided to the callback when called

cyhal_i3c_enable_event()

void cyhal_i3c_enable_event	(	cyhal_i3c_t *	obj,
		cyhal_i3c_event_t	event,
		uint8_t	intr_priority,
		bool	enable
	)

Configure and Enable or Disable I3C Interrupt.

Parameters

[in]	obj	The I3C object
[in]	event	The I3C event type
[in]	intr_priority	The priority for NVIC interrupt events
[in]	enable	True to turn on interrupts, False to turn off

cyhal_i3c_enable_ibi_event()

void cyhal_i3c_enable_ibi_event	(	cyhal_i3c_t *	obj,
		cyhal_i3c_ibi_event_t	event,
		uint8_t	intr_priority,
		bool	enable
	)

Configure and Enable or Disable I3C Interrupt.

Parameters

[in]	obj	The I3C object
[in]	event	The I3C IBI type
[in]	intr_priority	The priority for NVIC interrupt events
[in]	enable	True to turn on interrupts, False to turn off

cyhal_i3c_set_fifo_level()

cy_rslt_t cyhal_i3c_set_fifo_level	(	cyhal_i3c_t *	obj,
		cyhal_i3c_fifo_type_t	type,
		uint16_t	level
	)

Sets a threshold level for a FIFO that will generate an interrupt and a trigger output.

The RX FIFO interrupt and trigger will be activated when the receive FIFO has more entries than the threshold. The TX FIFO interrupt and trigger will be activated when the transmit FIFO has less entries than the threshold.

Parameters

[in]	obj	The I3C object
[in]	type	FIFO type to set level for
[in]	level	Level threshold to set

Returns

The status of the level set

cyhal_i3c_enable_output()

cy_rslt_t cyhal_i3c_enable_output	(	cyhal_i3c_t *	obj,
		cyhal_i3c_output_t	output,
		cyhal_source_t *	source
	)

Enables the specified output signal from an I3C.

Parameters

[in]	obj	The I3C object
[in]	output	Which output signal to enable
[out]	source	Pointer to user-allocated source signal object which will be initialized by enable_output. source should be passed to (dis)connect_digital functions to (dis)connect the associated endpoints.

Returns

The status of the output enable

cyhal_i3c_disable_output()

cy_rslt_t cyhal_i3c_disable_output	(	cyhal_i3c_t *	obj,
		cyhal_i3c_output_t	output
	)

Disables the specified output signal from an I3C.

Parameters

[in]	obj	The I3C object
[in]	output	Which output signal to disable

Returns

The status of the output disable

cyhal_i3c_init_cfg()

cy_rslt_t cyhal_i3c_init_cfg	(	cyhal_i3c_t *	obj,
		const cyhal_i3c_configurator_t *	cfg
	)

Initialize the I3C peripheral using a configurator generated configuration struct.

Parameters

[in]	obj	The I3C peripheral to configure
[in]	cfg	Configuration structure generated by a configurator.

Returns

The status of the operation

cyhal_i3c_target_readable()

uint32_t cyhal_i3c_target_readable

(

cyhal_i3c_t *

obj

)

Returns the number of bytes written by the I3C controller.

Calling the cyhal_i3c_target_config_write_buffer API will clear the counter of bytes sent by controller

Parameters

[in]

obj

The I3C object

Returns

The number of bytes written by the I3C controller.

cyhal_i3c_target_writable()

uint32_t cyhal_i3c_target_writable

(

cyhal_i3c_t *

obj

)

Returns the number of bytes can be read by the I3C controller.

Calling the cyhal_i3c_target_config_read_buffer API will clear the counter of bytes read by controller

Parameters

[in]

obj

The I3C object

Returns

The number of bytes can be read by the I3C controller.