PSC3

General Description

Trigger connections for psc3.

Macros
#define	CYHAL_TRIGGER_CPUSS_ZERO   (CYHAL_TRIGGER_CPUSS_ZERO_LEVEL)
	Deprecated defines for signals that can be either level or edge. More...
#define	CYHAL_TRIGGER_CPUSS_TR_FAULT0   (CYHAL_TRIGGER_CPUSS_TR_FAULT0_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_DEBUG600_CTI_TR_OUT0   (CYHAL_TRIGGER_DEBUG600_CTI_TR_OUT0_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_DEBUG600_CTI_TR_OUT1   (CYHAL_TRIGGER_DEBUG600_CTI_TR_OUT1_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN0   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN0_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN1   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN1_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN2   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN2_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN3   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN3_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN4   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN4_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN5   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN5_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN6   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN6_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN7   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN7_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN8   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN8_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN9   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN9_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN10   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN10_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN11   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN11_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN12   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN12_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN13   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN13_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN14   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN14_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN15   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN15_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN16   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN16_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN17   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN17_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN18   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN18_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN19   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN19_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN20   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN20_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN21   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN21_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN22   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN22_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN23   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN23_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN24   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN24_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN25   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN25_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN26   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN26_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN27   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN27_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN28   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN28_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN29   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN29_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN30   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN30_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN31   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN31_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN32   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN32_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN33   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN33_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN34   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN34_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN35   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN35_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN36   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN36_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN37   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN37_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN38   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN38_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN39   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN39_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN40   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN40_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN41   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN41_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN42   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN42_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN43   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN43_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN44   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN44_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN45   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN45_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN46   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN46_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN47   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN47_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN48   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN48_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN49   (CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN49_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_PASS_TR_PULSE_OUT0   (CYHAL_TRIGGER_PASS_TR_PULSE_OUT0_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_PASS_TR_PULSE_OUT1   (CYHAL_TRIGGER_PASS_TR_PULSE_OUT1_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_PASS_TR_PULSE_OUT2   (CYHAL_TRIGGER_PASS_TR_PULSE_OUT2_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_PASS_TR_PULSE_OUT3   (CYHAL_TRIGGER_PASS_TR_PULSE_OUT3_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_PASS_TR_PULSE_OUT4   (CYHAL_TRIGGER_PASS_TR_PULSE_OUT4_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_PASS_TR_PULSE_OUT5   (CYHAL_TRIGGER_PASS_TR_PULSE_OUT5_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_PASS_TR_PULSE_OUT6   (CYHAL_TRIGGER_PASS_TR_PULSE_OUT6_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_PASS_TR_PULSE_OUT7   (CYHAL_TRIGGER_PASS_TR_PULSE_OUT7_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL0   (CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL0_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL1   (CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL1_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL2   (CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL2_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL3   (CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL3_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL256   (CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL256_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL257   (CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL257_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL258   (CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL258_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL259   (CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL259_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL260   (CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL260_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL261   (CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL261_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL262   (CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL262_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL263   (CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL263_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL512   (CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL512_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL513   (CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL513_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL514   (CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL514_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL515   (CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL515_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL516   (CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL516_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL517   (CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL517_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL518   (CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL518_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL519   (CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL519_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE0   (CYHAL_TRIGGER_TCPWM0_TR_LINE0_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE1   (CYHAL_TRIGGER_TCPWM0_TR_LINE1_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE2   (CYHAL_TRIGGER_TCPWM0_TR_LINE2_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE3   (CYHAL_TRIGGER_TCPWM0_TR_LINE3_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE256   (CYHAL_TRIGGER_TCPWM0_TR_LINE256_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE257   (CYHAL_TRIGGER_TCPWM0_TR_LINE257_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE258   (CYHAL_TRIGGER_TCPWM0_TR_LINE258_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE259   (CYHAL_TRIGGER_TCPWM0_TR_LINE259_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE260   (CYHAL_TRIGGER_TCPWM0_TR_LINE260_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE261   (CYHAL_TRIGGER_TCPWM0_TR_LINE261_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE262   (CYHAL_TRIGGER_TCPWM0_TR_LINE262_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE263   (CYHAL_TRIGGER_TCPWM0_TR_LINE263_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE512   (CYHAL_TRIGGER_TCPWM0_TR_LINE512_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE513   (CYHAL_TRIGGER_TCPWM0_TR_LINE513_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE514   (CYHAL_TRIGGER_TCPWM0_TR_LINE514_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE515   (CYHAL_TRIGGER_TCPWM0_TR_LINE515_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE516   (CYHAL_TRIGGER_TCPWM0_TR_LINE516_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE517   (CYHAL_TRIGGER_TCPWM0_TR_LINE517_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE518   (CYHAL_TRIGGER_TCPWM0_TR_LINE518_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_LINE519   (CYHAL_TRIGGER_TCPWM0_TR_LINE519_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT256   (CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT256_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT257   (CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT257_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT258   (CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT258_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT259   (CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT259_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT260   (CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT260_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT261   (CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT261_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT262   (CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT262_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT263   (CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT263_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT00   (CYHAL_TRIGGER_TCPWM0_TR_OUT00_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT01   (CYHAL_TRIGGER_TCPWM0_TR_OUT01_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT02   (CYHAL_TRIGGER_TCPWM0_TR_OUT02_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT03   (CYHAL_TRIGGER_TCPWM0_TR_OUT03_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT0256   (CYHAL_TRIGGER_TCPWM0_TR_OUT0256_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT0257   (CYHAL_TRIGGER_TCPWM0_TR_OUT0257_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT0258   (CYHAL_TRIGGER_TCPWM0_TR_OUT0258_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT0259   (CYHAL_TRIGGER_TCPWM0_TR_OUT0259_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT0260   (CYHAL_TRIGGER_TCPWM0_TR_OUT0260_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT0261   (CYHAL_TRIGGER_TCPWM0_TR_OUT0261_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT0262   (CYHAL_TRIGGER_TCPWM0_TR_OUT0262_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT0263   (CYHAL_TRIGGER_TCPWM0_TR_OUT0263_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT0512   (CYHAL_TRIGGER_TCPWM0_TR_OUT0512_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT0513   (CYHAL_TRIGGER_TCPWM0_TR_OUT0513_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT0514   (CYHAL_TRIGGER_TCPWM0_TR_OUT0514_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT0515   (CYHAL_TRIGGER_TCPWM0_TR_OUT0515_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT0516   (CYHAL_TRIGGER_TCPWM0_TR_OUT0516_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT0517   (CYHAL_TRIGGER_TCPWM0_TR_OUT0517_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT0518   (CYHAL_TRIGGER_TCPWM0_TR_OUT0518_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT0519   (CYHAL_TRIGGER_TCPWM0_TR_OUT0519_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT10   (CYHAL_TRIGGER_TCPWM0_TR_OUT10_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT11   (CYHAL_TRIGGER_TCPWM0_TR_OUT11_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT12   (CYHAL_TRIGGER_TCPWM0_TR_OUT12_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT13   (CYHAL_TRIGGER_TCPWM0_TR_OUT13_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT1256   (CYHAL_TRIGGER_TCPWM0_TR_OUT1256_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT1257   (CYHAL_TRIGGER_TCPWM0_TR_OUT1257_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT1258   (CYHAL_TRIGGER_TCPWM0_TR_OUT1258_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT1259   (CYHAL_TRIGGER_TCPWM0_TR_OUT1259_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT1260   (CYHAL_TRIGGER_TCPWM0_TR_OUT1260_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT1261   (CYHAL_TRIGGER_TCPWM0_TR_OUT1261_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT1262   (CYHAL_TRIGGER_TCPWM0_TR_OUT1262_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT1263   (CYHAL_TRIGGER_TCPWM0_TR_OUT1263_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT1512   (CYHAL_TRIGGER_TCPWM0_TR_OUT1512_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT1513   (CYHAL_TRIGGER_TCPWM0_TR_OUT1513_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT1514   (CYHAL_TRIGGER_TCPWM0_TR_OUT1514_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT1515   (CYHAL_TRIGGER_TCPWM0_TR_OUT1515_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT1516   (CYHAL_TRIGGER_TCPWM0_TR_OUT1516_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT1517   (CYHAL_TRIGGER_TCPWM0_TR_OUT1517_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT1518   (CYHAL_TRIGGER_TCPWM0_TR_OUT1518_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.
#define	CYHAL_TRIGGER_TCPWM0_TR_OUT1519   (CYHAL_TRIGGER_TCPWM0_TR_OUT1519_LEVEL)
	Legacy define. Instead, use the explicit _LEVEL or _EDGE version.

Typedefs
typedef cyhal_trigger_source_psc3_t	cyhal_source_t
	Typedef from device family specific trigger source to generic trigger source.
typedef cyhal_trigger_dest_psc3_t	cyhal_dest_t
	Typedef from device family specific trigger dest to generic trigger dest.

Enumerations
enum	cyhal_trigger_source_psc3_t {   CYHAL_TRIGGER_CPUSS_ZERO_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_ZERO, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CPUSS_ZERO_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_ZERO, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ0 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ0, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ1 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ1, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_CANFD0_TR_FIFO00 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CANFD0_TR_FIFO00, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_CANFD0_TR_FIFO01 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CANFD0_TR_FIFO01, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_CANFD0_TR_FIFO10 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CANFD0_TR_FIFO10, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_CANFD0_TR_FIFO11 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CANFD0_TR_FIFO11, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT0 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT0, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT1 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT1, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CORDIC0_TR_DONE_MXCORDIC = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CORDIC0_TR_DONE_MXCORDIC, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_CPUSS_DW0_TR_OUT0 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_DW0_TR_OUT0, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CPUSS_DW0_TR_OUT1 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_DW0_TR_OUT1, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CPUSS_DW0_TR_OUT2 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_DW0_TR_OUT2, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CPUSS_DW0_TR_OUT3 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_DW0_TR_OUT3, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CPUSS_DW0_TR_OUT4 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_DW0_TR_OUT4, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CPUSS_DW0_TR_OUT5 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_DW0_TR_OUT5, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CPUSS_DW0_TR_OUT6 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_DW0_TR_OUT6, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CPUSS_DW0_TR_OUT7 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_DW0_TR_OUT7, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CPUSS_DW0_TR_OUT8 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_DW0_TR_OUT8, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CPUSS_DW0_TR_OUT9 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_DW0_TR_OUT9, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CPUSS_DW0_TR_OUT10 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_DW0_TR_OUT10, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CPUSS_DW0_TR_OUT11 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_DW0_TR_OUT11, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CPUSS_DW0_TR_OUT12 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_DW0_TR_OUT12, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CPUSS_DW0_TR_OUT13 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_DW0_TR_OUT13, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CPUSS_DW0_TR_OUT14 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_DW0_TR_OUT14, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CPUSS_DW0_TR_OUT15 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_DW0_TR_OUT15, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CPUSS_DW1_TR_OUT0 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_DW1_TR_OUT0, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CPUSS_DW1_TR_OUT1 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_DW1_TR_OUT1, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CPUSS_DW1_TR_OUT2 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_DW1_TR_OUT2, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CPUSS_DW1_TR_OUT3 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_DW1_TR_OUT3, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CPUSS_DW1_TR_OUT4 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_DW1_TR_OUT4, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CPUSS_DW1_TR_OUT5 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_DW1_TR_OUT5, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CPUSS_DW1_TR_OUT6 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_DW1_TR_OUT6, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CPUSS_DW1_TR_OUT7 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_DW1_TR_OUT7, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CPUSS_DW1_TR_OUT8 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_DW1_TR_OUT8, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CPUSS_DW1_TR_OUT9 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_DW1_TR_OUT9, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CPUSS_DW1_TR_OUT10 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_DW1_TR_OUT10, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CPUSS_DW1_TR_OUT11 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_DW1_TR_OUT11, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CPUSS_DW1_TR_OUT12 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_DW1_TR_OUT12, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CPUSS_DW1_TR_OUT13 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_DW1_TR_OUT13, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CPUSS_DW1_TR_OUT14 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_DW1_TR_OUT14, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CPUSS_DW1_TR_OUT15 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_DW1_TR_OUT15, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CPUSS_TR_FAULT0_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_TR_FAULT0, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_CPUSS_TR_FAULT0_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CPUSS_TR_FAULT0, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_CRYPTOLITE_TR_TRNG_BITSTREAM = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_CRYPTOLITE_TR_TRNG_BITSTREAM, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_DEBUG600_CTI_TR_OUT0_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_DEBUG600_CTI_TR_OUT0, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_DEBUG600_CTI_TR_OUT0_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_DEBUG600_CTI_TR_OUT0, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_DEBUG600_CTI_TR_OUT1_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_DEBUG600_CTI_TR_OUT1, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_DEBUG600_CTI_TR_OUT1_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_DEBUG600_CTI_TR_OUT1, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN0_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN0, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN0_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN0, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN1_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN1, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN1_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN1, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN2_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN2, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN2_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN2, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN3_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN3, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN3_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN3, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN4_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN4, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN4_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN4, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN5_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN5, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN5_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN5, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN6_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN6, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN6_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN6, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN7_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN7, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN7_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN7, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN8_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN8, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN8_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN8, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN9_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN9, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN9_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN9, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN10_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN10, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN10_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN10, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN11_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN11, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN11_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN11, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN12_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN12, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN12_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN12, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN13_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN13, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN13_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN13, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN14_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN14, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN14_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN14, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN15_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN15, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN15_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN15, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN16_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN16, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN16_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN16, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN17_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN17, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN17_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN17, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN18_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN18, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN18_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN18, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN19_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN19, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN19_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN19, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN20_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN20, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN20_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN20, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN21_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN21, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN21_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN21, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN22_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN22, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN22_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN22, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN23_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN23, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN23_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN23, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN24_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN24, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN24_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN24, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN25_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN25, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN25_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN25, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN26_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN26, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN26_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN26, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN27_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN27, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN27_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN27, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN28_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN28, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN28_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN28, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN29_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN29, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN29_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN29, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN30_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN30, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN30_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN30, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN31_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN31, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN31_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN31, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN32_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN32, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN32_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN32, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN33_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN33, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN33_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN33, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN34_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN34, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN34_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN34, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN35_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN35, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN35_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN35, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN36_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN36, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN36_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN36, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN37_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN37, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN37_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN37, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN38_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN38, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN38_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN38, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN39_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN39, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN39_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN39, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN40_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN40, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN40_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN40, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN41_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN41, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN41_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN41, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN42_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN42, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN42_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN42, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN43_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN43, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN43_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN43, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN44_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN44, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN44_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN44, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN45_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN45, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN45_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN45, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN46_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN46, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN46_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN46, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN47_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN47, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN47_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN47, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN48_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN48, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN48_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN48, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN49_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN49, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN49_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN49, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_LPCOMP_DSI_COMP0 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_LPCOMP_DSI_COMP0, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_LPCOMP_DSI_COMP1 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_LPCOMP_DSI_COMP1, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_PASS_TR_FIFO_LEVEL_OUT0 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_PASS_TR_FIFO_LEVEL_OUT0, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_PASS_TR_FIFO_LEVEL_OUT1 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_PASS_TR_FIFO_LEVEL_OUT1, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_PASS_TR_FIFO_LEVEL_OUT2 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_PASS_TR_FIFO_LEVEL_OUT2, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_PASS_TR_FIFO_LEVEL_OUT3 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_PASS_TR_FIFO_LEVEL_OUT3, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_PASS_TR_LEVEL_OUT0 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_PASS_TR_LEVEL_OUT0, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_PASS_TR_LEVEL_OUT1 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_PASS_TR_LEVEL_OUT1, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_PASS_TR_LEVEL_OUT2 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_PASS_TR_LEVEL_OUT2, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_PASS_TR_LEVEL_OUT3 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_PASS_TR_LEVEL_OUT3, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_PASS_TR_LEVEL_OUT4 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_PASS_TR_LEVEL_OUT4, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_PASS_TR_LEVEL_OUT5 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_PASS_TR_LEVEL_OUT5, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_PASS_TR_LEVEL_OUT6 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_PASS_TR_LEVEL_OUT6, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_PASS_TR_LEVEL_OUT7 = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_PASS_TR_LEVEL_OUT7, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_PASS_TR_PULSE_OUT0_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_PASS_TR_PULSE_OUT0, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_PASS_TR_PULSE_OUT0_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_PASS_TR_PULSE_OUT0, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_PASS_TR_PULSE_OUT1_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_PASS_TR_PULSE_OUT1, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_PASS_TR_PULSE_OUT1_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_PASS_TR_PULSE_OUT1, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_PASS_TR_PULSE_OUT2_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_PASS_TR_PULSE_OUT2, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_PASS_TR_PULSE_OUT2_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_PASS_TR_PULSE_OUT2, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_PASS_TR_PULSE_OUT3_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_PASS_TR_PULSE_OUT3, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_PASS_TR_PULSE_OUT3_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_PASS_TR_PULSE_OUT3, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_PASS_TR_PULSE_OUT4_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_PASS_TR_PULSE_OUT4, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_PASS_TR_PULSE_OUT4_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_PASS_TR_PULSE_OUT4, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_PASS_TR_PULSE_OUT5_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_PASS_TR_PULSE_OUT5, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_PASS_TR_PULSE_OUT5_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_PASS_TR_PULSE_OUT5, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_PASS_TR_PULSE_OUT6_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_PASS_TR_PULSE_OUT6, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_PASS_TR_PULSE_OUT6_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_PASS_TR_PULSE_OUT6, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_PASS_TR_PULSE_OUT7_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_PASS_TR_PULSE_OUT7, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_PASS_TR_PULSE_OUT7_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_PASS_TR_PULSE_OUT7, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_SCB0_TR_I2C_SCL_FILTERED = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_SCB0_TR_I2C_SCL_FILTERED, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_SCB1_TR_I2C_SCL_FILTERED = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_SCB1_TR_I2C_SCL_FILTERED, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_SCB2_TR_I2C_SCL_FILTERED = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_SCB2_TR_I2C_SCL_FILTERED, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_SCB3_TR_I2C_SCL_FILTERED = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_SCB3_TR_I2C_SCL_FILTERED, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_SCB4_TR_I2C_SCL_FILTERED = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_SCB4_TR_I2C_SCL_FILTERED, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_SCB5_TR_I2C_SCL_FILTERED = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_SCB5_TR_I2C_SCL_FILTERED, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_SCB0_TR_RX_REQ = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_SCB0_TR_RX_REQ, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_SCB1_TR_RX_REQ = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_SCB1_TR_RX_REQ, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_SCB2_TR_RX_REQ = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_SCB2_TR_RX_REQ, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_SCB3_TR_RX_REQ = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_SCB3_TR_RX_REQ, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_SCB4_TR_RX_REQ = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_SCB4_TR_RX_REQ, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_SCB5_TR_RX_REQ = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_SCB5_TR_RX_REQ, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_SCB0_TR_TX_REQ = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_SCB0_TR_TX_REQ, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_SCB1_TR_TX_REQ = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_SCB1_TR_TX_REQ, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_SCB2_TR_TX_REQ = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_SCB2_TR_TX_REQ, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_SCB3_TR_TX_REQ = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_SCB3_TR_TX_REQ, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_SCB4_TR_TX_REQ = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_SCB4_TR_TX_REQ, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_SCB5_TR_TX_REQ = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_SCB5_TR_TX_REQ, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL0_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL0, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL0_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL0, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL1_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL1, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL1_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL1, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL2_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL2, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL2_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL2, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL3_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL3, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL3_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL3, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL256_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL256, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL256_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL256, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL257_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL257, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL257_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL257, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL258_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL258, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL258_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL258, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL259_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL259, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL259_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL259, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL260_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL260, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL260_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL260, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL261_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL261, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL261_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL261, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL262_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL262, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL262_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL262, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL263_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL263, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL263_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL263, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL512_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL512, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL512_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL512, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL513_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL513, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL513_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL513, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL514_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL514, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL514_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL514, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL515_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL515, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL515_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL515, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL516_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL516, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL516_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL516, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL517_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL517, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL517_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL517, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL518_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL518, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL518_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL518, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL519_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL519, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL519_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL519, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE0_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE0, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE0_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE0, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE1_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE1, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE1_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE1, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE2_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE2, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE2_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE2, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE3_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE3, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE3_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE3, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE256_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE256, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE256_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE256, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE257_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE257, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE257_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE257, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE258_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE258, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE258_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE258, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE259_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE259, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE259_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE259, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE260_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE260, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE260_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE260, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE261_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE261, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE261_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE261, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE262_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE262, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE262_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE262, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE263_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE263, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE263_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE263, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE512_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE512, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE512_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE512, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE513_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE513, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE513_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE513, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE514_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE514, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE514_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE514, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE515_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE515, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE515_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE515, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE516_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE516, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE516_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE516, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE517_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE517, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE517_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE517, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE518_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE518, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE518_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE518, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE519_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE519, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_LINE519_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_LINE519, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT256_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT256, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT256_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT256, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT257_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT257, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT257_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT257, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT258_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT258, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT258_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT258, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT259_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT259, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT259_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT259, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT260_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT260, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT260_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT260, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT261_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT261, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT261_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT261, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT262_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT262, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT262_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT262, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT263_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT263, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT263_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT263, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT00_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT00, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT00_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT00, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT01_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT01, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT01_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT01, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT02_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT02, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT02_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT02, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT03_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT03, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT03_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT03, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT0256_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT0256, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT0256_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT0256, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT0257_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT0257, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT0257_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT0257, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT0258_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT0258, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT0258_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT0258, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT0259_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT0259, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT0259_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT0259, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT0260_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT0260, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT0260_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT0260, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT0261_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT0261, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT0261_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT0261, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT0262_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT0262, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT0262_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT0262, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT0263_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT0263, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT0263_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT0263, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT0512_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT0512, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT0512_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT0512, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT0513_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT0513, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT0513_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT0513, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT0514_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT0514, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT0514_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT0514, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT0515_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT0515, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT0515_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT0515, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT0516_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT0516, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT0516_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT0516, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT0517_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT0517, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT0517_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT0517, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT0518_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT0518, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT0518_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT0518, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT0519_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT0519, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT0519_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT0519, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT10_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT10, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT10_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT10, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT11_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT11, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT11_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT11, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT12_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT12, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT12_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT12, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT13_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT13, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT13_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT13, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT1256_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT1256, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT1256_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT1256, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT1257_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT1257, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT1257_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT1257, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT1258_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT1258, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT1258_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT1258, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT1259_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT1259, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT1259_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT1259, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT1260_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT1260, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT1260_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT1260, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT1261_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT1261, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT1261_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT1261, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT1262_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT1262, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT1262_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT1262, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT1263_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT1263, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT1263_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT1263, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT1512_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT1512, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT1512_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT1512, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT1513_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT1513, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT1513_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT1513, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT1514_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT1514, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT1514_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT1514, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT1515_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT1515, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT1515_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT1515, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT1516_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT1516, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT1516_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT1516, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT1517_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT1517, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT1517_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT1517, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT1518_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT1518, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT1518_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT1518, CYHAL_SIGNAL_TYPE_LEVEL) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT1519_EDGE = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT1519, CYHAL_SIGNAL_TYPE_EDGE) ,   CYHAL_TRIGGER_TCPWM0_TR_OUT1519_LEVEL = _CYHAL_TRIGGER_CREATE_SOURCE(_CYHAL_TRIGGER_TCPWM0_TR_OUT1519, CYHAL_SIGNAL_TYPE_LEVEL) }
	Name of each input trigger. More...
enum	cyhal_trigger_dest_psc3_t {   CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_ACK0 = 0 ,   CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_ACK1 = 1 ,   CYHAL_TRIGGER_CANFD0_TR_EVT_SWT_IN0 = 2 ,   CYHAL_TRIGGER_CANFD0_TR_EVT_SWT_IN1 = 3 ,   CYHAL_TRIGGER_CPUSS_DW0_TR_IN0 = 4 ,   CYHAL_TRIGGER_CPUSS_DW0_TR_IN1 = 5 ,   CYHAL_TRIGGER_CPUSS_DW0_TR_IN2 = 6 ,   CYHAL_TRIGGER_CPUSS_DW0_TR_IN3 = 7 ,   CYHAL_TRIGGER_CPUSS_DW0_TR_IN4 = 8 ,   CYHAL_TRIGGER_CPUSS_DW0_TR_IN5 = 9 ,   CYHAL_TRIGGER_CPUSS_DW0_TR_IN6 = 10 ,   CYHAL_TRIGGER_CPUSS_DW0_TR_IN7 = 11 ,   CYHAL_TRIGGER_CPUSS_DW0_TR_IN8 = 12 ,   CYHAL_TRIGGER_CPUSS_DW0_TR_IN9 = 13 ,   CYHAL_TRIGGER_CPUSS_DW0_TR_IN10 = 14 ,   CYHAL_TRIGGER_CPUSS_DW0_TR_IN11 = 15 ,   CYHAL_TRIGGER_CPUSS_DW0_TR_IN12 = 16 ,   CYHAL_TRIGGER_CPUSS_DW0_TR_IN13 = 17 ,   CYHAL_TRIGGER_CPUSS_DW0_TR_IN14 = 18 ,   CYHAL_TRIGGER_CPUSS_DW0_TR_IN15 = 19 ,   CYHAL_TRIGGER_CPUSS_DW1_TR_IN0 = 20 ,   CYHAL_TRIGGER_CPUSS_DW1_TR_IN1 = 21 ,   CYHAL_TRIGGER_CPUSS_DW1_TR_IN2 = 22 ,   CYHAL_TRIGGER_CPUSS_DW1_TR_IN3 = 23 ,   CYHAL_TRIGGER_CPUSS_DW1_TR_IN4 = 24 ,   CYHAL_TRIGGER_CPUSS_DW1_TR_IN5 = 25 ,   CYHAL_TRIGGER_CPUSS_DW1_TR_IN6 = 26 ,   CYHAL_TRIGGER_CPUSS_DW1_TR_IN7 = 27 ,   CYHAL_TRIGGER_CPUSS_DW1_TR_IN8 = 28 ,   CYHAL_TRIGGER_CPUSS_DW1_TR_IN9 = 29 ,   CYHAL_TRIGGER_CPUSS_DW1_TR_IN10 = 30 ,   CYHAL_TRIGGER_CPUSS_DW1_TR_IN11 = 31 ,   CYHAL_TRIGGER_CPUSS_DW1_TR_IN12 = 32 ,   CYHAL_TRIGGER_CPUSS_DW1_TR_IN13 = 33 ,   CYHAL_TRIGGER_CPUSS_DW1_TR_IN14 = 34 ,   CYHAL_TRIGGER_CPUSS_DW1_TR_IN15 = 35 ,   CYHAL_TRIGGER_DEBUG600_CTI_TR_IN0 = 36 ,   CYHAL_TRIGGER_DEBUG600_CTI_TR_IN1 = 37 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT0 = 38 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT1 = 39 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT2 = 40 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT3 = 41 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT4 = 42 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT5 = 43 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT6 = 44 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT7 = 45 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT8 = 46 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT9 = 47 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT10 = 48 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT11 = 49 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT12 = 50 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT13 = 51 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT14 = 52 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT15 = 53 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT16 = 54 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT17 = 55 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT18 = 56 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT19 = 57 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT20 = 58 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT21 = 59 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT22 = 60 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT23 = 61 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT24 = 62 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT25 = 63 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT26 = 64 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT27 = 65 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT28 = 66 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT29 = 67 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT30 = 68 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT31 = 69 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT32 = 70 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT33 = 71 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT34 = 72 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT35 = 73 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT36 = 74 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT37 = 75 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT38 = 76 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT39 = 77 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT40 = 78 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT41 = 79 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT42 = 80 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT43 = 81 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT44 = 82 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT45 = 83 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT46 = 84 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT47 = 85 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT48 = 86 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT49 = 87 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT50 = 88 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT51 = 89 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT52 = 90 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT53 = 91 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT54 = 92 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT55 = 93 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT56 = 94 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT57 = 95 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT58 = 96 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT59 = 97 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT60 = 98 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT61 = 99 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT62 = 100 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT63 = 101 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT64 = 102 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT65 = 103 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT66 = 104 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT67 = 105 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT68 = 106 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT69 = 107 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT70 = 108 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT71 = 109 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT72 = 110 ,   CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT73 = 111 ,   CYHAL_TRIGGER_PASS_TR_A_IN0 = 112 ,   CYHAL_TRIGGER_PASS_TR_A_IN1 = 113 ,   CYHAL_TRIGGER_PASS_TR_A_IN2 = 114 ,   CYHAL_TRIGGER_PASS_TR_A_IN3 = 115 ,   CYHAL_TRIGGER_PASS_TR_A_IN4 = 116 ,   CYHAL_TRIGGER_PASS_TR_A_IN5 = 117 ,   CYHAL_TRIGGER_PASS_TR_A_IN6 = 118 ,   CYHAL_TRIGGER_PASS_TR_A_IN7 = 119 ,   CYHAL_TRIGGER_PASS_TR_B_IN0 = 120 ,   CYHAL_TRIGGER_PASS_TR_B_IN1 = 121 ,   CYHAL_TRIGGER_PASS_TR_B_IN2 = 122 ,   CYHAL_TRIGGER_PASS_TR_B_IN3 = 123 ,   CYHAL_TRIGGER_PASS_TR_B_IN4 = 124 ,   CYHAL_TRIGGER_PASS_TR_B_IN5 = 125 ,   CYHAL_TRIGGER_PASS_TR_B_IN6 = 126 ,   CYHAL_TRIGGER_PASS_TR_B_IN7 = 127 ,   CYHAL_TRIGGER_PERI_TR_DBG_FREEZE = 128 ,   CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN0 = 129 ,   CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN1 = 130 ,   CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN2 = 131 ,   CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN3 = 132 ,   CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN4 = 133 ,   CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN5 = 134 ,   CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN6 = 135 ,   CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN7 = 136 ,   CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN8 = 137 ,   CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN9 = 138 ,   CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN10 = 139 ,   CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN11 = 140 ,   CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN12 = 141 ,   CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN13 = 142 ,   CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN14 = 143 ,   CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN15 = 144 ,   CYHAL_TRIGGER_TCPWM0_TR_DEBUG_FREEZE = 145 ,   CYHAL_TRIGGER_TCPWM0_TR_MOTIF_IN256 = 146 ,   CYHAL_TRIGGER_TCPWM0_TR_MOTIF_IN257 = 147 ,   CYHAL_TRIGGER_TCPWM0_TR_MOTIF_IN258 = 148 ,   CYHAL_TRIGGER_TCPWM0_TR_MOTIF_IN259 = 149 ,   CYHAL_TRIGGER_TCPWM0_TR_MOTIF_IN260 = 150 ,   CYHAL_TRIGGER_TCPWM0_TR_MOTIF_IN261 = 151 ,   CYHAL_TRIGGER_TCPWM0_TR_MOTIF_IN262 = 152 ,   CYHAL_TRIGGER_TCPWM0_TR_MOTIF_IN263 = 153 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN0 = 154 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1 = 155 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN2 = 156 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN3 = 157 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN4 = 158 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN5 = 159 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN6 = 160 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN7 = 161 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN8 = 162 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN9 = 163 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN10 = 164 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN11 = 165 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1536 = 166 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1537 = 167 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1538 = 168 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1539 = 169 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1540 = 170 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1541 = 171 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1542 = 172 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1543 = 173 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1544 = 174 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1545 = 175 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1546 = 176 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1547 = 177 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1548 = 178 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1549 = 179 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1550 = 180 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1551 = 181 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1552 = 182 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1553 = 183 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1554 = 184 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1555 = 185 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1556 = 186 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1557 = 187 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1558 = 188 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1559 = 189 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN768 = 190 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN769 = 191 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN770 = 192 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN771 = 193 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN772 = 194 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN773 = 195 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN774 = 196 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN775 = 197 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN776 = 198 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN777 = 199 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN778 = 200 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN779 = 201 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN780 = 202 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN781 = 203 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN782 = 204 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN783 = 205 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN784 = 206 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN785 = 207 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN786 = 208 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN787 = 209 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN788 = 210 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN789 = 211 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN790 = 212 ,   CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN791 = 213 }
	Name of each output trigger. More...

Macro Definition Documentation

CYHAL_TRIGGER_CPUSS_ZERO

#define CYHAL_TRIGGER_CPUSS_ZERO   (CYHAL_TRIGGER_CPUSS_ZERO_LEVEL)

Deprecated defines for signals that can be either level or edge.

Legacy define. Instead, use the explicit _LEVEL or _EDGE version.

Enumeration Type Documentation

cyhal_trigger_source_psc3_t

enum cyhal_trigger_source_psc3_t

Name of each input trigger.

Enumerator
CYHAL_TRIGGER_CPUSS_ZERO_EDGE	cpuss.zero
CYHAL_TRIGGER_CPUSS_ZERO_LEVEL	cpuss.zero
CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ0	canfd[0].tr_dbg_dma_req[0]
CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_REQ1	canfd[0].tr_dbg_dma_req[1]
CYHAL_TRIGGER_CANFD0_TR_FIFO00	canfd[0].tr_fifo0[0]
CYHAL_TRIGGER_CANFD0_TR_FIFO01	canfd[0].tr_fifo0[1]
CYHAL_TRIGGER_CANFD0_TR_FIFO10	canfd[0].tr_fifo1[0]
CYHAL_TRIGGER_CANFD0_TR_FIFO11	canfd[0].tr_fifo1[1]
CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT0	canfd[0].tr_tmp_rtp_out[0]
CYHAL_TRIGGER_CANFD0_TR_TMP_RTP_OUT1	canfd[0].tr_tmp_rtp_out[1]
CYHAL_TRIGGER_CORDIC0_TR_DONE_MXCORDIC	cordic[0].tr_done_mxcordic
CYHAL_TRIGGER_CPUSS_DW0_TR_OUT0	cpuss.dw0_tr_out[0]
CYHAL_TRIGGER_CPUSS_DW0_TR_OUT1	cpuss.dw0_tr_out[1]
CYHAL_TRIGGER_CPUSS_DW0_TR_OUT2	cpuss.dw0_tr_out[2]
CYHAL_TRIGGER_CPUSS_DW0_TR_OUT3	cpuss.dw0_tr_out[3]
CYHAL_TRIGGER_CPUSS_DW0_TR_OUT4	cpuss.dw0_tr_out[4]
CYHAL_TRIGGER_CPUSS_DW0_TR_OUT5	cpuss.dw0_tr_out[5]
CYHAL_TRIGGER_CPUSS_DW0_TR_OUT6	cpuss.dw0_tr_out[6]
CYHAL_TRIGGER_CPUSS_DW0_TR_OUT7	cpuss.dw0_tr_out[7]
CYHAL_TRIGGER_CPUSS_DW0_TR_OUT8	cpuss.dw0_tr_out[8]
CYHAL_TRIGGER_CPUSS_DW0_TR_OUT9	cpuss.dw0_tr_out[9]
CYHAL_TRIGGER_CPUSS_DW0_TR_OUT10	cpuss.dw0_tr_out[10]
CYHAL_TRIGGER_CPUSS_DW0_TR_OUT11	cpuss.dw0_tr_out[11]
CYHAL_TRIGGER_CPUSS_DW0_TR_OUT12	cpuss.dw0_tr_out[12]
CYHAL_TRIGGER_CPUSS_DW0_TR_OUT13	cpuss.dw0_tr_out[13]
CYHAL_TRIGGER_CPUSS_DW0_TR_OUT14	cpuss.dw0_tr_out[14]
CYHAL_TRIGGER_CPUSS_DW0_TR_OUT15	cpuss.dw0_tr_out[15]
CYHAL_TRIGGER_CPUSS_DW1_TR_OUT0	cpuss.dw1_tr_out[0]
CYHAL_TRIGGER_CPUSS_DW1_TR_OUT1	cpuss.dw1_tr_out[1]
CYHAL_TRIGGER_CPUSS_DW1_TR_OUT2	cpuss.dw1_tr_out[2]
CYHAL_TRIGGER_CPUSS_DW1_TR_OUT3	cpuss.dw1_tr_out[3]
CYHAL_TRIGGER_CPUSS_DW1_TR_OUT4	cpuss.dw1_tr_out[4]
CYHAL_TRIGGER_CPUSS_DW1_TR_OUT5	cpuss.dw1_tr_out[5]
CYHAL_TRIGGER_CPUSS_DW1_TR_OUT6	cpuss.dw1_tr_out[6]
CYHAL_TRIGGER_CPUSS_DW1_TR_OUT7	cpuss.dw1_tr_out[7]
CYHAL_TRIGGER_CPUSS_DW1_TR_OUT8	cpuss.dw1_tr_out[8]
CYHAL_TRIGGER_CPUSS_DW1_TR_OUT9	cpuss.dw1_tr_out[9]
CYHAL_TRIGGER_CPUSS_DW1_TR_OUT10	cpuss.dw1_tr_out[10]
CYHAL_TRIGGER_CPUSS_DW1_TR_OUT11	cpuss.dw1_tr_out[11]
CYHAL_TRIGGER_CPUSS_DW1_TR_OUT12	cpuss.dw1_tr_out[12]
CYHAL_TRIGGER_CPUSS_DW1_TR_OUT13	cpuss.dw1_tr_out[13]
CYHAL_TRIGGER_CPUSS_DW1_TR_OUT14	cpuss.dw1_tr_out[14]
CYHAL_TRIGGER_CPUSS_DW1_TR_OUT15	cpuss.dw1_tr_out[15]
CYHAL_TRIGGER_CPUSS_TR_FAULT0_EDGE	cpuss.tr_fault[0]
CYHAL_TRIGGER_CPUSS_TR_FAULT0_LEVEL	cpuss.tr_fault[0]
CYHAL_TRIGGER_CRYPTOLITE_TR_TRNG_BITSTREAM	cryptolite.tr_trng_bitstream
CYHAL_TRIGGER_DEBUG600_CTI_TR_OUT0_EDGE	debug600.cti_tr_out[0]
CYHAL_TRIGGER_DEBUG600_CTI_TR_OUT0_LEVEL	debug600.cti_tr_out[0]
CYHAL_TRIGGER_DEBUG600_CTI_TR_OUT1_EDGE	debug600.cti_tr_out[1]
CYHAL_TRIGGER_DEBUG600_CTI_TR_OUT1_LEVEL	debug600.cti_tr_out[1]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN0_EDGE	ioss.peri_tr_io_input_in[0]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN0_LEVEL	ioss.peri_tr_io_input_in[0]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN1_EDGE	ioss.peri_tr_io_input_in[1]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN1_LEVEL	ioss.peri_tr_io_input_in[1]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN2_EDGE	ioss.peri_tr_io_input_in[2]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN2_LEVEL	ioss.peri_tr_io_input_in[2]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN3_EDGE	ioss.peri_tr_io_input_in[3]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN3_LEVEL	ioss.peri_tr_io_input_in[3]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN4_EDGE	ioss.peri_tr_io_input_in[4]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN4_LEVEL	ioss.peri_tr_io_input_in[4]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN5_EDGE	ioss.peri_tr_io_input_in[5]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN5_LEVEL	ioss.peri_tr_io_input_in[5]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN6_EDGE	ioss.peri_tr_io_input_in[6]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN6_LEVEL	ioss.peri_tr_io_input_in[6]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN7_EDGE	ioss.peri_tr_io_input_in[7]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN7_LEVEL	ioss.peri_tr_io_input_in[7]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN8_EDGE	ioss.peri_tr_io_input_in[8]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN8_LEVEL	ioss.peri_tr_io_input_in[8]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN9_EDGE	ioss.peri_tr_io_input_in[9]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN9_LEVEL	ioss.peri_tr_io_input_in[9]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN10_EDGE	ioss.peri_tr_io_input_in[10]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN10_LEVEL	ioss.peri_tr_io_input_in[10]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN11_EDGE	ioss.peri_tr_io_input_in[11]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN11_LEVEL	ioss.peri_tr_io_input_in[11]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN12_EDGE	ioss.peri_tr_io_input_in[12]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN12_LEVEL	ioss.peri_tr_io_input_in[12]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN13_EDGE	ioss.peri_tr_io_input_in[13]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN13_LEVEL	ioss.peri_tr_io_input_in[13]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN14_EDGE	ioss.peri_tr_io_input_in[14]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN14_LEVEL	ioss.peri_tr_io_input_in[14]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN15_EDGE	ioss.peri_tr_io_input_in[15]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN15_LEVEL	ioss.peri_tr_io_input_in[15]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN16_EDGE	ioss.peri_tr_io_input_in[16]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN16_LEVEL	ioss.peri_tr_io_input_in[16]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN17_EDGE	ioss.peri_tr_io_input_in[17]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN17_LEVEL	ioss.peri_tr_io_input_in[17]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN18_EDGE	ioss.peri_tr_io_input_in[18]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN18_LEVEL	ioss.peri_tr_io_input_in[18]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN19_EDGE	ioss.peri_tr_io_input_in[19]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN19_LEVEL	ioss.peri_tr_io_input_in[19]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN20_EDGE	ioss.peri_tr_io_input_in[20]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN20_LEVEL	ioss.peri_tr_io_input_in[20]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN21_EDGE	ioss.peri_tr_io_input_in[21]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN21_LEVEL	ioss.peri_tr_io_input_in[21]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN22_EDGE	ioss.peri_tr_io_input_in[22]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN22_LEVEL	ioss.peri_tr_io_input_in[22]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN23_EDGE	ioss.peri_tr_io_input_in[23]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN23_LEVEL	ioss.peri_tr_io_input_in[23]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN24_EDGE	ioss.peri_tr_io_input_in[24]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN24_LEVEL	ioss.peri_tr_io_input_in[24]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN25_EDGE	ioss.peri_tr_io_input_in[25]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN25_LEVEL	ioss.peri_tr_io_input_in[25]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN26_EDGE	ioss.peri_tr_io_input_in[26]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN26_LEVEL	ioss.peri_tr_io_input_in[26]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN27_EDGE	ioss.peri_tr_io_input_in[27]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN27_LEVEL	ioss.peri_tr_io_input_in[27]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN28_EDGE	ioss.peri_tr_io_input_in[28]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN28_LEVEL	ioss.peri_tr_io_input_in[28]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN29_EDGE	ioss.peri_tr_io_input_in[29]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN29_LEVEL	ioss.peri_tr_io_input_in[29]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN30_EDGE	ioss.peri_tr_io_input_in[30]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN30_LEVEL	ioss.peri_tr_io_input_in[30]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN31_EDGE	ioss.peri_tr_io_input_in[31]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN31_LEVEL	ioss.peri_tr_io_input_in[31]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN32_EDGE	ioss.peri_tr_io_input_in[32]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN32_LEVEL	ioss.peri_tr_io_input_in[32]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN33_EDGE	ioss.peri_tr_io_input_in[33]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN33_LEVEL	ioss.peri_tr_io_input_in[33]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN34_EDGE	ioss.peri_tr_io_input_in[34]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN34_LEVEL	ioss.peri_tr_io_input_in[34]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN35_EDGE	ioss.peri_tr_io_input_in[35]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN35_LEVEL	ioss.peri_tr_io_input_in[35]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN36_EDGE	ioss.peri_tr_io_input_in[36]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN36_LEVEL	ioss.peri_tr_io_input_in[36]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN37_EDGE	ioss.peri_tr_io_input_in[37]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN37_LEVEL	ioss.peri_tr_io_input_in[37]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN38_EDGE	ioss.peri_tr_io_input_in[38]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN38_LEVEL	ioss.peri_tr_io_input_in[38]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN39_EDGE	ioss.peri_tr_io_input_in[39]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN39_LEVEL	ioss.peri_tr_io_input_in[39]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN40_EDGE	ioss.peri_tr_io_input_in[40]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN40_LEVEL	ioss.peri_tr_io_input_in[40]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN41_EDGE	ioss.peri_tr_io_input_in[41]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN41_LEVEL	ioss.peri_tr_io_input_in[41]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN42_EDGE	ioss.peri_tr_io_input_in[42]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN42_LEVEL	ioss.peri_tr_io_input_in[42]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN43_EDGE	ioss.peri_tr_io_input_in[43]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN43_LEVEL	ioss.peri_tr_io_input_in[43]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN44_EDGE	ioss.peri_tr_io_input_in[44]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN44_LEVEL	ioss.peri_tr_io_input_in[44]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN45_EDGE	ioss.peri_tr_io_input_in[45]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN45_LEVEL	ioss.peri_tr_io_input_in[45]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN46_EDGE	ioss.peri_tr_io_input_in[46]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN46_LEVEL	ioss.peri_tr_io_input_in[46]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN47_EDGE	ioss.peri_tr_io_input_in[47]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN47_LEVEL	ioss.peri_tr_io_input_in[47]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN48_EDGE	ioss.peri_tr_io_input_in[48]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN48_LEVEL	ioss.peri_tr_io_input_in[48]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN49_EDGE	ioss.peri_tr_io_input_in[49]
CYHAL_TRIGGER_IOSS_PERI_TR_IO_INPUT_IN49_LEVEL	ioss.peri_tr_io_input_in[49]
CYHAL_TRIGGER_LPCOMP_DSI_COMP0	lpcomp.dsi_comp0
CYHAL_TRIGGER_LPCOMP_DSI_COMP1	lpcomp.dsi_comp1
CYHAL_TRIGGER_PASS_TR_FIFO_LEVEL_OUT0	pass.tr_fifo_level_out[0]
CYHAL_TRIGGER_PASS_TR_FIFO_LEVEL_OUT1	pass.tr_fifo_level_out[1]
CYHAL_TRIGGER_PASS_TR_FIFO_LEVEL_OUT2	pass.tr_fifo_level_out[2]
CYHAL_TRIGGER_PASS_TR_FIFO_LEVEL_OUT3	pass.tr_fifo_level_out[3]
CYHAL_TRIGGER_PASS_TR_LEVEL_OUT0	pass.tr_level_out[0]
CYHAL_TRIGGER_PASS_TR_LEVEL_OUT1	pass.tr_level_out[1]
CYHAL_TRIGGER_PASS_TR_LEVEL_OUT2	pass.tr_level_out[2]
CYHAL_TRIGGER_PASS_TR_LEVEL_OUT3	pass.tr_level_out[3]
CYHAL_TRIGGER_PASS_TR_LEVEL_OUT4	pass.tr_level_out[4]
CYHAL_TRIGGER_PASS_TR_LEVEL_OUT5	pass.tr_level_out[5]
CYHAL_TRIGGER_PASS_TR_LEVEL_OUT6	pass.tr_level_out[6]
CYHAL_TRIGGER_PASS_TR_LEVEL_OUT7	pass.tr_level_out[7]
CYHAL_TRIGGER_PASS_TR_PULSE_OUT0_EDGE	pass.tr_pulse_out[0]
CYHAL_TRIGGER_PASS_TR_PULSE_OUT0_LEVEL	pass.tr_pulse_out[0]
CYHAL_TRIGGER_PASS_TR_PULSE_OUT1_EDGE	pass.tr_pulse_out[1]
CYHAL_TRIGGER_PASS_TR_PULSE_OUT1_LEVEL	pass.tr_pulse_out[1]
CYHAL_TRIGGER_PASS_TR_PULSE_OUT2_EDGE	pass.tr_pulse_out[2]
CYHAL_TRIGGER_PASS_TR_PULSE_OUT2_LEVEL	pass.tr_pulse_out[2]
CYHAL_TRIGGER_PASS_TR_PULSE_OUT3_EDGE	pass.tr_pulse_out[3]
CYHAL_TRIGGER_PASS_TR_PULSE_OUT3_LEVEL	pass.tr_pulse_out[3]
CYHAL_TRIGGER_PASS_TR_PULSE_OUT4_EDGE	pass.tr_pulse_out[4]
CYHAL_TRIGGER_PASS_TR_PULSE_OUT4_LEVEL	pass.tr_pulse_out[4]
CYHAL_TRIGGER_PASS_TR_PULSE_OUT5_EDGE	pass.tr_pulse_out[5]
CYHAL_TRIGGER_PASS_TR_PULSE_OUT5_LEVEL	pass.tr_pulse_out[5]
CYHAL_TRIGGER_PASS_TR_PULSE_OUT6_EDGE	pass.tr_pulse_out[6]
CYHAL_TRIGGER_PASS_TR_PULSE_OUT6_LEVEL	pass.tr_pulse_out[6]
CYHAL_TRIGGER_PASS_TR_PULSE_OUT7_EDGE	pass.tr_pulse_out[7]
CYHAL_TRIGGER_PASS_TR_PULSE_OUT7_LEVEL	pass.tr_pulse_out[7]
CYHAL_TRIGGER_SCB0_TR_I2C_SCL_FILTERED	scb[0].tr_i2c_scl_filtered
CYHAL_TRIGGER_SCB1_TR_I2C_SCL_FILTERED	scb[1].tr_i2c_scl_filtered
CYHAL_TRIGGER_SCB2_TR_I2C_SCL_FILTERED	scb[2].tr_i2c_scl_filtered
CYHAL_TRIGGER_SCB3_TR_I2C_SCL_FILTERED	scb[3].tr_i2c_scl_filtered
CYHAL_TRIGGER_SCB4_TR_I2C_SCL_FILTERED	scb[4].tr_i2c_scl_filtered
CYHAL_TRIGGER_SCB5_TR_I2C_SCL_FILTERED	scb[5].tr_i2c_scl_filtered
CYHAL_TRIGGER_SCB0_TR_RX_REQ	scb[0].tr_rx_req
CYHAL_TRIGGER_SCB1_TR_RX_REQ	scb[1].tr_rx_req
CYHAL_TRIGGER_SCB2_TR_RX_REQ	scb[2].tr_rx_req
CYHAL_TRIGGER_SCB3_TR_RX_REQ	scb[3].tr_rx_req
CYHAL_TRIGGER_SCB4_TR_RX_REQ	scb[4].tr_rx_req
CYHAL_TRIGGER_SCB5_TR_RX_REQ	scb[5].tr_rx_req
CYHAL_TRIGGER_SCB0_TR_TX_REQ	scb[0].tr_tx_req
CYHAL_TRIGGER_SCB1_TR_TX_REQ	scb[1].tr_tx_req
CYHAL_TRIGGER_SCB2_TR_TX_REQ	scb[2].tr_tx_req
CYHAL_TRIGGER_SCB3_TR_TX_REQ	scb[3].tr_tx_req
CYHAL_TRIGGER_SCB4_TR_TX_REQ	scb[4].tr_tx_req
CYHAL_TRIGGER_SCB5_TR_TX_REQ	scb[5].tr_tx_req
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL0_EDGE	tcpwm[0].tr_line_compl[0]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL0_LEVEL	tcpwm[0].tr_line_compl[0]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL1_EDGE	tcpwm[0].tr_line_compl[1]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL1_LEVEL	tcpwm[0].tr_line_compl[1]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL2_EDGE	tcpwm[0].tr_line_compl[2]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL2_LEVEL	tcpwm[0].tr_line_compl[2]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL3_EDGE	tcpwm[0].tr_line_compl[3]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL3_LEVEL	tcpwm[0].tr_line_compl[3]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL256_EDGE	tcpwm[0].tr_line_compl[256]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL256_LEVEL	tcpwm[0].tr_line_compl[256]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL257_EDGE	tcpwm[0].tr_line_compl[257]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL257_LEVEL	tcpwm[0].tr_line_compl[257]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL258_EDGE	tcpwm[0].tr_line_compl[258]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL258_LEVEL	tcpwm[0].tr_line_compl[258]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL259_EDGE	tcpwm[0].tr_line_compl[259]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL259_LEVEL	tcpwm[0].tr_line_compl[259]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL260_EDGE	tcpwm[0].tr_line_compl[260]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL260_LEVEL	tcpwm[0].tr_line_compl[260]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL261_EDGE	tcpwm[0].tr_line_compl[261]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL261_LEVEL	tcpwm[0].tr_line_compl[261]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL262_EDGE	tcpwm[0].tr_line_compl[262]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL262_LEVEL	tcpwm[0].tr_line_compl[262]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL263_EDGE	tcpwm[0].tr_line_compl[263]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL263_LEVEL	tcpwm[0].tr_line_compl[263]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL512_EDGE	tcpwm[0].tr_line_compl[512]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL512_LEVEL	tcpwm[0].tr_line_compl[512]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL513_EDGE	tcpwm[0].tr_line_compl[513]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL513_LEVEL	tcpwm[0].tr_line_compl[513]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL514_EDGE	tcpwm[0].tr_line_compl[514]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL514_LEVEL	tcpwm[0].tr_line_compl[514]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL515_EDGE	tcpwm[0].tr_line_compl[515]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL515_LEVEL	tcpwm[0].tr_line_compl[515]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL516_EDGE	tcpwm[0].tr_line_compl[516]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL516_LEVEL	tcpwm[0].tr_line_compl[516]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL517_EDGE	tcpwm[0].tr_line_compl[517]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL517_LEVEL	tcpwm[0].tr_line_compl[517]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL518_EDGE	tcpwm[0].tr_line_compl[518]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL518_LEVEL	tcpwm[0].tr_line_compl[518]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL519_EDGE	tcpwm[0].tr_line_compl[519]
CYHAL_TRIGGER_TCPWM0_TR_LINE_COMPL519_LEVEL	tcpwm[0].tr_line_compl[519]
CYHAL_TRIGGER_TCPWM0_TR_LINE0_EDGE	tcpwm[0].tr_line[0]
CYHAL_TRIGGER_TCPWM0_TR_LINE0_LEVEL	tcpwm[0].tr_line[0]
CYHAL_TRIGGER_TCPWM0_TR_LINE1_EDGE	tcpwm[0].tr_line[1]
CYHAL_TRIGGER_TCPWM0_TR_LINE1_LEVEL	tcpwm[0].tr_line[1]
CYHAL_TRIGGER_TCPWM0_TR_LINE2_EDGE	tcpwm[0].tr_line[2]
CYHAL_TRIGGER_TCPWM0_TR_LINE2_LEVEL	tcpwm[0].tr_line[2]
CYHAL_TRIGGER_TCPWM0_TR_LINE3_EDGE	tcpwm[0].tr_line[3]
CYHAL_TRIGGER_TCPWM0_TR_LINE3_LEVEL	tcpwm[0].tr_line[3]
CYHAL_TRIGGER_TCPWM0_TR_LINE256_EDGE	tcpwm[0].tr_line[256]
CYHAL_TRIGGER_TCPWM0_TR_LINE256_LEVEL	tcpwm[0].tr_line[256]
CYHAL_TRIGGER_TCPWM0_TR_LINE257_EDGE	tcpwm[0].tr_line[257]
CYHAL_TRIGGER_TCPWM0_TR_LINE257_LEVEL	tcpwm[0].tr_line[257]
CYHAL_TRIGGER_TCPWM0_TR_LINE258_EDGE	tcpwm[0].tr_line[258]
CYHAL_TRIGGER_TCPWM0_TR_LINE258_LEVEL	tcpwm[0].tr_line[258]
CYHAL_TRIGGER_TCPWM0_TR_LINE259_EDGE	tcpwm[0].tr_line[259]
CYHAL_TRIGGER_TCPWM0_TR_LINE259_LEVEL	tcpwm[0].tr_line[259]
CYHAL_TRIGGER_TCPWM0_TR_LINE260_EDGE	tcpwm[0].tr_line[260]
CYHAL_TRIGGER_TCPWM0_TR_LINE260_LEVEL	tcpwm[0].tr_line[260]
CYHAL_TRIGGER_TCPWM0_TR_LINE261_EDGE	tcpwm[0].tr_line[261]
CYHAL_TRIGGER_TCPWM0_TR_LINE261_LEVEL	tcpwm[0].tr_line[261]
CYHAL_TRIGGER_TCPWM0_TR_LINE262_EDGE	tcpwm[0].tr_line[262]
CYHAL_TRIGGER_TCPWM0_TR_LINE262_LEVEL	tcpwm[0].tr_line[262]
CYHAL_TRIGGER_TCPWM0_TR_LINE263_EDGE	tcpwm[0].tr_line[263]
CYHAL_TRIGGER_TCPWM0_TR_LINE263_LEVEL	tcpwm[0].tr_line[263]
CYHAL_TRIGGER_TCPWM0_TR_LINE512_EDGE	tcpwm[0].tr_line[512]
CYHAL_TRIGGER_TCPWM0_TR_LINE512_LEVEL	tcpwm[0].tr_line[512]
CYHAL_TRIGGER_TCPWM0_TR_LINE513_EDGE	tcpwm[0].tr_line[513]
CYHAL_TRIGGER_TCPWM0_TR_LINE513_LEVEL	tcpwm[0].tr_line[513]
CYHAL_TRIGGER_TCPWM0_TR_LINE514_EDGE	tcpwm[0].tr_line[514]
CYHAL_TRIGGER_TCPWM0_TR_LINE514_LEVEL	tcpwm[0].tr_line[514]
CYHAL_TRIGGER_TCPWM0_TR_LINE515_EDGE	tcpwm[0].tr_line[515]
CYHAL_TRIGGER_TCPWM0_TR_LINE515_LEVEL	tcpwm[0].tr_line[515]
CYHAL_TRIGGER_TCPWM0_TR_LINE516_EDGE	tcpwm[0].tr_line[516]
CYHAL_TRIGGER_TCPWM0_TR_LINE516_LEVEL	tcpwm[0].tr_line[516]
CYHAL_TRIGGER_TCPWM0_TR_LINE517_EDGE	tcpwm[0].tr_line[517]
CYHAL_TRIGGER_TCPWM0_TR_LINE517_LEVEL	tcpwm[0].tr_line[517]
CYHAL_TRIGGER_TCPWM0_TR_LINE518_EDGE	tcpwm[0].tr_line[518]
CYHAL_TRIGGER_TCPWM0_TR_LINE518_LEVEL	tcpwm[0].tr_line[518]
CYHAL_TRIGGER_TCPWM0_TR_LINE519_EDGE	tcpwm[0].tr_line[519]
CYHAL_TRIGGER_TCPWM0_TR_LINE519_LEVEL	tcpwm[0].tr_line[519]
CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT256_EDGE	tcpwm[0].tr_motif_out[256]
CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT256_LEVEL	tcpwm[0].tr_motif_out[256]
CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT257_EDGE	tcpwm[0].tr_motif_out[257]
CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT257_LEVEL	tcpwm[0].tr_motif_out[257]
CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT258_EDGE	tcpwm[0].tr_motif_out[258]
CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT258_LEVEL	tcpwm[0].tr_motif_out[258]
CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT259_EDGE	tcpwm[0].tr_motif_out[259]
CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT259_LEVEL	tcpwm[0].tr_motif_out[259]
CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT260_EDGE	tcpwm[0].tr_motif_out[260]
CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT260_LEVEL	tcpwm[0].tr_motif_out[260]
CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT261_EDGE	tcpwm[0].tr_motif_out[261]
CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT261_LEVEL	tcpwm[0].tr_motif_out[261]
CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT262_EDGE	tcpwm[0].tr_motif_out[262]
CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT262_LEVEL	tcpwm[0].tr_motif_out[262]
CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT263_EDGE	tcpwm[0].tr_motif_out[263]
CYHAL_TRIGGER_TCPWM0_TR_MOTIF_OUT263_LEVEL	tcpwm[0].tr_motif_out[263]
CYHAL_TRIGGER_TCPWM0_TR_OUT00_EDGE	tcpwm[0].tr_out0[0]
CYHAL_TRIGGER_TCPWM0_TR_OUT00_LEVEL	tcpwm[0].tr_out0[0]
CYHAL_TRIGGER_TCPWM0_TR_OUT01_EDGE	tcpwm[0].tr_out0[1]
CYHAL_TRIGGER_TCPWM0_TR_OUT01_LEVEL	tcpwm[0].tr_out0[1]
CYHAL_TRIGGER_TCPWM0_TR_OUT02_EDGE	tcpwm[0].tr_out0[2]
CYHAL_TRIGGER_TCPWM0_TR_OUT02_LEVEL	tcpwm[0].tr_out0[2]
CYHAL_TRIGGER_TCPWM0_TR_OUT03_EDGE	tcpwm[0].tr_out0[3]
CYHAL_TRIGGER_TCPWM0_TR_OUT03_LEVEL	tcpwm[0].tr_out0[3]
CYHAL_TRIGGER_TCPWM0_TR_OUT0256_EDGE	tcpwm[0].tr_out0[256]
CYHAL_TRIGGER_TCPWM0_TR_OUT0256_LEVEL	tcpwm[0].tr_out0[256]
CYHAL_TRIGGER_TCPWM0_TR_OUT0257_EDGE	tcpwm[0].tr_out0[257]
CYHAL_TRIGGER_TCPWM0_TR_OUT0257_LEVEL	tcpwm[0].tr_out0[257]
CYHAL_TRIGGER_TCPWM0_TR_OUT0258_EDGE	tcpwm[0].tr_out0[258]
CYHAL_TRIGGER_TCPWM0_TR_OUT0258_LEVEL	tcpwm[0].tr_out0[258]
CYHAL_TRIGGER_TCPWM0_TR_OUT0259_EDGE	tcpwm[0].tr_out0[259]
CYHAL_TRIGGER_TCPWM0_TR_OUT0259_LEVEL	tcpwm[0].tr_out0[259]
CYHAL_TRIGGER_TCPWM0_TR_OUT0260_EDGE	tcpwm[0].tr_out0[260]
CYHAL_TRIGGER_TCPWM0_TR_OUT0260_LEVEL	tcpwm[0].tr_out0[260]
CYHAL_TRIGGER_TCPWM0_TR_OUT0261_EDGE	tcpwm[0].tr_out0[261]
CYHAL_TRIGGER_TCPWM0_TR_OUT0261_LEVEL	tcpwm[0].tr_out0[261]
CYHAL_TRIGGER_TCPWM0_TR_OUT0262_EDGE	tcpwm[0].tr_out0[262]
CYHAL_TRIGGER_TCPWM0_TR_OUT0262_LEVEL	tcpwm[0].tr_out0[262]
CYHAL_TRIGGER_TCPWM0_TR_OUT0263_EDGE	tcpwm[0].tr_out0[263]
CYHAL_TRIGGER_TCPWM0_TR_OUT0263_LEVEL	tcpwm[0].tr_out0[263]
CYHAL_TRIGGER_TCPWM0_TR_OUT0512_EDGE	tcpwm[0].tr_out0[512]
CYHAL_TRIGGER_TCPWM0_TR_OUT0512_LEVEL	tcpwm[0].tr_out0[512]
CYHAL_TRIGGER_TCPWM0_TR_OUT0513_EDGE	tcpwm[0].tr_out0[513]
CYHAL_TRIGGER_TCPWM0_TR_OUT0513_LEVEL	tcpwm[0].tr_out0[513]
CYHAL_TRIGGER_TCPWM0_TR_OUT0514_EDGE	tcpwm[0].tr_out0[514]
CYHAL_TRIGGER_TCPWM0_TR_OUT0514_LEVEL	tcpwm[0].tr_out0[514]
CYHAL_TRIGGER_TCPWM0_TR_OUT0515_EDGE	tcpwm[0].tr_out0[515]
CYHAL_TRIGGER_TCPWM0_TR_OUT0515_LEVEL	tcpwm[0].tr_out0[515]
CYHAL_TRIGGER_TCPWM0_TR_OUT0516_EDGE	tcpwm[0].tr_out0[516]
CYHAL_TRIGGER_TCPWM0_TR_OUT0516_LEVEL	tcpwm[0].tr_out0[516]
CYHAL_TRIGGER_TCPWM0_TR_OUT0517_EDGE	tcpwm[0].tr_out0[517]
CYHAL_TRIGGER_TCPWM0_TR_OUT0517_LEVEL	tcpwm[0].tr_out0[517]
CYHAL_TRIGGER_TCPWM0_TR_OUT0518_EDGE	tcpwm[0].tr_out0[518]
CYHAL_TRIGGER_TCPWM0_TR_OUT0518_LEVEL	tcpwm[0].tr_out0[518]
CYHAL_TRIGGER_TCPWM0_TR_OUT0519_EDGE	tcpwm[0].tr_out0[519]
CYHAL_TRIGGER_TCPWM0_TR_OUT0519_LEVEL	tcpwm[0].tr_out0[519]
CYHAL_TRIGGER_TCPWM0_TR_OUT10_EDGE	tcpwm[0].tr_out1[0]
CYHAL_TRIGGER_TCPWM0_TR_OUT10_LEVEL	tcpwm[0].tr_out1[0]
CYHAL_TRIGGER_TCPWM0_TR_OUT11_EDGE	tcpwm[0].tr_out1[1]
CYHAL_TRIGGER_TCPWM0_TR_OUT11_LEVEL	tcpwm[0].tr_out1[1]
CYHAL_TRIGGER_TCPWM0_TR_OUT12_EDGE	tcpwm[0].tr_out1[2]
CYHAL_TRIGGER_TCPWM0_TR_OUT12_LEVEL	tcpwm[0].tr_out1[2]
CYHAL_TRIGGER_TCPWM0_TR_OUT13_EDGE	tcpwm[0].tr_out1[3]
CYHAL_TRIGGER_TCPWM0_TR_OUT13_LEVEL	tcpwm[0].tr_out1[3]
CYHAL_TRIGGER_TCPWM0_TR_OUT1256_EDGE	tcpwm[0].tr_out1[256]
CYHAL_TRIGGER_TCPWM0_TR_OUT1256_LEVEL	tcpwm[0].tr_out1[256]
CYHAL_TRIGGER_TCPWM0_TR_OUT1257_EDGE	tcpwm[0].tr_out1[257]
CYHAL_TRIGGER_TCPWM0_TR_OUT1257_LEVEL	tcpwm[0].tr_out1[257]
CYHAL_TRIGGER_TCPWM0_TR_OUT1258_EDGE	tcpwm[0].tr_out1[258]
CYHAL_TRIGGER_TCPWM0_TR_OUT1258_LEVEL	tcpwm[0].tr_out1[258]
CYHAL_TRIGGER_TCPWM0_TR_OUT1259_EDGE	tcpwm[0].tr_out1[259]
CYHAL_TRIGGER_TCPWM0_TR_OUT1259_LEVEL	tcpwm[0].tr_out1[259]
CYHAL_TRIGGER_TCPWM0_TR_OUT1260_EDGE	tcpwm[0].tr_out1[260]
CYHAL_TRIGGER_TCPWM0_TR_OUT1260_LEVEL	tcpwm[0].tr_out1[260]
CYHAL_TRIGGER_TCPWM0_TR_OUT1261_EDGE	tcpwm[0].tr_out1[261]
CYHAL_TRIGGER_TCPWM0_TR_OUT1261_LEVEL	tcpwm[0].tr_out1[261]
CYHAL_TRIGGER_TCPWM0_TR_OUT1262_EDGE	tcpwm[0].tr_out1[262]
CYHAL_TRIGGER_TCPWM0_TR_OUT1262_LEVEL	tcpwm[0].tr_out1[262]
CYHAL_TRIGGER_TCPWM0_TR_OUT1263_EDGE	tcpwm[0].tr_out1[263]
CYHAL_TRIGGER_TCPWM0_TR_OUT1263_LEVEL	tcpwm[0].tr_out1[263]
CYHAL_TRIGGER_TCPWM0_TR_OUT1512_EDGE	tcpwm[0].tr_out1[512]
CYHAL_TRIGGER_TCPWM0_TR_OUT1512_LEVEL	tcpwm[0].tr_out1[512]
CYHAL_TRIGGER_TCPWM0_TR_OUT1513_EDGE	tcpwm[0].tr_out1[513]
CYHAL_TRIGGER_TCPWM0_TR_OUT1513_LEVEL	tcpwm[0].tr_out1[513]
CYHAL_TRIGGER_TCPWM0_TR_OUT1514_EDGE	tcpwm[0].tr_out1[514]
CYHAL_TRIGGER_TCPWM0_TR_OUT1514_LEVEL	tcpwm[0].tr_out1[514]
CYHAL_TRIGGER_TCPWM0_TR_OUT1515_EDGE	tcpwm[0].tr_out1[515]
CYHAL_TRIGGER_TCPWM0_TR_OUT1515_LEVEL	tcpwm[0].tr_out1[515]
CYHAL_TRIGGER_TCPWM0_TR_OUT1516_EDGE	tcpwm[0].tr_out1[516]
CYHAL_TRIGGER_TCPWM0_TR_OUT1516_LEVEL	tcpwm[0].tr_out1[516]
CYHAL_TRIGGER_TCPWM0_TR_OUT1517_EDGE	tcpwm[0].tr_out1[517]
CYHAL_TRIGGER_TCPWM0_TR_OUT1517_LEVEL	tcpwm[0].tr_out1[517]
CYHAL_TRIGGER_TCPWM0_TR_OUT1518_EDGE	tcpwm[0].tr_out1[518]
CYHAL_TRIGGER_TCPWM0_TR_OUT1518_LEVEL	tcpwm[0].tr_out1[518]
CYHAL_TRIGGER_TCPWM0_TR_OUT1519_EDGE	tcpwm[0].tr_out1[519]
CYHAL_TRIGGER_TCPWM0_TR_OUT1519_LEVEL	tcpwm[0].tr_out1[519]

cyhal_trigger_dest_psc3_t

enum cyhal_trigger_dest_psc3_t

Name of each output trigger.

Enumerator
CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_ACK0	CAN DW0 triggers (from DW back to CAN) - canfd[0].tr_dbg_dma_ack[0].
CYHAL_TRIGGER_CANFD0_TR_DBG_DMA_ACK1	CAN DW0 triggers (from DW back to CAN) - canfd[0].tr_dbg_dma_ack[1].
CYHAL_TRIGGER_CANFD0_TR_EVT_SWT_IN0	CAN TT Sync - canfd[0].tr_evt_swt_in[0].
CYHAL_TRIGGER_CANFD0_TR_EVT_SWT_IN1	CAN TT Sync - canfd[0].tr_evt_swt_in[1].
CYHAL_TRIGGER_CPUSS_DW0_TR_IN0	P-DMA0 trigger multiplexer - cpuss.dw0_tr_in[0].
CYHAL_TRIGGER_CPUSS_DW0_TR_IN1	P-DMA0 trigger multiplexer - cpuss.dw0_tr_in[1].
CYHAL_TRIGGER_CPUSS_DW0_TR_IN2	P-DMA0 trigger multiplexer - cpuss.dw0_tr_in[2].
CYHAL_TRIGGER_CPUSS_DW0_TR_IN3	P-DMA0 trigger multiplexer - cpuss.dw0_tr_in[3].
CYHAL_TRIGGER_CPUSS_DW0_TR_IN4	P-DMA0 trigger multiplexer - cpuss.dw0_tr_in[4].
CYHAL_TRIGGER_CPUSS_DW0_TR_IN5	P-DMA0 trigger multiplexer - cpuss.dw0_tr_in[5].
CYHAL_TRIGGER_CPUSS_DW0_TR_IN6	P-DMA0 trigger multiplexer - cpuss.dw0_tr_in[6].
CYHAL_TRIGGER_CPUSS_DW0_TR_IN7	P-DMA0 trigger multiplexer - cpuss.dw0_tr_in[7].
CYHAL_TRIGGER_CPUSS_DW0_TR_IN8	P-DMA0 trigger multiplexer - cpuss.dw0_tr_in[8].
CYHAL_TRIGGER_CPUSS_DW0_TR_IN9	P-DMA0 trigger multiplexer - cpuss.dw0_tr_in[9].
CYHAL_TRIGGER_CPUSS_DW0_TR_IN10	P-DMA0 trigger multiplexer - cpuss.dw0_tr_in[10].
CYHAL_TRIGGER_CPUSS_DW0_TR_IN11	P-DMA0 trigger multiplexer - cpuss.dw0_tr_in[11].
CYHAL_TRIGGER_CPUSS_DW0_TR_IN12	P-DMA0 trigger multiplexer - cpuss.dw0_tr_in[12].
CYHAL_TRIGGER_CPUSS_DW0_TR_IN13	P-DMA0 trigger multiplexer - cpuss.dw0_tr_in[13].
CYHAL_TRIGGER_CPUSS_DW0_TR_IN14	P-DMA0 trigger multiplexer - cpuss.dw0_tr_in[14].
CYHAL_TRIGGER_CPUSS_DW0_TR_IN15	P-DMA0 trigger multiplexer - cpuss.dw0_tr_in[15].
CYHAL_TRIGGER_CPUSS_DW1_TR_IN0	P-DMA1 trigger multiplexer - cpuss.dw1_tr_in[0].
CYHAL_TRIGGER_CPUSS_DW1_TR_IN1	P-DMA1 trigger multiplexer - cpuss.dw1_tr_in[1].
CYHAL_TRIGGER_CPUSS_DW1_TR_IN2	P-DMA1 trigger multiplexer - cpuss.dw1_tr_in[2].
CYHAL_TRIGGER_CPUSS_DW1_TR_IN3	P-DMA1 trigger multiplexer - cpuss.dw1_tr_in[3].
CYHAL_TRIGGER_CPUSS_DW1_TR_IN4	P-DMA1 trigger multiplexer - cpuss.dw1_tr_in[4].
CYHAL_TRIGGER_CPUSS_DW1_TR_IN5	P-DMA1 trigger multiplexer - cpuss.dw1_tr_in[5].
CYHAL_TRIGGER_CPUSS_DW1_TR_IN6	P-DMA1 trigger multiplexer - cpuss.dw1_tr_in[6].
CYHAL_TRIGGER_CPUSS_DW1_TR_IN7	P-DMA1 trigger multiplexer - cpuss.dw1_tr_in[7].
CYHAL_TRIGGER_CPUSS_DW1_TR_IN8	P-DMA1 trigger multiplexer - cpuss.dw1_tr_in[8].
CYHAL_TRIGGER_CPUSS_DW1_TR_IN9	P-DMA1 trigger multiplexer - cpuss.dw1_tr_in[9].
CYHAL_TRIGGER_CPUSS_DW1_TR_IN10	P-DMA1 trigger multiplexer - cpuss.dw1_tr_in[10].
CYHAL_TRIGGER_CPUSS_DW1_TR_IN11	P-DMA1 trigger multiplexer - cpuss.dw1_tr_in[11].
CYHAL_TRIGGER_CPUSS_DW1_TR_IN12	P-DMA1 trigger multiplexer - cpuss.dw1_tr_in[12].
CYHAL_TRIGGER_CPUSS_DW1_TR_IN13	P-DMA1 trigger multiplexer - cpuss.dw1_tr_in[13].
CYHAL_TRIGGER_CPUSS_DW1_TR_IN14	P-DMA1 trigger multiplexer - cpuss.dw1_tr_in[14].
CYHAL_TRIGGER_CPUSS_DW1_TR_IN15	P-DMA1 trigger multiplexer - cpuss.dw1_tr_in[15].
CYHAL_TRIGGER_DEBUG600_CTI_TR_IN0	CPUSS Debug multiplexer - debug600.cti_tr_in[0].
CYHAL_TRIGGER_DEBUG600_CTI_TR_IN1	CPUSS Debug multiplexer - debug600.cti_tr_in[1].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT0	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[0].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT1	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[1].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT2	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[2].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT3	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[3].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT4	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[4].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT5	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[5].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT6	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[6].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT7	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[7].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT8	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[8].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT9	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[9].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT10	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[10].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT11	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[11].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT12	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[12].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT13	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[13].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT14	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[14].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT15	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[15].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT16	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[16].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT17	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[17].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT18	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[18].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT19	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[19].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT20	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[20].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT21	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[21].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT22	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[22].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT23	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[23].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT24	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[24].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT25	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[25].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT26	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[26].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT27	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[27].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT28	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[28].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT29	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[29].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT30	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[30].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT31	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[31].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT32	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[32].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT33	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[33].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT34	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[34].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT35	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[35].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT36	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[36].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT37	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[37].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT38	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[38].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT39	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[39].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT40	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[40].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT41	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[41].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT42	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[42].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT43	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[43].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT44	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[44].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT45	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[45].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT46	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[46].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT47	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[47].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT48	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[48].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT49	HSIOM0 trigger multiplexer - ioss.peri_tr_io_output_out[49].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT50	HSIOM1 trigger multiplexer - ioss.peri_tr_io_output_out[50].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT51	HSIOM1 trigger multiplexer - ioss.peri_tr_io_output_out[51].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT52	HSIOM1 trigger multiplexer - ioss.peri_tr_io_output_out[52].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT53	HSIOM1 trigger multiplexer - ioss.peri_tr_io_output_out[53].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT54	HSIOM1 trigger multiplexer - ioss.peri_tr_io_output_out[54].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT55	HSIOM1 trigger multiplexer - ioss.peri_tr_io_output_out[55].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT56	HSIOM1 trigger multiplexer - ioss.peri_tr_io_output_out[56].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT57	HSIOM1 trigger multiplexer - ioss.peri_tr_io_output_out[57].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT58	HSIOM2 trigger multiplexer - ioss.peri_tr_io_output_out[58].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT59	HSIOM2 trigger multiplexer - ioss.peri_tr_io_output_out[59].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT60	HSIOM2 trigger multiplexer - ioss.peri_tr_io_output_out[60].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT61	HSIOM2 trigger multiplexer - ioss.peri_tr_io_output_out[61].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT62	HSIOM2 trigger multiplexer - ioss.peri_tr_io_output_out[62].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT63	HSIOM2 trigger multiplexer - ioss.peri_tr_io_output_out[63].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT64	HSIOM2 trigger multiplexer - ioss.peri_tr_io_output_out[64].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT65	HSIOM2 trigger multiplexer - ioss.peri_tr_io_output_out[65].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT66	HSIOM3 trigger multiplexer - ioss.peri_tr_io_output_out[66].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT67	HSIOM3 trigger multiplexer - ioss.peri_tr_io_output_out[67].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT68	HSIOM3 trigger multiplexer - ioss.peri_tr_io_output_out[68].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT69	HSIOM3 trigger multiplexer - ioss.peri_tr_io_output_out[69].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT70	HSIOM3 trigger multiplexer - ioss.peri_tr_io_output_out[70].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT71	HSIOM3 trigger multiplexer - ioss.peri_tr_io_output_out[71].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT72	HSIOM3 trigger multiplexer - ioss.peri_tr_io_output_out[72].
CYHAL_TRIGGER_IOSS_PERI_TR_IO_OUTPUT_OUT73	HSIOM3 trigger multiplexer - ioss.peri_tr_io_output_out[73].
CYHAL_TRIGGER_PASS_TR_A_IN0	MCPASS trigger multiplexer - pass.tr_a_in[0].
CYHAL_TRIGGER_PASS_TR_A_IN1	MCPASS trigger multiplexer - pass.tr_a_in[1].
CYHAL_TRIGGER_PASS_TR_A_IN2	MCPASS trigger multiplexer - pass.tr_a_in[2].
CYHAL_TRIGGER_PASS_TR_A_IN3	MCPASS trigger multiplexer - pass.tr_a_in[3].
CYHAL_TRIGGER_PASS_TR_A_IN4	MCPASS trigger multiplexer - pass.tr_a_in[4].
CYHAL_TRIGGER_PASS_TR_A_IN5	MCPASS trigger multiplexer - pass.tr_a_in[5].
CYHAL_TRIGGER_PASS_TR_A_IN6	MCPASS trigger multiplexer - pass.tr_a_in[6].
CYHAL_TRIGGER_PASS_TR_A_IN7	MCPASS trigger multiplexer - pass.tr_a_in[7].
CYHAL_TRIGGER_PASS_TR_B_IN0	MCPASS triggers - pass.tr_b_in[0].
CYHAL_TRIGGER_PASS_TR_B_IN1	MCPASS triggers - pass.tr_b_in[1].
CYHAL_TRIGGER_PASS_TR_B_IN2	MCPASS triggers - pass.tr_b_in[2].
CYHAL_TRIGGER_PASS_TR_B_IN3	MCPASS triggers - pass.tr_b_in[3].
CYHAL_TRIGGER_PASS_TR_B_IN4	MCPASS triggers - pass.tr_b_in[4].
CYHAL_TRIGGER_PASS_TR_B_IN5	MCPASS triggers - pass.tr_b_in[5].
CYHAL_TRIGGER_PASS_TR_B_IN6	MCPASS triggers - pass.tr_b_in[6].
CYHAL_TRIGGER_PASS_TR_B_IN7	MCPASS triggers - pass.tr_b_in[7].
CYHAL_TRIGGER_PERI_TR_DBG_FREEZE	PERI Freeze trigger multiplexer - peri.tr_dbg_freeze.
CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN0	TCPWM0 trigger multiplexer - tcpwm[0].tr_all_cnt_in[0].
CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN1	TCPWM0 trigger multiplexer - tcpwm[0].tr_all_cnt_in[1].
CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN2	TCPWM0 trigger multiplexer - tcpwm[0].tr_all_cnt_in[2].
CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN3	TCPWM0 trigger multiplexer - tcpwm[0].tr_all_cnt_in[3].
CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN4	TCPWM1 trigger multiplexer - tcpwm[0].tr_all_cnt_in[4].
CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN5	TCPWM1 trigger multiplexer - tcpwm[0].tr_all_cnt_in[5].
CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN6	TCPWM1 trigger multiplexer - tcpwm[0].tr_all_cnt_in[6].
CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN7	TCPWM1 trigger multiplexer - tcpwm[0].tr_all_cnt_in[7].
CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN8	TCPWM1 trigger multiplexer - tcpwm[0].tr_all_cnt_in[8].
CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN9	TCPWM1 trigger multiplexer - tcpwm[0].tr_all_cnt_in[9].
CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN10	TCPWM1 trigger multiplexer - tcpwm[0].tr_all_cnt_in[10].
CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN11	TCPWM1 trigger multiplexer - tcpwm[0].tr_all_cnt_in[11].
CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN12	TCPWM1 trigger multiplexer - tcpwm[0].tr_all_cnt_in[12].
CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN13	TCPWM1 trigger multiplexer - tcpwm[0].tr_all_cnt_in[13].
CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN14	TCPWM1 trigger multiplexer - tcpwm[0].tr_all_cnt_in[14].
CYHAL_TRIGGER_TCPWM0_TR_ALL_CNT_IN15	TCPWM1 trigger multiplexer - tcpwm[0].tr_all_cnt_in[15].
CYHAL_TRIGGER_TCPWM0_TR_DEBUG_FREEZE	PERI Freeze trigger multiplexer - tcpwm[0].tr_debug_freeze.
CYHAL_TRIGGER_TCPWM0_TR_MOTIF_IN256	TCPWM MOTIF trigger multiplexer - tcpwm[0].tr_motif_in[256].
CYHAL_TRIGGER_TCPWM0_TR_MOTIF_IN257	TCPWM MOTIF trigger multiplexer - tcpwm[0].tr_motif_in[257].
CYHAL_TRIGGER_TCPWM0_TR_MOTIF_IN258	TCPWM MOTIF trigger multiplexer - tcpwm[0].tr_motif_in[258].
CYHAL_TRIGGER_TCPWM0_TR_MOTIF_IN259	TCPWM MOTIF trigger multiplexer - tcpwm[0].tr_motif_in[259].
CYHAL_TRIGGER_TCPWM0_TR_MOTIF_IN260	TCPWM MOTIF trigger multiplexer - tcpwm[0].tr_motif_in[260].
CYHAL_TRIGGER_TCPWM0_TR_MOTIF_IN261	TCPWM MOTIF trigger multiplexer - tcpwm[0].tr_motif_in[261].
CYHAL_TRIGGER_TCPWM0_TR_MOTIF_IN262	TCPWM MOTIF trigger multiplexer - tcpwm[0].tr_motif_in[262].
CYHAL_TRIGGER_TCPWM0_TR_MOTIF_IN263	TCPWM MOTIF trigger multiplexer - tcpwm[0].tr_motif_in[263].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN0	MCPASS CSG triggers - tcpwm[0].tr_one_cnt_in[0].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1	TCPWM2 trigger multiplexer - tcpwm[0].tr_one_cnt_in[1].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN2	TCPWM3 trigger multiplexer - tcpwm[0].tr_one_cnt_in[2].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN3	MCPASS CSG triggers - tcpwm[0].tr_one_cnt_in[3].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN4	TCPWM2 trigger multiplexer - tcpwm[0].tr_one_cnt_in[4].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN5	TCPWM3 trigger multiplexer - tcpwm[0].tr_one_cnt_in[5].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN6	MCPASS CSG triggers - tcpwm[0].tr_one_cnt_in[6].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN7	TCPWM2 trigger multiplexer - tcpwm[0].tr_one_cnt_in[7].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN8	TCPWM3 trigger multiplexer - tcpwm[0].tr_one_cnt_in[8].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN9	MCPASS CSG triggers - tcpwm[0].tr_one_cnt_in[9].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN10	TCPWM2 trigger multiplexer - tcpwm[0].tr_one_cnt_in[10].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN11	TCPWM3 trigger multiplexer - tcpwm[0].tr_one_cnt_in[11].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1536	MCPASS CSG triggers - tcpwm[0].tr_one_cnt_in[1536].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1537	TCPWM2 trigger multiplexer - tcpwm[0].tr_one_cnt_in[1537].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1538	TCPWM3 trigger multiplexer - tcpwm[0].tr_one_cnt_in[1538].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1539	MCPASS CSG triggers - tcpwm[0].tr_one_cnt_in[1539].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1540	TCPWM2 trigger multiplexer - tcpwm[0].tr_one_cnt_in[1540].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1541	TCPWM3 trigger multiplexer - tcpwm[0].tr_one_cnt_in[1541].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1542	MCPASS CSG triggers - tcpwm[0].tr_one_cnt_in[1542].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1543	TCPWM2 trigger multiplexer - tcpwm[0].tr_one_cnt_in[1543].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1544	TCPWM3 trigger multiplexer - tcpwm[0].tr_one_cnt_in[1544].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1545	MCPASS CSG triggers - tcpwm[0].tr_one_cnt_in[1545].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1546	TCPWM2 trigger multiplexer - tcpwm[0].tr_one_cnt_in[1546].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1547	TCPWM3 trigger multiplexer - tcpwm[0].tr_one_cnt_in[1547].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1548	MCPASS CSG triggers - tcpwm[0].tr_one_cnt_in[1548].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1549	TCPWM2 trigger multiplexer - tcpwm[0].tr_one_cnt_in[1549].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1550	TCPWM3 trigger multiplexer - tcpwm[0].tr_one_cnt_in[1550].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1551	MCPASS CSG triggers - tcpwm[0].tr_one_cnt_in[1551].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1552	TCPWM2 trigger multiplexer - tcpwm[0].tr_one_cnt_in[1552].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1553	TCPWM3 trigger multiplexer - tcpwm[0].tr_one_cnt_in[1553].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1554	MCPASS CSG triggers - tcpwm[0].tr_one_cnt_in[1554].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1555	TCPWM2 trigger multiplexer - tcpwm[0].tr_one_cnt_in[1555].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1556	TCPWM3 trigger multiplexer - tcpwm[0].tr_one_cnt_in[1556].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1557	MCPASS CSG triggers - tcpwm[0].tr_one_cnt_in[1557].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1558	TCPWM2 trigger multiplexer - tcpwm[0].tr_one_cnt_in[1558].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN1559	TCPWM3 trigger multiplexer - tcpwm[0].tr_one_cnt_in[1559].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN768	MCPASS CSG triggers - tcpwm[0].tr_one_cnt_in[768].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN769	TCPWM2 trigger multiplexer - tcpwm[0].tr_one_cnt_in[769].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN770	TCPWM3 trigger multiplexer - tcpwm[0].tr_one_cnt_in[770].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN771	MCPASS CSG triggers - tcpwm[0].tr_one_cnt_in[771].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN772	TCPWM2 trigger multiplexer - tcpwm[0].tr_one_cnt_in[772].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN773	TCPWM3 trigger multiplexer - tcpwm[0].tr_one_cnt_in[773].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN774	MCPASS CSG triggers - tcpwm[0].tr_one_cnt_in[774].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN775	TCPWM2 trigger multiplexer - tcpwm[0].tr_one_cnt_in[775].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN776	TCPWM3 trigger multiplexer - tcpwm[0].tr_one_cnt_in[776].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN777	MCPASS CSG triggers - tcpwm[0].tr_one_cnt_in[777].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN778	TCPWM2 trigger multiplexer - tcpwm[0].tr_one_cnt_in[778].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN779	TCPWM3 trigger multiplexer - tcpwm[0].tr_one_cnt_in[779].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN780	MCPASS CSG triggers - tcpwm[0].tr_one_cnt_in[780].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN781	TCPWM2 trigger multiplexer - tcpwm[0].tr_one_cnt_in[781].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN782	TCPWM3 trigger multiplexer - tcpwm[0].tr_one_cnt_in[782].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN783	MCPASS CSG triggers - tcpwm[0].tr_one_cnt_in[783].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN784	TCPWM2 trigger multiplexer - tcpwm[0].tr_one_cnt_in[784].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN785	TCPWM3 trigger multiplexer - tcpwm[0].tr_one_cnt_in[785].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN786	MCPASS CSG triggers - tcpwm[0].tr_one_cnt_in[786].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN787	TCPWM2 trigger multiplexer - tcpwm[0].tr_one_cnt_in[787].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN788	TCPWM3 trigger multiplexer - tcpwm[0].tr_one_cnt_in[788].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN789	MCPASS CSG triggers - tcpwm[0].tr_one_cnt_in[789].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN790	TCPWM2 trigger multiplexer - tcpwm[0].tr_one_cnt_in[790].
CYHAL_TRIGGER_TCPWM0_TR_ONE_CNT_IN791	TCPWM3 trigger multiplexer - tcpwm[0].tr_one_cnt_in[791].