Hardware Abstraction Layer (HAL)

General Description

Implementation specific interface for using the Clock driver.

These items, while usable within the HAL, are not necessarily portable between devices. The diagrams below show how the clocks relate to each other. This is a superset of what is available. See the device specific Data Sheet for the exact set of clocks that are available on a specific device.

Code snippets

Note
Error handling code has been intentionally left out of snippets to highlight API usage.

Snippet: System initialization

The following snippet shows the clock driver can be used to initialize all clocks in the system.

Note
This example is device specific.
cy_rslt_t rslt;
cyhal_clock_t clock_path, clock_pll, clock_hf;
cyhal_usb_dev_t usb_obj;
// Initialize the PathMux[1] to source from the IMO
rslt = cyhal_clock_reserve(&clock_path, &CYHAL_CLOCK_PATHMUX[1]);
rslt = cyhal_clock_set_source(&clock_path, &CYHAL_CLOCK_IMO);
rslt = cyhal_clock_set_enabled(&clock_path, true, true);
// Initialize the PLL[0] to source from the PathMux[0], and run at 48MHz
rslt = cyhal_clock_reserve(&clock_pll, &CYHAL_CLOCK_PLL[0]);
rslt = cyhal_clock_set_source(&clock_pll, &clock_path);
rslt = cyhal_clock_set_frequency(&clock_pll, 48000000, NULL);
rslt = cyhal_clock_set_enabled(&clock_pll, true, true);
// Initialize the HF[3] clock to source from the PLL[0], and run at 48MHz
rslt = cyhal_clock_reserve(&clock_hf, &CYHAL_CLOCK_HF[3]);
rslt = cyhal_clock_set_source(&clock_hf, &clock_pll);
rslt = cyhal_clock_set_divider(&clock_hf, 1);
// Initialize the USB with the clock path that was just setup
rslt = cyhal_usb_dev_init(&usb_obj, USBDP, USBDM, &clock_hf);
cy_rslt_t cyhal_clock_set_enabled(cyhal_clock_t *clock, bool enabled, bool wait_for_lock)
Attempts to update the enablement of the specified clock.
cy_rslt_t cyhal_clock_set_frequency(cyhal_clock_t *clock, uint32_t hz, const cyhal_clock_tolerance_t *tolerance)
Attempts to update the operating frequency of the clock.
cy_rslt_t cyhal_clock_set_divider(cyhal_clock_t *clock, uint32_t divider)
Attempts to update the divider, and by extension the operating frequency, of the clock.
cy_rslt_t cyhal_clock_reserve(cyhal_clock_t *clock, const cyhal_clock_t *clock_)
Reserves the specified Clock instance.
cy_rslt_t cyhal_clock_set_source(cyhal_clock_t *clock, const cyhal_clock_t *source)
Attempts to update the source for the specified clock.
const cyhal_clock_t CYHAL_CLOCK_HF[SRSS_NUM_HFROOT]
High Frequency Clock: A high-frequency clock output driving specific peripherals.
const cyhal_clock_t CYHAL_CLOCK_IMO
Internal Main Oscillator: This is a fixed-frequency clock that is commonly used as a general purpose ...
Clock object Application code should not rely on the specific contents of this struct.
Definition: cyhal_hw_resources.h:574
USB Device object.
Definition: cyhal_hw_types.h:1579
@ USBDM
Port 14 Pin 1.
Definition: cyhal_psoc6_01_104_m_csp_ble_usb.h:137
@ USBDP
Port 14 Pin 0.
Definition: cyhal_psoc6_01_104_m_csp_ble_usb.h:135
cy_rslt_t cyhal_usb_dev_init(cyhal_usb_dev_t *obj, cyhal_gpio_t dp, cyhal_gpio_t dm, const cyhal_clock_t *clk)
Initialize the USB instance.
uint32_t cy_rslt_t
Provides the result of an operation as a structured bitfield.
Definition: cy_result.h:426

API Reference

 PSoC™ 6S1 Clocks
 PSoC™ 6S1 Clock Tree:
 
 PSoC™ 6S2 Clocks
 PSoC™ 6S2 Clock Tree:
 
 PSoC™ 6S3 Clocks
 PSoC™ 6S3 Clock Tree:
 
 PSoC™ 6S4 Clocks
 PSoC™ 6S4 Clock Tree:
 
 XMC7100/T2G-B-H-4M Clocks
 XMC7100/T2G-B-H-4M Clock Tree:
 
 XMC7200/T2G-B-H-8M Clocks
 XMC7200/T2G-B-H-8M Clock Tree:
 

Variables

const cyhal_clock_t CYHAL_CLOCK_IMO
 Internal Main Oscillator: This is a fixed-frequency clock that is commonly used as a general purpose source for clocks that do not require specific frequencies or very high accuracy. More...
 
const cyhal_resource_inst_t CYHAL_CLOCK_RSC_IMO
 Internal Main Oscillator: This is a fixed-frequency clock that is commonly used as a general purpose source for clocks that do not require specific frequencies or very high accuracy. More...
 
const cyhal_clock_t CYHAL_CLOCK_EXT
 External Clock: This is an off-chip clock (not an oscillator). More...
 
const cyhal_resource_inst_t CYHAL_CLOCK_RSC_EXT
 External Clock: This is an off-chip clock (not an oscillator). More...
 
const cyhal_clock_t CYHAL_CLOCK_ILO [_CYHAL_SRSS_NUM_ILO]
 Internal Low Speed Oscillator: This is a low accuracy fixed-frequency clock in the kilohertz range that is available in sleep, deep sleep and hibernate power modes.
 
const cyhal_resource_inst_t CYHAL_CLOCK_RSC_ILO [_CYHAL_SRSS_NUM_ILO]
 Internal Low Speed Oscillator: This is a low accuracy fixed-frequency clock in the kilohertz range that is available in sleep, deep sleep and hibernate power modes.
 
const cyhal_resource_inst_t CYHAL_CLOCK_RSC_MFO
 Medium Frequency Oscillator: This source produced by dividing the IMO by 4. More...
 
const cyhal_clock_t CYHAL_CLOCK_LF
 Low Frequency Clock: This clock is the source for the multi-counter watchdog timers (MCWDT), and can also be a source for the RTC.
 
const cyhal_resource_inst_t CYHAL_CLOCK_RSC_LF
 Low Frequency Clock: This clock is the source for the multi-counter watchdog timers (MCWDT), and can also be a source for the RTC.
 
const cyhal_clock_t CYHAL_CLOCK_BAK
 Backup Clock: This clock is available to the backup domain. More...
 
const cyhal_resource_inst_t CYHAL_CLOCK_RSC_BAK
 Backup Clock: This clock is available to the backup domain. More...
 
const cyhal_clock_t CYHAL_CLOCK_ALT_SYS_TICK
 AltSysTickClk: Provides an optional external source for the CM4/CM0+ SysTick timers.
 
const cyhal_resource_inst_t CYHAL_CLOCK_RSC_ALT_SYS_TICK
 AltSysTickClk: Provides an optional external source for the CM4/CM0+ SysTick timers.
 
const cyhal_clock_t CYHAL_CLOCK_FAST
 Fast Clock: This clock is used for the CM4 and associated AHB-Lite bus infrastructure.
 
const cyhal_resource_inst_t CYHAL_CLOCK_RSC_FAST
 Fast Clock: This clock is used for the CM4 and associated AHB-Lite bus infrastructure.
 
const cyhal_clock_t CYHAL_CLOCK_PERI
 Peripheral Clock: This is the source clock for any divided clock in the design.
 
const cyhal_resource_inst_t CYHAL_CLOCK_RSC_PERI
 Peripheral Clock: This is the source clock for any divided clock in the design.
 
const cyhal_clock_t CYHAL_CLOCK_TIMER
 Timer Clock: This clock is intended as a source for high-frequency timers, such as the Energy Profiler and CPU SysTick clock. More...
 
const cyhal_resource_inst_t CYHAL_CLOCK_RSC_TIMER
 Timer Clock: This clock is intended as a source for high-frequency timers, such as the Energy Profiler and CPU SysTick clock. More...
 
const cyhal_clock_t CYHAL_CLOCK_SLOW
 Slow Clock: This clock is used for the CM0+ CPU, Datawire and CRYPTO components and the associated CPUSS slow infrastructure.
 
const cyhal_resource_inst_t CYHAL_CLOCK_RSC_SLOW
 Slow Clock: This clock is used for the CM0+ CPU, Datawire and CRYPTO components and the associated CPUSS slow infrastructure.
 
const cyhal_clock_t CYHAL_CLOCK_FLL
 Frequency-Locked Loop: This is a high-frequency clock suitable for most on-chip purposes. More...
 
const cyhal_resource_inst_t CYHAL_CLOCK_RSC_FLL
 Frequency-Locked Loop: This is a high-frequency clock suitable for most on-chip purposes. More...
 
const cyhal_clock_t CYHAL_CLOCK_HF [SRSS_NUM_HFROOT]
 High Frequency Clock: A high-frequency clock output driving specific peripherals.
 
const cyhal_resource_inst_t CYHAL_CLOCK_RSC_HF [SRSS_NUM_HFROOT]
 High Frequency Clock: A high-frequency clock output driving specific peripherals.
 

Variable Documentation

◆ CYHAL_CLOCK_IMO

const cyhal_clock_t CYHAL_CLOCK_IMO
extern

Internal Main Oscillator: This is a fixed-frequency clock that is commonly used as a general purpose source for clocks that do not require specific frequencies or very high accuracy.

This clock is stopped in the deep sleep and hibernate power modes.

◆ CYHAL_CLOCK_RSC_IMO

const cyhal_resource_inst_t CYHAL_CLOCK_RSC_IMO
extern

Internal Main Oscillator: This is a fixed-frequency clock that is commonly used as a general purpose source for clocks that do not require specific frequencies or very high accuracy.

This clock is stopped in the deep sleep and hibernate power modes.

◆ CYHAL_CLOCK_EXT

const cyhal_clock_t CYHAL_CLOCK_EXT
extern

External Clock: This is an off-chip clock (not an oscillator).

This clock is stopped in the deep sleep and hibernate power modes.

◆ CYHAL_CLOCK_RSC_EXT

const cyhal_resource_inst_t CYHAL_CLOCK_RSC_EXT
extern

External Clock: This is an off-chip clock (not an oscillator).

This clock is stopped in the deep sleep and hibernate power modes.

◆ CYHAL_CLOCK_RSC_MFO

const cyhal_resource_inst_t CYHAL_CLOCK_RSC_MFO
extern

Medium Frequency Oscillator: This source produced by dividing the IMO by 4.

The MFO works down to DeepSleep, and the IMO does not turn off if this clock requires it.

◆ CYHAL_CLOCK_BAK

const cyhal_clock_t CYHAL_CLOCK_BAK
extern

Backup Clock: This clock is available to the backup domain.

Typically useful if an external WCO is not available.

◆ CYHAL_CLOCK_RSC_BAK

const cyhal_resource_inst_t CYHAL_CLOCK_RSC_BAK
extern

Backup Clock: This clock is available to the backup domain.

Typically useful if an external WCO is not available.

◆ CYHAL_CLOCK_TIMER

const cyhal_clock_t CYHAL_CLOCK_TIMER
extern

Timer Clock: This clock is intended as a source for high-frequency timers, such as the Energy Profiler and CPU SysTick clock.

This clock is stopped in the hibernate power mode.

◆ CYHAL_CLOCK_RSC_TIMER

const cyhal_resource_inst_t CYHAL_CLOCK_RSC_TIMER
extern

Timer Clock: This clock is intended as a source for high-frequency timers, such as the Energy Profiler and CPU SysTick clock.

This clock is stopped in the hibernate power mode.

◆ CYHAL_CLOCK_FLL

const cyhal_clock_t CYHAL_CLOCK_FLL
extern

Frequency-Locked Loop: This is a high-frequency clock suitable for most on-chip purposes.

It is similar to a PLL, but starts up much faster and consumes less current. This clock is stopped in the deep sleep and hibernate power modes.

◆ CYHAL_CLOCK_RSC_FLL

const cyhal_resource_inst_t CYHAL_CLOCK_RSC_FLL
extern

Frequency-Locked Loop: This is a high-frequency clock suitable for most on-chip purposes.

It is similar to a PLL, but starts up much faster and consumes less current. This clock is stopped in the deep sleep and hibernate power modes.