PSOC E8XXGP Device Support Library

General Description

Functions

void Cy_SysClk_ExtClkSetFrequency (uint32_t freq)
 Sets the signal frequency of the External Clock Source (EXTCLK) into the internal storage to be used in Cy_SysClk_ClkHfGetFrequency. More...
 
uint32_t Cy_SysClk_ExtClkGetFrequency (void)
 Returns the frequency of the External Clock Source (EXTCLK) from the internal storage. More...
 

Function Documentation

◆ Cy_SysClk_ExtClkSetFrequency()

void Cy_SysClk_ExtClkSetFrequency ( uint32_t  freq)

Sets the signal frequency of the External Clock Source (EXTCLK) into the internal storage to be used in Cy_SysClk_ClkHfGetFrequency.

Parameters
freqThe frequency of the External Clock Source.
Function Usage
/* Scenario: External precision 5MHz clock is needed to source clock path 1. */
/* Configure the external clock input pin */
#if defined(CYT2BL5CAS) || defined(CYT2B75CAS) || defined(CY_DEVICE_SERIES_XMC7100) || defined(CY_DEVICE_SERIES_XMC7200)
(void)Cy_GPIO_Pin_FastInit(GPIO_PRT21, 2, CY_GPIO_DM_HIGHZ, 0x00u, P21_2_SRSS_EXT_CLK);
#elif defined(CY_DEVICE_TVIIC2D6M)
(void)Cy_GPIO_Pin_FastInit(GPIO_PRT15, 4, CY_GPIO_DM_HIGHZ, 0x00u, P15_4_SRSS_EXT_CLK);
#elif defined(CY_DEVICE_FX3G2)
(void)Cy_GPIO_Pin_FastInit(GPIO_PRT5, 1, CY_GPIO_DM_HIGHZ, 0x00u, P5_1_SRSS_EXT_CLK);
#else
(void)Cy_GPIO_Pin_FastInit(GPIO_PRT0, 5, CY_GPIO_DM_HIGHZ, 0x00u, P0_5_SRSS_EXT_CLK);
#endif
/* Set the EXTCLK frequency to 5MHz */
/* Set the EXTCLK as the source for clock path 1 */
/* In case if there is a need to get the EXT CLK frequency */
uint32_t extClkFreq = Cy_SysClk_ExtClkGetFrequency();
#define CY_GPIO_DM_HIGHZ
Digital High-Z.
Definition: cy_gpio.h:514
void Cy_GPIO_Pin_FastInit(GPIO_PRT_Type *base, uint32_t pinNum, uint32_t driveMode, uint32_t outVal, en_hsiom_sel_t hsiom)
Initialize the most common configuration settings for all pin types.
Definition: cy_gpio.c:420
uint32_t Cy_SysClk_ExtClkGetFrequency(void)
Returns the frequency of the External Clock Source (EXTCLK) from the internal storage.
Definition: cy_sysclk_v2.c:4155
void Cy_SysClk_ExtClkSetFrequency(uint32_t freq)
Sets the signal frequency of the External Clock Source (EXTCLK) into the internal storage to be used ...
Definition: cy_sysclk_v2.c:4134
@ CY_SYSCLK_CLKPATH_IN_EXT
Select the EXT as the output of the path mux.
Definition: cy_sysclk.h:826
cy_en_sysclk_status_t Cy_SysClk_ClkPathSetSource(uint32_t clkPath, cy_en_clkpath_in_sources_t source)
Configures the source for the specified clock path.
Definition: cy_sysclk_v2.c:4693

◆ Cy_SysClk_ExtClkGetFrequency()

uint32_t Cy_SysClk_ExtClkGetFrequency ( void  )

Returns the frequency of the External Clock Source (EXTCLK) from the internal storage.

Returns
The frequency of the External Clock Source.
Function Usage
/* Scenario: External precision 5MHz clock is needed to source clock path 1. */
/* Configure the external clock input pin */
#if defined(CYT2BL5CAS) || defined(CYT2B75CAS) || defined(CY_DEVICE_SERIES_XMC7100) || defined(CY_DEVICE_SERIES_XMC7200)
(void)Cy_GPIO_Pin_FastInit(GPIO_PRT21, 2, CY_GPIO_DM_HIGHZ, 0x00u, P21_2_SRSS_EXT_CLK);
#elif defined(CY_DEVICE_TVIIC2D6M)
(void)Cy_GPIO_Pin_FastInit(GPIO_PRT15, 4, CY_GPIO_DM_HIGHZ, 0x00u, P15_4_SRSS_EXT_CLK);
#elif defined(CY_DEVICE_FX3G2)
(void)Cy_GPIO_Pin_FastInit(GPIO_PRT5, 1, CY_GPIO_DM_HIGHZ, 0x00u, P5_1_SRSS_EXT_CLK);
#else
(void)Cy_GPIO_Pin_FastInit(GPIO_PRT0, 5, CY_GPIO_DM_HIGHZ, 0x00u, P0_5_SRSS_EXT_CLK);
#endif
/* Set the EXTCLK frequency to 5MHz */
/* Set the EXTCLK as the source for clock path 1 */
/* In case if there is a need to get the EXT CLK frequency */
uint32_t extClkFreq = Cy_SysClk_ExtClkGetFrequency();